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Personal Computer 
Hardware Reference 
Library 



Technical 
Reference 



1502494 



Personal Computer 
Hardware Reference 
Library 



Technical 
Reference 



First Edition (March 1984) 

The following paragraph does not apply to the United Kingdom or any country where such 
provisions are inconsistent with local law: International Business Machines Corporation 
provides this manual "as is," without warranty of any kind, either expressed or implied, 
including, but not limited to, the particular purpose. IBM may make improvements and/or 
changes in the product(s) and/or the program(s) described in this manual at any time. 

This product could include technical inaccuracies or typographical errors. Changes are 
periodically made to the information herein; these changes will be incorporated in new 
editions of the publication. 

It is possible that this material may contain reference to, or information about, IBM 
products (machines and programs), programming, or services that are not announced in 
your country. Such references or information must not be construed to mean that IBM 
intends to announce such IBM products, programming, or services in your country. 

Products are not stocked at the address below. Requests for copies of this product and for 
technical information about the system should be made to your authorized IBM Personal 
Computer dealer. 

The following paragraph applies only to the United States and Puerto Rico: A Reader's 
Comment Form is provided at the back of this publication. If the form has been removed, 
address comments to: IBM Corp., Personal Computer, P.O. Box 1328-C, Boca Raton, 
Florida 33432. IBM may use or distribute any of the information you supply in any way it 
beheves appropriate without incurring any obligations whatever. 

All specifications subject to change without notice. 

© Copyright International Business Machines Corporation 1984 



FEDERAL COMMUNICATIONS 
COMMISSION RADIO FREQUENCY 
INTERFERENCE STATEMENT 

Warning: The equipment described herein has 
been certified to comply with the limits for a Class 
B computing device, pursuant to Subpart J of 
Part 15 of FCC rules. Only peripherals (computer 
input/output devices, terminals, printers, etc.) 
certified to comply with the Class B limits may be 
attached to the computer. Operation with 
non-certified peripherals is likely to result in 
interference to radio and TV reception. If 
peripherals not offered by IBM are used with the 
equipment, it is suggested to use shielded, grounded 
cables with in-line filters if necessary. 



CAUTION 

The product described herein is equipped with a 
grounded plug for the user's safety. It is to be used 
in conjunction with a properly grounded receptacle 
to avoid electrical shock. 



m 



Notes: 



IV 



Preface 



This manual describes the various units of the IBM Personal 
Computer AT and how they interact. It also has information 
about the basic input/output system (BIOS) and about 
programming support. 

The information in this pubUcation is for reference, and is 
intended for hardware and program designers, programmers, 
engineers, and anyone else who needs to understand the design 
and operation of the IBM Personal Computer AT. 

This manual consists of nine sections, four of which describe the 
hardware aspects of the IBM Personal Computer AT including 
signal charts and register information. Section 5 contains 
information about the usage of BIOS and a system BIOS listing. 
Section 6 contains instruction sets for the 80286 microprocessor 
and the 80287 math coprocessor. Section 7 provides information 
about characters, keystrokes, and colors. Section 8 has general 
communications information. Section 9 contains information 
about the compatibility of the IBM Personal Computer AT and 
the rest of the IBM Personal Computer family. 

A glossary of terms and a bibUography of related publications are 
included. 



Prerequisite PubKcations 

Guide to Operations for the IBM Personal Computer AT 

Suggested Reading 

• BASIC for the IBM Personal Computer 

• Disk Operating System (DOS) 

• Hardware Maintenance and Service for the IBM Personal 
Computer AT 

• MACRO Assembler for the IBM Personal Computer 



VI 



Contents 



SECTION 1. SYSTEM BOARD 1-1 

Description 1-3 

Memory 1-4 

Microprocessor 1-4 

System Performance 1-7 

System Timers 1-8 

System Interrupts 1-10 

ROM Subsystem 1-11 

RAM Subsystem 1-12 

Direct Memory Access (DMA) 1-12 

I/O Channel 1-15 

Other Circuits 1-30 

Speaker 1-30 

Jumper 1-30 

Type of Display Adapter Switch 1-31 

Variable Capacitor 1-31 

Keyboard Controller 1-31 

Real-time Clock/ Complementary Metal Oxide 
Semiconductor (RT/CMOS) RAM Information 1-45 

Specifications 1-55 

System Unit 1-55 

Connectors 1-57 

Logic Diagrams 1-61 

SECTION 2. COPROCESSOR 2-1 

Description 2-3 

Programming Interface 2-3 

Hardware Interface 2-4 

SECTION 3. POWER SUPPLY 3-1 

Inputs 3-3 

Outputs 3-3 

Output Protection 3-4 

Dummy Load 3-4 

Output Voltage Sequencing 3-4 

No-Load Operation 3-5 

Power-Good Signal 3-5 



vu 



Fan-Out 3-6 

Connectors 3-6 

SECTION 4. KEYBOARD 4-1 

Description 4-3 

Interface 4-3 

Sequencing Key Code Scanning 4-3 

Keyboard Buffer 4-3 

Keys 4-3 

Functions Performed at Power-On Time 4-4 

Power-On Reset 4-4 

Basic Assurance Test 4-4 

Commands from the System 4-5 

Keyboard Outputs 4-10 

Key Scan Codes 4-10 

Command Codes to the System 4-12 

Clock and Data Signals 4-14 

Keyboard Data Output 4-15 

Keyboard Data Input 4-15 

Keyboard Layout 4-16 

Specifications 4-23 

Keyboard Connector 4-23 

SECTION 5. SYSTEM BIOS 5-1 

System BIOS 5-3 

System BIOS Usage 5-3 

Keyboard Encoding and Usage 5-12 

Extended Codes 5-17 

SECTION 6. INSTRUCTION SET 6-1 

Instruction Sets 6-3 

80286 Microprocessor Instruction Set 6-3 

Data Transfer 6-3 

Arithmetic 6-6 

Logic 6-10 

String Manipulation 6-12 

Control Transfer 6-13 

Processor Control 6-19 

Protection Control 6-21 

80287 Coprocessor Instruction Set 6-24 

Data Transfer 6-24 

Comparison 6-25 

Constants 6-26 



vm 



Arithmetic 6-27 

Transcendental 6-29 

Processor Control 6-29 

SECTION 7. CHARACTERS, KEYSTROKES, AND 
COLORS 7-1 

Characters, Keystrokes, and Color 7-3 

SECTION 8. COMMUNICATIONS 8-1 

Communications 8-3 

Establishing a Data Link 8-5 

SECTION 9. IBM PERSONAL COMPUTER 
COMPATIBILITY 9-1 

Hardware Considerations 9-3 

System Board 9-3 

20Mb Fixed Disk Drive 9-4 

High Capacity Diskette Drive 9-4 

Adapters 9-4 

Keyboard 9-4 

The IBM Personal Computer AT Does Not Support 9-5 

Application Guidelines 9-5 

High-Level Language Considerations 9-5 

Assembler Language Programming Considerations 9-6 

Multi-tasking Provisions 9-11 

SYS REQ Key 9-15 

Copy Protection 9-22 

Machine-Sensitive Code 9-23 

Glossary Glossary-1 

Bibliography Bibliography- 1 

Index Index-1 



IX 



Notes: 



INDEX TAB LISTING 



Section 1 : System Board 



Section 2: Coprocessor 



Section 3: Power Supply 



Section 4: Keyboard 



Section 5: System BIOS 



Section 6: Instruction Set 



XI 



Notes: 



xu 



Section 7: Characters, Keystrokes, and Colors 



Section 8: Communications 



Section 9: Compatibility 



Glossary 



Bibliography 



Index 



xm 



Notes: 



XIV 



System Block Diagram 



SYSTEM UNIT 



I/O 
CHANNEL 



FIXED 

DISK 

DRIVES 



DDDDD D 



SYSTEM BOARD 






80286 
MICROPROCESSOR 


80287 
COPROCESSOR 


OSCILLATOR 




POWER SUPPLY 
115/230 




16 INTERRUPT 
LEVELS 


ROM 


SPEAKER 
CONNECTOR 


SPEAKER 




7 CHANNEL 
DMA 


RAM 


KEYBOARD 
CONTROLLER 


KEYBOARD 




CMOS 


REAL-TIME 
CLOCK 


BATTERY 
CONNECTOR 


BATTERY 





DISKEHE 
DRIVES 



FIXED DISK AND 
DISKETTE ADAPTER 



± 



ADAPTERS 



XV 



Notes: 



XVI 



SECTION 1. SYSTEM BOARD 



Contents 

Description 1-3 

Memory 1-4 

Microprocessor 1-4 

Real-Address Mode 1-4 

Protected Mode 1-5 

System Performance 1-7 

System Timers 1-8 

System Interrupts 1-10 

ROM Subsystem 1-11 

RAM Subsystem 1-12 

Direct Memory Access (DMA) 1-12 

Programming the 16-Bit DMA Channels 1-14 

I/O Channel 1-15 

I/O Channel Signal Description 1-22 

Other Circuits 1-30 

Speaker 1-30 

Jumper 1-30 

Type of Display Adapter Switch 1-31 

Variable Capacitor 1-31 

Keyboard Controller 1-31 

Receiving Data from the Keyboard 1-32 

Scan Code Translation 1-32 

Sending Data to the Keyboard 1-37 

Inhibit 1-37 

Keyboard Controller System Interface 1-37 



System Board 1-1 



Status Register 1-38 

Status-Register Bit Definition 1-38 

Output Buffer 1-39 

Input Buffer 1-40 

Commands (I/O Address hex 64) 1-40 

I/O Ports 1-43 

Real-time Clock/ Complementary Metal Oxide 

Semiconductor (RT/CMOS) RAM Information 1-45 

Real-time Clock Information 1-45 

CMOS RAM Configuration Information 1-48 

I/O Operations 1-54 

Specifications 1-55 

System Unit 1-55 

Size 1-55 

Weight 1-55 

Power Cables 1-55 

Environment 1-55 

Heat Output 1-56 

Noise Level 1-56 

Electrical 1-56 

Connectors 1-57 

Logic Diagrams 1-61 



1-2 System Board 



Description 



The system board is approximately 30.5 by 33 centimeters (12 by 
13 inches) and uses very large scale integration (VLSI) 
technology. It has the following components: 

• Intel 80286 Microprocessor 

• System support function: 

- 7-Channel Direct Memory Access (DMA) 

- 1 6-level interrupt 

- System clock 

- Three programmable timers 

64Kb read-only memory (ROM) subsystem, expandable to 
128Kb 

Either a 256Kb or a 512Kb random-access memory (RAM) 
Subsystem 

Speaker attachment 

Complementary metal oxide semiconductor (CMOS) memory 
RAM to maintain system configuration 

Real-Time clock 

Battery backup for CMOS configuration table and Real-Time 
Clock 

Keyboard attachment 

8 input/output (I/O) slots: 

- 6 with a 36- and a 62-pin card-edge socket. 

- 2 with only the 62-pin card-edge socket. 



System Board 1-3 



Memory 

The system board has two banks of memory sockets, each 
supporting 18 128K by 1 modules for a total maximum memory 
size of 512Kb, with parity checking. 



Microprocessor 



The Intel 80286 Microprocessor has a 24-bit address, 16-bit 
memory interface^, an extensive instruction set, DMA and 
interrupt support capabilities, a hardware fixed-point multiply and 
divide, integrated memory management, four-level memory 
protection, 1 -gigabyte (1,073,741,824 bytes) of virtual address 
space for each task, and two operating modes: the 
8086-compatible real-address mode and the protected 
virtual-address mode. More detailed descriptions of the 
microprocessor may be found in the publications Usted in the 
Bibliography of this manual. 



Real-Address Mode 

In the real-address mode, the microprocessor's physical memory 
is a contiguous array of up to one megabyte. The microprocessor 
addresses memory by generating 20-bit physical addresses. 

The selector portion of the pointer is interpreted as the upper 16 
bits of a 20-bit segment address. The lower 4 bits of the 20-bit 
segment address are always zero. Therefore, segment addresses 
begin on multiples of 16 bytes. 

All segments in the real-address mode are 64Kb in size and may 
be read, written, or executed. An exception or interrupt can 
occur if data operands or instructions attempt to wrap around the 
end of a segment; for example, a word with its low-order byte at 
offset FFFF and its high-order byte at 0000. If, in the 
real-address mode, the information contained in the segment does 



In this manual, the term interface refers to a device that carries signals between 
functional units. 



1-4 System Board 



not use the full 64Kb, the unused end of the segment may be 
overlayed by another segment to reduce physical memory 
requirements. 



Protected Mode 

The protected mode offers extended physical and virtual memory 
address space, memory protection mechanisms, and new 
operations to support operating systems and virtual memory. 

The protected mode provides a 1 -gigabyte virtual address space 
per task mapped into a 16-megabyte physical address space. The 
virtual address space may be larger than the physical address 
space, because any use of an address that does not map to a 
physical memory location will cause a restartable exception. 

As in the real-address mode, the protected mode uses 32-bit 
pointers, consisting of 16-bit selector and offset components. 
The selector, however, specifies an index into a memory resident 
table rather than the upper 16 bits of a real memory address. The 
24 -bit base address of the desired segment is obtained from the 
tables in memory. The 16-bit offset is added to the segment base 
address to form the physical address. The tables are 
automatically referenced by the microprocessor whenever a 
segment register is loaded with a selector. All instructions that 
load a segment register will refer to the memory based-tables 
without additional program support. The memory-based tables 
contain 8-byte values called descriptors. 

Following is a block diagram of the system board. 



System Board 1-5 




E 

2 
o> 

CQ 

i5 

o 
o 

5 



(0 

o 

CD 

E 
o> 

t) 

>. 

(0 



1-6 System Board 



System Performance 



The 80286 Microprocessor operates at 6 MHz, which results in a 
clock cycle time of 167 nanoseconds. 

A bus cycle requires three clock cycles (which includes 1 wait 
state) so that a 500-nanosecond, 16-bit, microprocessor cycle 
time is achieved. 8 -bit bus operations to 8 -bit devices take 6 
clock cycles (which include 4 wait states), resulting in a 
1000-nanosecond microprocessor cycle. 16-bit bus operations to 
8 -bit devices take 12 clock cycles (which include 10 I/O wait 
states) resulting in a 2000 nanosecond microprocessor cycle. 

The refresh controller operates at 6 MHz. Each refresh cycle 
requires 5 clock cycles to refresh all of the system's dynamic 
memory; 256 refresh cycles are required every 4 miUiseconds. 
The following formula determines the percent of bandwidth used 
for refresh. 

% Bandwidth used 5 cycles X 256 1280 

for Refresh = = = 5.3% 

4 ms/167 ns 24000 

The DMA controller operates at 3 MHz, which results in a clock 
cycle time of 333 nanoseconds. All DMA data-transfer bus 
cycles are five clock cycles or 1.66 microseconds. Cycles spent in 
the transfer of bus control are not included. 

DMA channels 0, 1,2, and 3 are used for 8-bit data transfers, and 
channels 5, 6, and 7 process 16-bit transfers. Channel 4 is used 
to cascade channels through 3 to the microprocessor. 

The following figure is a system memory map. 



System Board 1-7 



Address 


Name 


Function 


000000 to 
07FFFF 


512Kb system 
board 


System board memory 


080000 to 
09FFFF 


128Kb 


I/O channel memory - IBM Personal 
Computer AT 128KB Memory 
Expansion Option 


OAOOOO to 
OBFFFF 


128Kb video 
RAM 


Reserved for graphics display buffer 


OCOOOO to 
ODFFFF 


128Kb I/O 
expansion ROM 


Reserved for ROM on I/O adapters 


OEOOOO to 
OEFFFF 


64Kb Reserved 
on systenn board 


Duplicated code assignment at 
address FEOOOO 


OFQOOO to 
OFFFFF 


64Kb ROM on 
the system board 


Duplicated code assignment at 
address FFOOOO 


100000 to 
FDFFFF 


Maximum 
memory 15Mb 


i/O channel memory - IBM Personal 
Computer AT 512KB Memory 
Expansion Option 


FEOOOO to 
FEFFFF 


64Kb Reserved 
on system board 


Duplicated code assignment at 
address OEOOOO 


FFOOOO to 
FFFFFF 


64Kb ROM on 
the system board 


Duplicated code assignment at 
address OFOOOO 



System Memory Map 



System Timers 



The system has three programmable timer/counters controlled by 
an Intel 8254-2 timer/counter chip and defined as Channels 
through 2 as follows: 



Channel 
GATEO 
CLK IN 
CLK OUT 



System Timer 

Tied on 

1.190 MHz OSC 

8259A IRQ 



Channel 1 Refresh Request Generator 



1-8 System Board 



GATE 1 Tied on 

CLKINl 1.190 MHz OSC 

CLK OUT 1 Request Refresh Cycle 

Note: Channel 1 is programmed as a rate generator to 
produce a 15 -microsecond period signal. 

Channel 2 Tone Generation for Speaker 

GATE 2 Controlled by bit of port hex 61 PPI bit 

CLK IN 2 1.190 MHz OSC 

CLK OUT 2 Used to drive the speaker 

The 8254-2 Timer/Counter is a programmable interval 
timer/counter that system programs treat as an arrangement of 
four external I/O ports. Three ports are treated as counters; the 
fourth is a control register for mode programming. Following is a 
system-timer block diagram. 



System Board 1-9 



-Refresh 



System Bus- 



+ 5Vdc- 



1/0 Address 
Hex 0061 — 
Port Bit 



I/O Address 
Hex 0061 — 
Port Bit 1 

PCLK— 



(2.38MHz) 



Gate 
Cloclc In 
Gate 1 
Clock In 1 
Gate 2 
Clock In 2 
Clock Out 

Clock Out 1H 
Clock Out 2 



+5 Vdc 




Refresh Request 



To 8259A IRQ 



Driver 



AND 



Low 
Pass 
Filter 



To Speaker 



Divide 
by 2 



System Interrupts 



The 80286 Microprocessor NMI and two 8259A Interrupt 
Controller chips provide 16 levels of system interrupts. The 
following shows the interrupt-level assignments in decreasing 
priority. 

Note: Any or all interrupts may be masked (including the 
microprocessor's NMI). 



1-10 System Board 



Level 

Microprocessor NMI 

Interrupt Controllers 
CTLR 1 CTLR 2 



Function 

Parity or I/O Channel Check 



IRQO 






Timer Output 


IRQl 


Keyboard (Output Buffer Full) 


IRQ 2-^ 






Interrupt from CTLR 2 






IRQ 8 


Realtime Clock Interrupt 






IRQ 9 


Software Redirected to INT f^AR (IRQ 2) 






IRQ 10 


Reserved 






IRQ 11 


Reserved 




IRQ 12 


Reserved 




IRQ 13 


Coprocessor 




IRQ 14 


Fixed Disk Controller 




IRQ 15 


Reserved 


IRQ 3 




Serial Port 2 


IRQ 4 


Serial Port 1 


IRQ 5 


Parallel Port 2 


IRQ 6 


Diskette Controller 


IRQ 7 






Parallel Port 1 



ROM Subsystem 



The system board's ROM subsystem consists of two 32K by 8-bit 
ROM/EPROM modules or four 16K by 8-bit ROM/EPROM 
modules in a 32K by 16-bit arrangement. The code for odd and 
even addresses resides in separate modules. ROM is assigned at 
the top of the first and last IM address space (hex OFOOOO and 
hex FFOOOO). ROM is not parity-checked. Its access time is 150 
nanoseconds and its cycle time is 230 nanoseconds. 



System Board 1-11 



RAM Subsystem 

The system board's RAM subsystem starts at address hex 000000 
of the 16M address space. It consists of either 256Kb or 512Kb 
of 128K by 1-bit RAM modules. Memory access time is 150 
nanoseconds and the cycle time is 275 nanoseconds. 

Memory-refresh requests one memory cycle every 1 5 
microseconds through the timer/counter (channel 1). The RAM 
initialization program performs the following functions: 

• Initializes channel 1 of the timer/counter to the rate 
generation mode, with a period of 15 microseconds. 

• Performs a memory write operation to any memory location 

Note: The memory must be accessed or refreshed eight times 
before it can be used. 



Direct Memory Access (DMA) 



The system supports seven DMA channels. Two Intel 8237A-5 
DMA Controller Chips are used, with four channels for each 
chip. The DMA channels are assigned as follows: 



Ctlrl 


Ctlr2 


Ch - Spare 


Ch 4 - Cascade for Ctir 1 


Ch 1 - SDLC 


Ch 5 - Spare 


Ch2- Diskette (IBM 


Ch 6 - Spare 


Personal Computer) 




Ch 3 - Spare 


Ch 7 - Spare 



DMA Channels 

DMA controller 1 contains channels through 3. These channels 
support 8-bit data transfers between 8-bit I/O adapters and 8- or 



1-12 System Board 



16-bit system memory. Each channel can transfer data 
throughout the 16-megabyte system- address space in 64Kb 
blocks. 

DMA controller 2 contains channels 4 through 7. Channel 4 is 
used to cascade channels through 3 to the microprocessor. 
Channels 5,6, and 7 support 16-bit data transfers between 16-bit 
I/O adapters and 16-bit system memory. These DMA channels 
can transfer data throughout the 16-megabyte system-address 
space in 128Kb blocks. Channels 5, 6, and 7 cannot transfer data 
on odd byte boundaries. 

The following figure shows the addresses for the page register. 



Page Register 


I/O Hex Address 


DMA Channel 


0087 


DMA Channel 1 


0083 


DMA Channel 2 


0081 


DMA Channel 3 


0082 


DMA Channel 5 


008B 


DMA Channel 6 


0089 


DMA Channel 7 


008A 


Refresh 


008F 



Page Register Addresses 

The following figures show address generation for the DMA 
channels. 



Source 


DMA Page Registers 


8237A-5 


Address 


A23< >A16 


A15< >A0 



Address Generation for DMA Channels 3 through 

Note: The addressing signal, ' byte high enable ' (BHE), is 
generated by inverting address line AO. 



Source 


DMA Page Registers 


8237A-5 


Address 


A23< >A17 


A16< >A1 



Address Generation for DMA Channels 7 through 5 

Note: The addressing signals, 'BHE' and ' AO ', are forced to 
a logic 0. 



System Board 1-13 



Addresses for all DMA channels do not increase or decrease 
through page boundaries (64Kb for channels through 3 and 
128Kb for channels 5 through 7). 



Programming the 16-Bit DMA Channels 

DMA channels 5 through 7 perform 16-bit data transfers. Access 
can be gained only to 16 bit devices (I/O or memory) during the 
DMA cycles of channels 5 through 7. Access to the DMA 
controller (8237A-5), which controls these channels, is through 
I/O addresses OCO through ODF. The command codes for the 
DMA controller are as follows: 



Hex 


Command Codes 


Address 




OCO 


CHO base and current address 


002 


OHO base and current word count 


0C4 


CHI base and current address 


006 


cm base and current word count 


0C8 


CH2 base and current address 


OCA 


CH2 base and current word count 


OCC 


CHS base and current address 


OCE 


CHS base and current word count 


ODO 


Read Status Register /Write Connmand Register 


0D2 


Write Request Register 


0D4 


Write Single Mask Register Bit 


0D6 


Write Mode Register 


0D8 


Clear Byte Pointer Flip- Flop 


ODA 


Read Tennporary Register/Write Master Clear 


ODC 


Clear Mask Register 


ODE 


Write All Mask Register Bits 



DMA Controller Registers 

All DMA memory transfers made with channels 5 through 7 must 
occur on even-byte boundaries. When the base address for these 
channels is programmed, the real address divided by 2 is the data 
that is written to the base address register. Also, when the base 
word count for channels 5 through 7 is programmed, the count is 
the number of 16-bit words to be transferred. Therefore, DMA 
channels 5 through 7 can transfer 65,536 words or 128Kb 
maximum for any selected page of memory. These DMA 
channels divide the 16Mb memory space into 128Kb pages. 
When the DMA page registers for channels 5 through 7 are 



1-14 System Board 



programmed, data bits D7 through Dl should contain the 
high-order seven address bits (A23 through A17) of the desired 
memory space. Data bit DO of the page registers for channels 5 
through 7 is not used in the generation of the DMA memory 
address. 

After power-up time, all internal locations, especially the mode 
registers, should be loaded with some valid value. This should be 
done even if some channels are unused. 



I/O Channel 

The I/O channel supports: 

• I/O address space hex 100 to hex 3FF 

• 24-bit memory addresses (16Mb) 

• Selection of data accesses (either 8- or 16-bit) 

• Interrupts 

• DMA channels 

• I/O wait-state generation 

• Open-bus structure (allowing multiple microprocessors to 
share the system's resources, including memory) 

• Refresh of system memory from channel microprocessors. 

The following figure shows the location and the numbering of the 
I/O channel connectors. These connectors consist of eight 
62-pin and six 36-pin edge connector sockets. 

Note: In two positions on the I/O channel, the 36-pin 
connector is not present. These positions can support only 
62-pin I/O bus adapters. 



System Board 1-15 



I/O CHANNEL 
CONNECTORS 




1-16 System Board 



The following figure shows the pin numbering for I/O channel 
connectors Jl through J8. 



Rear Panel 



B1 



BIO 



820 



B31 



A1 



A10 



A20 



A31 
Side 



I/O Channel Pin Numbering 
(J1-J8) 



System Board 1-17 



The following figure shows the pin numbering for I/O channel 
connectors J12 through J16 and J 18. 



Rear Panel 



D1 



010 



018 



CI 



CIO 



CIS 
Side 



I/O Channel Pin Numbering 
(J10-J14and J16) 



1-18 System Board 



The following figures summarize pin assignments for the I/O 
channel connectors. 



I/O Pin 


Signal Name 


I/O 


A1 


-l/OCHCK 


1 


A2 


SD7 


I/O 


A3 


SD6 


I/O 


A4 


SD5 


I/O 


A5 


SD4 


I/O 


A6 


SD3 


I/O 


A7 


SD2 


I/O 


A8 


SD1 


I/O 


A9 


SDO 


I/O 


A 10 


-I/O OH RDY 


1 


All 


AEN 





A12 


SA19 


I/O 


A 13 


SA18 


I/O 


A 14 


SA17 


I/O 


A15 


SA16 


I/O 


A16 


SA15 


I/O 


A17 


SAM 


I/O 


A 18 


SA13 


I/O 


A19 


SA12 


I/O 


A 20 


SA11 


I/O 


A 21 


SA10 


I/O 


A 22 


SA9 


I/O 


A 23 


SA8 


I/O 


A 24 


SA7 


I/O 


A 25 


SA6 


I/O 


A 26 


SA5 


I/O 


A 27 


SA4 


I/O 


A 28 


SA3 


I/O 


A 29 


SA2 


I/O 


A 30 


SAl 


I/O 


A 31 


SAO 


I/O 



I/O Channel (A-Side, J1 through J8) 



System Board 1-19 



I/O Pin 


Signal Name 


I/O 


B 1 


GND 


Ground 


B2 


RESET DRV 





83 


+5Vdc 


Power 


84 


IRQ 9 


1 


85 


-5Vdc 


Power 


86 


DRQ2 


1 


87 


-12Vdc 


Power 


88 


OWS 


1 


89 


+12Vdc 


Power 


8 10 


GND 


Ground 


811 


-SMEMW 





8 12 


-SMEMR 





8 13 


-low 


I/O 


8 14 


-lOR 


I/O 


815 


-DACK3 


6 


816 


DRQ3 


1 


817 


-DACK1 





8 18 


DRQ1 


1 


8 19 


-Refresh 


I/O 


8 20 


CLK 





8 21 


IRQ7 


1 


8 22 


IRQ6 


1 


8 23 


IRQ5 


1 


8 24 


IRQ4 


1 


8 25 


IRQ3 


1 


8 26 


-DACK2 





8 27 


T/C 





8 28 


BALE 





8 29 


+5Vdc 


Power 


8 30 


OSC 





8 31 


GND 


Ground 



I/O Channel (B-Side J1, through J8) 



1-20 System Board 



I/O Pin 


Signal Name 


I/O 


C1 


SBHE 


I/O 


C2 


LA23 


I/O 


C3 


LA22 


I/O 


C4 


LA21 


I/O 


C5 


LA20 


I/O 


C6 


LAI 9 


I/O 


C7 


LAI 8 


I/O 


C8 


LAI 7 


I/O 


C9 


-MEMR 


I/O 


CIO 


-MEMW 


I/O 


C11 


SD08 


I/O 


C12 


SD09 


I/O 


C13 


SD10 


I/O 


C14 


SD11 


I/O 


C15 


SD12 


I/O 


C16 


SD13 


I/O 


C17 


SD14 


I/O 


CIS 


SD15 


I/O 



I/O Channel (C-Slde J1 through J1 4 and J1 6) 



I/O Pin 


Signal Name 


I/O 


D1 


-MEMCS16 


1 


D2 


-I/0CS16 


1 


D3 


IRQ10 


1 


D4 


IRQ11 


1 


D5 


IRQ12 


1 


D6 


IRQ15 


1 


D7 


IRQ14 


1 


D8 


-DACKO 





D9 


DRQO 


1 


D10 


-DACK5 





D11 


DRQ5 


1 


D12 


-DACK6 





D13 


DRQ6 


1 


D14 


-DACK7 





D15 


DRQ7 


1 


D16 


+5Vdc 


Power 


D17 


-MASTER 


1 


D18 


GND 


Ground 



I/O Channel (D-Side, J1 through J1 4 and J1 6) 



System Board 1-21 



I/O Channel Signal Description 

The following is a description of the system board's I/O channel 
signals. All signal lines are TTL-compatible. I/O adapters should 
be designed with a maximum of two low-power Shottky (LS) 
loads per line. 



SAO through SA19 (I/O) 

Address bits through 19 are used to address memory and I/O 
devices within the system. These 20 address lines, in addition to 
LA 17 through LA23, allow access of up to 16Mb of memory. 
SAO through SA19 are gated on the system bus when ' BALE ' is 
high and are latched on the falling edge of ' BALE. ' These 
signals are generated by the microprocessor or DMA Controller. 
They also may be driven by other microprocessors or DMA 
controllers that reside on the I/O channel. 



1.A17 through LA23 (I/O) 

These signals (unlatched) are used to address memory and I/O 
devices within the system. They give the system up to 16Mb of 
addressability. These signals are vaUd when ' BALE ' is high. 
LA 17 through LA23 are not latched during microprocessor cycles 
and therefore do not stay vaUd for the whole cycle. Their purpose 
is to generate memory decodes for 1 wait-state memory cycles. 
These decodes should be latched by I/O adapters on the falling 
edge of 'BALE. ' These signals also may be driven by other 
microprocessors or DMA controllers that reside on the I/O 
channel. 



CLK (0) 

This is the 6-MHz system clock. It is a synchronous 
microprocessor cycle clock with a cycle time of 167 nanoseconds. 
The clock has a 50% duty cycle. This signal should only be used 
for synchronization. It is not intended for uses requiring a fixed 
frequency. 



1-22 System Board 



RESET DRV (0) 

' Reset drive ' is used to reset or initialize system logic at 
power-up time or during a low line-voltage outage. This signal is 
active high. 



^DO through SD15 (I/O) 

These signals provide bus bits through 15 for the 
microprocessor, memory, and I/O devices. DO is the 
least-significant bit and D15 is the most-significant bit. All 8-bit 
devices on the I/O channel should use DO through D7 for 
communications to the microprocessor. The 16-bit devices will 
use DO through D15. To support 8-bit devices, the data on D8 
through D15 will be gated to DO through D7 during 8 -bit 
transfers to these devices; 16-bit microprocessor transfers to 8-bit 
devices will be converted to two 8-bit transfers. 



BALE (0) (buffered) 

'Address latch enable ' is provided by the 82288 Bus Controller 
and is used on the system board to latch valid addresses and 
memory decodes from the microprocessor. It is available to the 
I/O channel as an indicator of a valid microprocessor or DMA 
address (when used with ' AEN ' ). Microprocessor addresses 
SAO through SA19 are latched with the falling edge of 'BALE. ' 
'BALE ' is forced high during DMA cycles. 



-I/O CH CK (I) 

' -I/O channel check ' provides the system board with parity 
(error) information about memory or devices on the I/O channel. 
When this signal is active, it indicates an uncorrectable system 
error. 



System Board 1-23 



I/O CH RDY (I) 

' I/O channel ready ' is pulled low (not ready) by a memory or 
I/O device to lengthen I/O or memory cycles. Any slow device 
using this line should drive it low immediately upon detecting its 
valid address and a Read or Write command. Machine cycles are 
extended by an integral number of clock cycles (167 
nanoseconds). This signal should be held low for no more than 
2.5 microseconds. 



IRQ3-IRQ7, IRQ9-IRQ12 and IRQ 14 through 15 (I) 

Interrupt Requests 3 through 7, 9 through 12, and 14 through 15 
are used to signal the microprocessor that an I/O device needs 
attention. The interrupt requests are prioritized, with IRQ9 
through IRQ 12 and IRQ 14 through IRQ 15 having the highest 
priority (IRQ9 is the highest) and IRQ3 through IRQ7 having the 
lowest priority (IRQ7 is the lowest). An interrupt request is 
generated when an IRQ line is raised from low to high. The line 
must be held high until the microprocessor acknowledges the 
interrupt request (Interrupt Service routine). Interrupt 13 is used 
on the system board and is not available on the I/O channel. 
Interrupt 8 is used for the real-time clock. 



-lOR (I/O) 

' -I/O Read ' instructs an I/O device to drive its data onto the 
data bus. It may be driven by the system microprocessor or DMA 
controller, or by a microprocessor or DMA controller resident on 
the I/O channel. This signal is active low. 



-lOW (I/O) 

' -I/O Write ' instructs an I/O device to read the data on the 
data bus. It may be driven by any microprocessor or DMA 
controller in the system. This signal is active low. 



1-24 System Board 



-SMEMR (O) -MEMR (I/O) 

These signals instruct the memory devices to drive data onto the 
data bus. ' -SMEMR ' is active only when the memory decode is 
within the low 1Mb of memory space. ' -MEMR ' is active on all 
memory read cycles. ' -MEMR ' may be driven by any 
microprocessor or DMA controller in the system. ' -SMEMR ' is 
derived from ' -MEMR ' and the decode of the low 1Mb of 
memory. When a microprocessor on the I/O channel wishes to 
drive ' -MEMR ' , it must have the address Unes valid on the bus 
for one system clock period before driving ' -MEMR ' active. 
Both signals are active LOW. 



-SMEMW (O) -MEMW (I/O) 

These signals instruct the memory devices to store the data 
present on the data bus. ' -SMEMW ' is active only when the 
memory decode is within the low 1Mb of the memory space. 
' -MEMW ' is active on all memory read cycles. ' -MEMW ' may 
be driven by any microprocessor or DMA controller in the 
system. ' -SMEMW ' is derived from ' -MEMW ' and the decode 
of the low 1Mb of memory. When a microprocessor on the I/O 
channel wishes to drive ' -MEMW * , it must have the address lines 
valid on the bus for one system clock period before driving 
' -MEMW ' active. Both signals are active low. 



DRQ0-DRQ3 and DRQ5-DRQ7 (I) 

DMA Requests through 3 and 5 through 7 are asynchronous 
channel requests used by peripheral devices and the I/O channel 
microprocessors to gain DMA service (or control of the system). 
They are prioritized, with ' DRQO ' having the highest priority and 
' DRQ7 ' having the lowest. A request is generated by bringing a 
DRQ line to an active level. A DRQ line must be held high until 
the corresponding ' DMA Request Acknowledge ' (D ACK) line 
goes active. 'DRQO' through 'DRQ3' will perform 8-bit 
DMA transfers; 'DRQ5' through 'DRQ7' will perform 16-bit 
transfers. ' DRQ4 ' is used on the system board and is not 
available on the I/O channel. 



System Board 1-25 



-DACKO to -DACK3 and -DACK5 to -DACK7 (O) 

-DMA Acknowledge to 3 and 5 to 7 are used to acknowledge 
DMA requests (DRQO through DRQ7). They are active low. 

^AEN (O) 

' Address Enable ' is used to degate the microprocessor and other 
devices from the I/O channel to allow DMA transfers to take 
place. When this line is active, the DMA controller has control of 
the address bus, the data-bus Read command lines (memory and 
I/O), and the Write command lines (memory and I/O). 



-REFRESH (I/O) 

This signal is used to indicate a refresh cycle and can be driven by 
a microprocessor on the I/O channel. 



T/C (O) 

' Terminal Count ' provides a pulse when the terminal count for 
any DMA channel is reached. 



^^SBHE (I/O) 

' Bus High Enable ' (system) indicates a transfer of data on the 
upper byte of the data bus, SD8 through SD15. Sixteen-bit 
devices use ' SBHE ' to condition data bus buffers tied to SD8 
through SD15. 



-MASTER (I) 

This signal is used with a DRQ line to gain control of the system. 
A processor or DMA controller on the I/O channel may issue a 
DRQ to a DMA channel in cascade mode and receive a 
'-DACK'. Upon receiving the ' -DACK ' , an I/O 
microprocessor may pull ' -MASTER ' low, which will allow it to 



1-26 System Board 



control the system address, data, and control lines (a condition 
known as tri-state). After '-MASTER' is low, the I/O 
microprocessor must wait one system clock period before driving 
the address and data lines, and two clock periods before issuing a 
Read or Write command. If this signal is held low for more than 
15 microseconds, system memory may be lost because of a lack of 
refresh. 



-MEM CS16 (I) 

' -MEM 16 Chip Select ' signals the system board if the present 
data transfer is a 1 wait-state, 16-bit, memory cycle. It must be 
derived from the decode of LA 17 through LA23. ' -MEM 
CS16 ' should be driven with an open collector or tri-state driver 
capable of sinking 20 mA. 



N 



-I/O CS16 (I) 

' -I/O 16 bit Chip Select ' signals the system board that the 
present data transfer is a 16-bit, 1 wait-state, I/O cycle. It is 
derived from an address decode. ' -I/O CS16 ' is active low and 
should be driven with an open collector or tri-state driver capable 
of sinking 20 mA. 



OSC (O) 

' Oscillator ' (OSC) is a high-speed clock with a 70-nanosecond 
period (14.31818 MHz). This signal is not synchronous with the 
system clock. It has a 50% duty cycle. 

OWS (I) 

The ' Zero Wait State ' (OWS) signal tells the microprocessor that 
it can complete the present bus cycle without inserting any 
additional wait cycles. In order to run a memory cycle to a 16-bit 
device without wait cycles, ' OWS ' is derived from an address 
decode gated with a Read or Write command. In order to run a 
memory cycle to an 8 -bit device with a minimum of two wait 
states, ' OWS ' should be driven active one system clock after the 



System Board 1-27 



Read or Write command is active gated with the address decode 
for the device. Memory Read and Write commands to an 8 -bit 
device are active on the f aUing edge of the system clock. ' OWS ' 
is active low and should be driven with an open collector or 
tri-state driver capable of sinking 20 mA. 

The following figure is an I/O address map. 



Hex Range 


Device 


000-01 F 


DMA controller 1, 8237A-5 




020-03F 


Interrupt controller 1, 8259A, Master 




040-05F 


Timer, 8254.2 




060-06F 


8042 (Keyboard) 




070-07F 


Real-time clock, NMI (non-maskable interrupt) 


mask 


080-09F 


DMA page register, 74LS612 




OAO-OBF 


Interrupt controller 2, 8259 A 




OCO-ODF 


DMA controller 2, 8237A-5 




OFO 


Clear Math Coprocessor Busy 




0F1 


Reset Math Coprocessor 




0F8-0FF 


Math Coprocessor 




1F0-1F8 


Fixed Disk 




200-207 


Game I/O 




278-27F 


Parallel printer port 2 




2F8-2FF 


Serial port 2 




300-31 F 


Prototype card 




360-36F 


Reserved 




378-37F 


Parallel printer port 1 




380-38F 


SDLC, bisynchronous 2 




3A0-3AF 


Bisynchronous 1 




3B0-3BF 


Monochrome Display and Printer Adapter 




3C0-3CF 


Reserved 




3D0-3DF 


Color/Graphics Monitor Adapter 




3F0-3F7 


Diskette controller 




3F8-3FF 


Serial port 1 





I/O Address Map 

Note: I/O addresses, hex 000 to OFF, are reserved for the 
system board I/O. Hex 100 to 3FF are available on the I/O 
channel. 

At power on time, the non-maskable interrupt (NMI) into the 
80286 is masked off. The mask bit can be set and reset with 
system programs as follows: 

Mask On Write to I/O address hex 070, with data bit 7 

equal to a logic 



1-28 System Board 



Mask Off Write to I/O address hex 070, with data bit 7 

equal to a logic 1 

Note: At the end of POST, the system sets the NMI mask on 
(NMI enabled). 

The following is a description of the Math Coprocessor controls. 

OFO An 8 -bit Out command to port FO will clear the latched 
Math Coprocessor busy signal. ' Busy ' will be latched if 
the coprocessor asserts its error signal while it is busy. The 
data output should be zero. 

OFl An 8-bit Out command to port Fl will reset the Math 
Coprocessor. The data output should be zero. 

I/O address hex 080 is used as a diagnostic-checkpoint port or 
register. This port corresponds to a read/write register in the 
DMA page register (74LS612). 

The ' -I/O channel check signal ' (-I/O CH CK) is used to report 
uncorrectable errors on RAM adapters on the I/O channel. This 
check will create a non-maskable interrupt (NMI) if enabled (see 
the figure, "I/O Address Map," for enable control). At 
power-on time, the NMI is masked off and check is disabled. 
Before check or NMI is enabled, the following steps should be 
taken. 

1. Write data in all I/O RAM-adapter memory locations; this 
will estabUsh good parity at all locations. 

2. Enable I/O channel check. 

3. Enable NMI. 

Note: All three of these functions are performed by POST. 

When a check occurs, an interrupt (NMI) will result. Check the 
status bits to determine the source of the NMI (see the figure, 
"I/O Address Map"). To determine the location of the failing 
adapter, write to any memory location within a given adapter. If 
the parity check was from that adapter, ' -I/O CH CK ' will be 
inactive. 



System Board 1-29 



Other Circuits 



Speaker 

The system unit has a 2-1/4 inch permanent-magnet speaker, 
which can be driven from: 

. The I/O-port output bit 

• The timer/counter's clock out 

• Both 



Jumper 

The system board has a 3 -pin, Berg-strip connector. The 
placement of a jumper across the pins of the connector 
determines whether the system board's 2nd 256Kb of RAM is 
enabled or disabled. Following are the pin assignments for the 
connector. 



Pin 


Assignments 


1 
2 
3 


No connection 
Ground 
A8 {28S42) 



RAM Jumper Connector(J18) 



The following shows how the jumper affects RAM. 



Jumper Positions 


Function 


1 and 2 

2 and 3 


Enable 2nd 256Kb of system board rann 
Disable 2nd 256Kb of system board ram 



RAM Jumper 



Note: The normal mode is the enable mode. The disable 
mode permits the 2nd 256Kb of RAM to reside on adapters 
plugged into the I/O bus. 

1-30 System Board 



Type of Display Adapter Switch 

The system board has a sUde switch, the purpose of which is to 
tell the system into which display adapter the primary display is 
attached. Its positions are assigned as follows: 

On (toward the rear of the system unit): The primary display is 
attached to Color/ Graphics Monitor Adapter. 

Off (toward the front of the system unit): The primary display 
is attached to the Monochrome Display and Printer Adapter. 

Note: The primary display is activated when the system is 
turned on. 



Variable Capacitor 

The system board has a variable capacitor. Its purpose is to 
adjust the 14.31818 MHz oscillator (OSC) signal that is used to 
obtain the color burst signal required for color televisions. 



Keyboard Controller 

The keyboard controller is a single-chip microcomputer (Intel 
8042) that is programmed to support the IBM Personal Computer 
AT Keyboard serial interface. The keyboard controller receives 
serial data from the keyboard, checks the parity of the data, 
translates scan codes, and presents the data to the system as a 
byte of data in its output buffer. The controller will interrupt the 
system when data is placed in its output buffer. The status 
register contains bits that indicate if an error was detected while 
receiving the data. Data may be sent to the keyboard by writing 
to the keyboard controller's input buffer. The byte of data will be 
sent to the keyboard serially with an odd parity bit automatically 
inserted. The keyboard is required to acknowledge all data 
transmissions. No transmission should be sent to the keyboard 
until acknowledgment is received for the previous byte sent. 



System Board 1-31 



Receiving Data from the Keyboard 

The keyboard sends data in a serial format using an 1 1-bit frame. 
The first bit is a start bit, and is followed by eight data bits, an 
odd parity bit, and a stop bit. Data sent is synchronized by a 
clock supplied by the keyboard. At the end of a transmission, the 
keyboard controller disables the interface until the system accepts 
the byte. If the byte of data is received with a parity error, a 
Resend command is automatically sent to the keyboard. If the 
keyboard controller is unable to receive the data correctly, a hex 
FF is placed in its output buffer, and the parity bit in the status 
register is set to 1 , indicating a receive parity error. The keyboard 
controller will also time a byte of data from the keyboard. If a 
keyboard transmission does not end within two milliseconds, a 
hex FF is placed in the keyboard controller's output buffer, and 
the receive time-out bit in the status register is set. No retries will 
be attempted on a receive time-out error. 



Scan Code Translation 

Scan codes, which are received from the keyboard, are converted 
by the keyboard controller before they are put into the 
controller's output buffer. The following figure shows the 
keyboard layout with key numbers. 



1-32 System Board 



















a 




° 




o 




eo 








































1 




o 




CM 




CO 




1 












































in 
at 


CO 


r^ 




c» 
a> 




s; 
































S 


at 


CM 

as 












_J 




_J 


I 


_J 



s 



[=] 



[I] 



@ 



s 



H 



H 



H 



H 



H 



H 



H 



H 



@ 



H 



@ 



Q 



H 



[E 



[E 



H 



un 
to 


to 

CO 


CO 
CM 



n 

L J 


74 69 



System Board 1-33 



The following figure is the scan-code translation table. 



Keyboard Scan Code 


Key 


System Scan Code 


00 




FF 


76 


90 


01 


16 


2 


02 


IE 


3 


03 


26 


4 


04 


25 


5 


05 


2E 


6 


06 


36 


7 


07 


3D 


8 


08 


3E 


9 


09 


46 


10 


OA 


45 


11 


OB 


4E 


12 


00 


55 


13 


OD 


66 


15 


OE 


OD 


16 


OF 


15 


17 


10 


ID 


18 


11 


24 


19 


12 


2D 


20 


13 


2C 


21 


14 


35 


22 


15 


30 


23 


16 


43 


24 


17 


44 


25 


18 


4D 


26 


19 


54 


27 


1A 


5B 


28 


IB 


5A 


43 


10 


14 


30 


ID 


10 


31 


IE 


IB 


32 


IF 


23 


33 


20 


2B 


34 


21 


34 


35 


22 


33 


36 


23 


3B 


37 


24 


42 


38 


25 


4B 


39 


26 


40 


40 


27 


52 


41 


28 


OE 


1 


29 


12 


44 


2A 


5D 


14 


2B 


1A 


46 


20 


22 


47 


2D 


21 


48 


2E 


2A 


49 


2F 



(Parti of 2). 



Scan-Code Translation Table 



1-34 System Board 



Keyboard Scan Code 


Key 


System Scan Code 


32 


50 


30 


31 


51 


31 


3A 


52 


32 


41 


53 


33 


49 


54 


34 


4A 


55 


35 


59 


57 


36 


7C 


106 


37 


11 


58 


38 


29 


61 


39 


58 


64 


3A 


05 


70 


3B 


06 


65 


30 


04 


71 


3D 


OC 


66 


3E 


03 


72 


3F 


OB 


67 


40 


02 or 83 


73 


41 


OA 


68 


42 


01 


74 


43 


09 


69 


44 


77 


95 


45 


7E 


100 


46 


6C 


91 


47 


75 


96 


48 


7D 


101 


49 


7B 


107 


4A 


6B 


92 


4B 


73 


97 


4C 


74 


102 


4D 


79 


108 


4E 


69 


93 


4F 


72 


98 


50 


7A 


103 


51 


70 


99 


52 


71 


104 


53 


7F or 84 


105 


54 



(Part 2 of 2) 



Scan-Code Translation Table 



System Board 1-35 



The following scan codes are reserved. 



Keyboard Scan Code 


Key 


System Scan Code 


60 


R 


55 


61 


R 


56 


78 


R 


57 


07 


R 


58 


OF 


R 


59 


17 


R 


5A 


IF 


R 


5B 


27 


R 


50 


2F 


R 


5D 


37 


R 


5E 


3F 


R 


5F 


47 


R 


60 


4F 


R 


61 


56 


R 


62 


5E 


R 


63 


08 


R 


64 


10 


R 


65 


18 


R 


66 


20 


R 


67 


28 


R 


68 


30 


R 


69 


38 


R 


6A 


40 


R 


6B 


48 


R 


60 


50 


R 


6D 


57 


R 


6E 


6F 


R 


6F 


13 


R 


70 


19 


R 


71 


39 


R 


72 


51 


R 


73 


53 


R 


74 


5C 


R 


75 


5F 


R 


76 


62 


R 


77 


63 


R 


78 


64 


R 


79 


65 


R 


7A 


67 


R 


7B 


68 


R 


70 


6A 


R 


7D 


6D 


R 


7E 


6E 


R 


7F 



Scan-Code Translation Table 



1-36 System Board 



Sending Data to the Keyboard 

Data is sent to the keyboard in the same serial format used to 
receive data from the keyboard. A parity bit is automatically 
inserted by the keyboard controller. If the keyboard does not 
start clocking the data out of the keyboard controller within 15 
milliseconds or complete that clocking within 2 milliseconds, a 
hex FE is placed in the keyboard controller's output buffer, and 
the transmit time-out error bit is set in the status register. The 
keyboard is required to respond to all transmissions. If the 
response contains a parity error, a hex FE is placed in the 
keyboard controller's output buffer, and the transmit time-out 
and parity error bits are set in the status register. The keyboard 
controller is programmed to set a time limit for the keyboard to 
respond. If 25 milliseconds are exceeded, the keyboard controller 
places a hex FE in its output buffer and sets the transmit and 
receive time-out error bits in the status register. No retries will be 
made by the keyboard controller for any transmission error. 



Inhibit 

The keyboard interface may be inhibited by a key-controlled 
hardware switch, although all transmissions to the keyboard will 
be allowed, regardless of the state of the switch. The keyboard 
controller tests data received from the keyboard to determine if 
the byte received is a command response or a scan code. If the 
byte is a command response, it is placed in the keyboard 
controller's output buffer. If the byte is a scan code, it is ignored. 



Keyboard Controller System Interface 

The keyboard controller communicates with the system through a 
status register, an output buffer, and an input buffer. The 
following figure is a block diagram of the keyboard interface. 



System Board 1-37 



Data h<- 
Bus 



Status 
Register 



Processor 



Input 
Buffer 



Output 
Buffer 



128 Byte 
RAM 



2Kby 8 
ROM 



- RAM on ttie System Board 
-Manufacturing Mode 
-Display Type 

-Keyboard Inhibited 



-System Reset 
-Gate A20 

- + Output Buffer Full 
-+ Input Buffer Empty 

- Keyboard Clock 



Keyboard Data - 



Status Register 

The status register is an 8-bit read-only register at I/O address 
hex 64. It has information about the state of the keyboard 
controller (8042) and interface. It may be read at any time. 



Status-Register Bit Definition 



Bit Output Buffer Full — A indicates that the keyboard 

controller's output buffer has no data. A 1 indicates that 
the controller has placed data into its output buffer but 
the system has not yet read the data. When the system 
reads the output buffer (I/O address hex 60), this bit will 
return to a 0. 

Bit 1 Input Buffer Full — A indicates that the keyboard 

controller's input buffer (I/O address hex 60 or 64) is 



1-38 System Board 



empty. A 1 indicates that data has been written into the 
buffer but the controller has not read the data. When the 
controller reads the input buffer, this bit will return to 0. 

Bit 2 System Flag — This bit may be set to or 1 by writing to 
the system's flag bit in the keyboard controller's 
command byte. It is set to after a power on reset. 

Bit 3 Command/Data — The keyboard controller's input buffer 
may be addressed as either I/O address hex 60 or 64. 
Address hex 60 is defined as the data port, and address 
hex 64 is defined as the command port. Writing to 
address hex 64 sets this bit to 1 ; writing to address hex 60 
sets this bit to 0. The controller uses this bit to determine 
if the byte in its input buffer should be interpreted as a 
command byte or a data byte. 

Bit 4 Inhibit Switch — This bit is updated whenever data is 
placed in the keyboard controller's output buffer. It 
reflects the state of the keyboard-inhibit switch. A 
indicates the keyboard is inhibited. 

Bit 5 Transmit Time-Out — A 1 indicates that a transmission 
started by the keyboard controller was not properly 
completed. If the transmit byte was not clocked out 
within the specified time limit, this will be the only error. 
If the transmit byte was clocked out but a response was 
not received within the programmed time limit, the 
transmit time-out and receive time-out error bits are set 
On. If the transmit byte was clocked out but the response 
was received with a parity error, the transmit time-out 
and parity error bits are set On. 

Bit 6 Receive Time-Out — A 1 indicates that a transmission was 
started by the keyboard but did not finish within the 
programmed receive time-out delay. 

Bit 7 Parity Error — A indicates the last byte of data received 
from the keyboard had odd parity. A 1 indicates the last 
byte had even parity. The keyboard should send with odd 
parity. 



System Board 1-39 



Output Buffer 

The output buffer is an 8 -bit read-only register at I/O address 
hex 60. The keyboard controller uses the output buffer to send 
scan codes received from the keyboard, and data bytes requested 
by command to the system. The output buffer should be read 
only when the output buffer's full bit in the status register is 1. 



Input Buffer 

The input buffer is an 8 -bit write-only register at I/O address hex 
60 or 64. Writing to address hex 60 sets a flag, that indicates a 
data write; writing to address hex 64 sets a flag, indicating a 
command write. Data written to I/O address hex 60 is sent to the 
keyboard, unless the keyboard controller is expecting a data byte 
following a controller command. Data should be written to the 
controller's input buffer only if the input buffer's full bit in the 
status register is equal to 0. The following are valid keyboard 
controller commands. 



Commands (I/O Address hex 64) 



20 Read Keyboard Controller's Command Byte — The 

controller sends its current command byte to its output 
buffer. 

60 Write Keyboard Controller's Command Byte — The next 

byte of data written to I/O address hex 60 is placed in 
the controller's command byte. Bit definitions of the 
command byte are as follows: 

Bit 7 Reserved — Should be written to a 0. 

Bit 6 IBM Personal Computer Compatibility 
Mode — Writing a 1 to this bit causes the 
controller to convert the scan codes received 
from the keyboard to those used by the IBM 



1-40 System Board 



Personal Computer. This includes converting a 
two-byte break sequence to the one-byte IBM 
Personal Computer format. 

Bit 5 IBM Personal Computer Mode — Writing a 1 to 
this bit programs the keyboard to support the 
IBM Personal Computer keyboard interface. In 
this mode the controller does not check parity or 
convert scan codes. 

Bit 4 Disable Keyboard — Writing a 1 to this bit 

disables the keyboard interface by driving the 
' clock ' line low. Data is not sent or received. 

Bit 3 Inhibit Override — Writing a 1 to this bit disables 
the keyboard inhibit function. 

Bit 2 System Flag — The value written to this bit is 
placed in the system flag bit of the controller's 
status register. 

Bit 1 Reserved — Should be written to a 0. 

Bit Enable Output-Buffer-Full Interrupt — Writing a 
1 to this bit causes the controller to generate an 
interrupt when it places data into its output 
buffer. 

AA Self -Test — This commands the controller to perform 

internal diagnostic tests. A hex 55 is placed in the output 
buffer if no errors are detected. 

AB Interface Test — This commands the controller to test the 
keyboard clock and data lines. The test result is placed in 
the output buffer as follows: 

00 No error detected. 

01 The ' keyboard clock ' line is stuck low. 

02 The ' keyboard clock ' line is stuck high. 

03 The ' keyboard data ' line is stuck low. 



System Board 1-41 



04 The ' keyboard data ' line is stuck high. 

AC Diagnostic Dump — Sends 16 bytes of the controller's 
RAM, the current state of the input port, the current 
state of the output port, and the controller's program 
status word to the system. All items are sent in scan-code 
format. 

AD Disable Keyboard Feature — This command sets bit 4 of 
the controller's command byte. This disables the 
keyboard interface by driving the clock line low. Data 
will not be sent or received. 

AE Enable Keyboard Interface — This command clears bit 4 
of the command byte, which releases the keyboard 
interface. 

CO Read Input Port — This commands the controller to read 
its input port and place the data in its output buffer. This 
command should be used only if the output buffer is 
empty. 

DO Read Output Port — This command causes the controller 
to read its output port and place the data in its output 
buffer. This command should be issued only if the output 
buffer is empty. 

Dl Write Output Port — The next byte of data written to I/O 
address hex 60 is placed in the controller's output port. 

Note; Bit of the controller's output port is 
connected to System Reset. This bit should not be 
written low. 

EO Read Test Inputs — This command causes the controller 
to read its TO and Tl inputs. This data is placed in the 
output buffer. Data bit represents TO, and data bit 1 
represents Tl. 

FO-FF Pulse Output Port — Bits through 3 of the controller's 
output port may be pulsed low for approximately 6 
microseconds. Bits through 3 of this command indicate 



1-42 System Board 



which bits are to be pulsed. A indicates that the bit 
should be pulsed, and a 1 indicates the bit should not be 
modified. 

Note: Bit of the controller's output port is 
connected to System Reset. Pulsing this bit resets the 
microprocessor. 



I/O Ports 

The keyboard controller has two 8-bit I/O ports and two test 
inputs. One of the ports is assigned for input and the other for 
output. The controller uses the test inputs to read the state of the 
keyboard's ' clock ' line and the keyboard's ' data ' line. 



System Board 1-43 



The following figures show bit definitions for the input, output, 
and test-input ports. 



BitO 


Undefined 


Bill 


Undefined 


Bit 2 


Undefined 


Bits 


Undefined 


Bit 4 


RAM on the system board 




= Disable 2nd 256Kb of systenn board RAM 




1 = Enable 2nd 256Kb of systenn board RAM 


Bit 5 


Manufacturing jumper 




= Manufacturing jumper installed 




1 = Jumper not installed' 


Bite 


Display type switch 




= Primary display attached to Color/Graphics adapter 




1 = Primary display attached to Monochrome adapter 


Bit? 


Keyboard inhibit switch 




= Keyboard inhibited 




1 = Keyboard not inhibited 



Input-Port Definitions 



BitO 


System reset 


Bit 1 


Gate A20 


Bit 2 


Undefined 


Bits 


Undefined 


Bit 4 


Output buffer full 


Bit 5 


Input buffer empty 


Bite 


Keyboard clock (output) 


Bit? 


Keyboard data (output) 



Output-Port Bit Definitions 



TO 
T1 



Keyboard clock (input) 
Keyboard data (input) 



Test-Input Port Bit Definitions 



1-44 System Board 



Real-time Clock/Complementary Metal Oxide 
Semiconductor (RT/CMOS) RAM 
Information 

The RT/CMOS RAM chip (Motorola MC146818) contains the 
real-time clock and 64 bytes of CMOS RAM. The internal clock 
circuitry uses 14 bytes of this RAM, and the rest is allocated to 
configuration information. The following figure shows the CMOS 
RAM addresses. 



Addresses 


Description 


00-OD 


* Real-time clock information 


OE 


* Diagnostic status byte 


OF 


* Shutdown status byte 


10 


Diskette drive type byte - drives A and B 


11 


Reserved 


12 


Fixed disk type byte - drives C and D 


13 


Reserved 


14 


Equipment byte 


15 


Low base memory byte 


16 


High base memory byte 


17 


Low expansion memory byte 


18 


High expansion memory byte 


19-2D 


Reserved 


2E-2F 


2-byte CMOS checksum 


30 


* Low expansion memory byte 


31 


* High expansion memory byte 


32 


* Date century byte 


33 


* Information flags (set during power on) 


34-3F 


Reserved 



CMOS RAM Address Map 



* These bytes are not included in the checksum calculation and 
are not part of the configuration record. 



Real-time Clock Information 

The following figure describes real-time clock bytes and specifies 
their addresses. 



System Board 1-45 



Byte 


Function 


Address 





Seconds 


00 


1 


Second alarnn 


01 


2 


Minutes 


02 


3 


Minute alarm 


03 


4 


Hours 


04 


5 


Hour alarm 


05 


6 


Day of week 


06 


7 


Date of month 


07 


8 


Month 


08 


9 


Year 


09 


10 


Status Register A 


OA 


11 


Status Register B 


OB 


12 


Status Register C 


OC 


13 


Status Register D 


OD 



Real-Time Clock Information (addresses 0(M)D) 



Note: The setup program initializes registers A, B, C, and D 
when the time and date are set. Also Interrupt 1 A is the 
BIOS' interface to read/set the time and date. It initializes the 
status bytes the same as the Setup program. 



Status Register A 



Bit? 



Update in Progress (UIP) — A 1 indicates the 
time update cycle is in progress. A indicates 
the current date and time is available to read. 



Bit 6"Bit 4 22-Stage Divider (DV2 through DVO)— These 

three divider-selection bits identify which 
time-base frequency is being used. The system 
initializes the stage divider to 010, which selects a 
32.768kHz time base. 

Bit 3-Bit Rate Selection Bits (RS3 through RSO) — These 

bits allow the selection of a divider output 
frequency. The system initializes the rate 
selection bits to 01 10, which selects a 1.024kHz 
square wave output frequency and a 976.562 
microsecond periodic interrupt rate. 



1-46 System Board 



Status Register B 

Bit 7 Set — A updates the cycle normally by 

advancing the counts at one-per-second. A 1 
aborts any update cycle in progress and the 
program can initiaUze the 14 time-bytes without 
any further updates occurring until a is written 
to this bit. 

Bit 6 Periodic Interrupt Enable (PIE) — This bit is a 

read/ write bit that allows an interrupt to occur at 
a rate specified by the rate and divider bits in 
register A. A 1 enables an interrupt, and a 
disables it. The system initializes this bit to 0. 

Bit 5 Alarm Interrupt Enable (AIE) — A 1 enables the 

alarm interrupt, and a disables it. The system 
initializes this bit to 0. 

Bit 4 Update-Ended Interrupt Enabled (UIE)— A 1 

enables the update-ended interrupt, and a 
disables it. The system initializes this bit to 0. 

Bit 3 Square Wave Enabled (SQWE) — A 1 enables the 

the square-wave frequency as set by the rate 
selection bits in register A, and a disables the 
square wave. The system initializes this bit to 0. 

Bit 2 Date Mode (DM) — This bit indicates whether 

the time and date calendar updates are to use 
binary or binary coded decimal (BCD) formats. 
A 1 indicates binary, and a indicates BCD. The 
system initializes this bit to 0. 

Bit 1 24/12 — This bit establishes whether the hours 

byte is in the 24-hour or 12-hour mode. A 1 
indicates the 24-hour, mode and a indicates the 
12-hour mode. The system initializes this bit to 
1. 



System Board 1-47 



Bit Daylight Savings Enabled (DSE) — A 1 enables 

daylight savings and a disables daylight savings 
(standard time). The system initializes this bit to 
0. 



Register C 

Bit 7-Bit 4 IRQF, PF, AF, UF— These flag bits are read 

only and are affected when the ' AIE ' , ' PIE ' , 
and 'UIE ' interrupts are enabled in register B. 

Bit 3-Bit Reserved 



Register D 

Bit 7 Valid RAM Bit (VRB)— This bit is read only and 

indicates the condition of the contents of the 
CMOS RAM through the power sense pin. A 
low state of the power sense pin indicates that the 
real-time clock has lost its power (battery dead). 
A 1 on the VRB indicates power on the real-time 
clock and a indicates that the real-time clock 
has lost power. 

Bits 6-Bit Reserved 



CMOS RAM Configuration Information 

The following lists show bit definitions for the CMOS 
configuration bytes (addresses hex OE- 3F). 



Diagnostic Status Byte (Hex OE) 

Bit 7 Real-time clock chip has lost power. A 

indicates that the chip has not lost power, and a 1 
indicates that the chip lost power. 



1-48 System Board 



Bit 6 Configuration Record — Checksum Status 

Indicator — A indicates that checksum is good, 
and a 1 indicates it is bad. 

Bit 5 Incorrect Configuration Information — This is a 

check, at power on time, of the equipment byte 
of the configuration record. A indicates that 
the configuration information is vaUd, and a 1 
indicates it is invalid. Power-on checks require: 

• At least one diskette drive to be installed (bit 
of the equipment byte set to 1). 

• The primary display adapter setting in 
configuration matches the system board's 
display switch setting and the actual display 
hardware in the system. 

Bit 4 Memory Size Miscompare — A indicates that 

the power-on check determined the same memory 
size as in the configuration record and a 1 
indicates the memory size is different. 

Bit 3 Fixed Disk Adapter/Drive C Initialization 

Status — A indicates that the adapter and drive 
are functioning properly and the system can 
attempt "boot up." A 1 indicates that the 
adapter and/or drive C failed initialization, which 
prevents the system from attempting to "boot 
up." 

Bit 2 Time Status Indicator — (POST validity check) A 

indicates that the time is valid and a 1 indicates 
that the time is invalid. 

Bit 1-Bit Reserved 



Shutdown Status Byte (Hex OF) 

The bits in this byte are defined by the power on diagnostics. For 
more information about this byte, see "BIOS Listing." 



System Board 1-49 



Diskette Drive Type Byte (Hex 10) 

Bit 7-Bit 4 Type of first diskette drive installed: 

0000 No drive is present. 

0001 Double Sided Diskette Drive (48 TPI) 

0010 High Capacity Diskette Drive (96 TPI) 

Note: 0011 through 1111 are 
reserved. 

Bit 3-Bit Type of second diskette drive installed: 

0000 No drive is present. 

0001 Double Sided Diskette Drive (48 TPI) 

0010 High Capacity Diskette Drive (96 TPI) 

Note: 0011 through 1111 are 
reserved. 

Hex address 11 contains a reserved byte. 



Fixed Disk Type Byte (Hex 12) 

Bit 7-Bit 4 Defines the type of first fixed disk drive installed 
(drive C): 

0000 No fixed disk drive is present. 

0001 through 1111 define type 1 through type 15 
(see BIOS listing at label FD TBL). 

Bit 3-Bit Defines the type of second fixed disk drive 

installed (drive D): 

0000 No fixed disk drive is present. 



1-50 System Board 



0001 through 1111 define type 1 through type 15 
(see BIOS listing at label FD TBL). 

The following figure shows the BIOS fixed disk parameters. 



Type 


Cylinders 


Heads 


Write 
Pre-comp 


Landing 
Zone 


1 


306 


4 


128 


305 


2 


615 


4 


300 


615 


3 


615 


6 


300 


615 


4 


940 


8 


512 


940 


5 


940 


6 


512 


940 


6 


615 


4 


no 


615 


7 


462 


8 


256 


511 


8 


733 


5 


no 


733 


9 


900 


15 


no8 


901 


10 


820 


3 


no 


820 


11 


855 


5 


no 


855 


12 


855 


7 


no 


855 


13 


306 


8 


128 


319 


14 


733 


7 


no 


733 


15 


Reserved- -se 


3t to zeros 







BIOS Fixed Disk Parameters 

Hex address 13 contains a reserved byte. 

Equipment Byte (Hex 14) 

Bit 7-Bit 6 Indicates the number of diskette drives installed: 

00 1 drive 

01 2 drives 

10 Reserved 

11 Reserved 
Bit 5-Bit 4 Primary display 

00 Reserved 



System Board 1-51 



01 Primary display is attached to the 

Color/Graphics Monitor Adapter in the 
40-column mode. 

10 Primary display is attached to the 
Color/Graphics Monitor Adapter in the 
80-column mode. 

1 1 Primary display is attached to the 
Monochrome Display and Printer Adapter. 

Bit 3-Bit 2 Not used. 

Bit 1 Math Coprocessor presence bit: 

Math Coprocessor not installed. 

1 Math Coprocessor installed. 

Bit The set condition of this bit indicates that 

diskette drives are installed. 

Note: The equipment byte defines basic equipment in the 
system for power-on diagnostics. 

Low and High Base Memory Bytes (Hex 15 and 16) 

Bit 7-Bit Address hex 15 — Low-byte base size 

Bit 7-Bit Address hex 16 — High-byte base size 

Valid Sizes: 

OlOOH 256Kb system-board RAM 

0200H 5 1 2Kb system-board RAM 

0280H 640Kb 5 1 2Kb system board RAM 
and the IBM Personal Computer AT 
128KB Memory Expansion Option 



1-52 System Board 



Low and High Memory Expansion Bytes (Hex 17 and 18) 

Bit 7-Bit Address hex 17 — Low-byte expansion size 

Bit 7-Bit Address hex 18 — High-byte expansion size 

Valid Sizes: 

0200H 5 1 2Kb I/O adapter 

0400H 1024Kb I/O adapter (2 adapters) 

600H 1536Kb I/O adapter (3 adapters) 

to 

3C00H 15360Kb I/O adapter (15Mb 
maximum) 

Hex addresses 19 through 2D are reserved. 

Checksum (Hex 2E and 2F) 

Address hex 2E High byte of checksum 
Address hex 2F Low byte of checksum 

Note: Checksum is on addresses hex 10-20. 

Low and High Expansion Memory Bytes (Hex 30 and 31) 
Bit 7-Bit Address hex 30 — Low-byte expansion size 

Bit 7-Bit Address hex 3 1 — High-byte expansion size 

Valid Sizes: 

0200H 5 1 2Kb I/O adapter 
0400H 1024Kb I/O adapter 

System Board 1-53 



0600H 1536Kb I/O adapter 

to 

3C00H 15360Kb I/O adapter (15Mb 
maximum) 

Note: This word reflects the total expansion memory above 
the 1Mb address space as determined at power-on time. This 
expansion memory size can be determined through system 
interrupt 15 (see the BIOS Hsting). The base memory at 
power-on time is determined through the system 
memory-size-determine interrupt. 



Date Century Byte (Hex 32) 

Bit 7-Bit BCD value for the century (BIOS interface to 

read and set). 



Information Flag (Hex 33) 

Bit 7 Set if the IBM Personal Computer AT 128KB 

Memory Expansion Option is installed. 

Bit 6 This bit is used by the Setup utility to put out a 

first user message after initial setup. 

Bit 5-Bit Reserved 

Note: Hex addresses 34 through 3F are reserved. 

I/O Operations 

Writing to CMOS RAM involves two steps: 

1 . OUT to port hex 70 with the CMOS address that will be 
written to. 

2. OUT to port hex 7 1 with the data to be written. 



1-54 System Board 



Reading CMOS RAM also requires two steps: 

1. OUT to port hex 70 with the CMOS address that is to be read 
from. 

2. IN from port hex 71, and the data read is returned in the AL 
register. 



Specifications 

System Unit 
Size 

• Length: 540 miUimeters (21.3 inches) 

• Depth: 439 miUimeters (17.3 inches) 

• Height: 162 miUimeters (6.8 inches) 

Weight 

• 19.05 kilograms (42 pounds) 

Power Cables 

• Length: 1.8 meters (6 feet) 



System Board 1-55 



Envfronment 

• Air Temperature 

- System On: 15.6 to 32.2 degrees C (60 to 90 degrees F) 

- System Off: 10 to 43 degrees C (50 to 1 10 degrees F) 

• Humidity 

- System On: 8% to 80% 

- System Off: 20% to 80% 

• Altitude 

- Maximum altitude: 2133.6 meters (7000 feet) 

Heat Output 

• 1229 British Thermal Units per hour 

Noise Level 

• Meets Class 3 ; 42 decibels average-noise rating 

Electrical 

. VA — 450 

• Range 1 

- Nominal - 1 15 Vac 

- Minimum - 100 Vac 

1-56 System Board 



- Maximum - 125 Vac 
• Range 2 

- Nominal - 230 Vac 

- Minimum - 200 Vac 

- Maximum - 240 Vac 

Connectors 

The system board has the following connectors: 

Speaker connector (J19) 

Two power-supply connectors (PS8 and PS9) 

Keyboard connector (J9) 

Power LED and keylock connector (J20) 

Battery connector (J21) 

The speaker connector is a 4-pin, keyed, Berg strip. The pin 
assignments follow. 



Pin 


Function 


1 
2 
3 
4 


Data out 
Key 
Ground 
+5Vdc 



Speaker Connector (J19) 



The pin assignments for power-supply connectors, P8 and P9, are 
as follows: 



System Board 1-57 



Pin 


Assignments 


Connector 


1 


Power good 




2 


+5Vdc 




3 


+12Vdc 


PS8 


4 


-12Vdc 




5 


Ground 




6 


Ground 




1 


Ground 




2 


Ground 




3 


-5Vdc 


PS9 


4 


+5Vdc 




5 


+5Vdc 




6 


+5Vdc 





Power Supply Connectors 

The keyboard connector is a 5 -pin, 90-degree Printed Circuit 
Board (PCB) mounting, DIN connector. The pin assignments are 
as follows: 



Pin 


Assignments 


1 
2 
3 
4 
5 


Keyboard clock 
Keyboard data 
Spare 
Ground 
+5Vdc 



Keyboard Connector (J22) 

The power LED and keylock connector is a 5-pin Berg strip. Its 
pin assignments follow: 



Pin 


Assignments 


1 
2 
3 
4 
5 


LED Power 

Key 

Ground 

Keyboard inhibit 

Ground 



Power LED and Keylock Connector (J20) 

The battery connector is a 4-pin, keyed, Berg strip. The pin 
assignments follow: 



1-58 System Board 



Pin 


Assignments 


1 
2 
3 

4 


Ground 
Not Used 
Not Used 
6Vdc. 



Battery Connector ( J21 ) 



System Board 1-59 



The following figure shows the layout of the system board. 



TYPE OF POWER 

REAR PANEL ^^TTERY K^^BOARD DISPLAY SUPPLY 

CONNECTOR CONNECTOR SWITCH CONNECTORS 




POWER LED 
AND KEYLOCK 
CONNECTOR 



System Board Layout 



1-60 System Board 



Logic Diagrams 




CM 
CM 



0) 
O 

(0 



CD 
O 
CD 

E 

0) 

*^ 

Hi 

>. 
0) 



System Board 1-61 



9\ 


(SHT1) 


-RESET 


K> 


(SHT3) 


-PROCCLK 


^ 


(SHT 6) 


CMDLY 


(SHT1) 


SO 


VI 


(SHT1) 


SI 


^ 


(SHT1) 


READY 


ft 


(SHT1) 


PROCCLK 


s 


(SHT1) 


M/IO 


(SHT1) 


CPU HLDA 


f 


(SHT 12) 


-CNTL OFF 







































1*"^ o 




-: 


lOK T lOK lOK 












1 r 










8228B 










7 


-CMDLY RrdT 
SO MUTC 


,B 






-5 






M 








3 


'2 




^ J 


10 






1 




!owc 


?ll 






7 




2 




'l? 






12 T 


18 


M/iO ALE 
CENL U83 
MB DEN 
AEN/CEN DT/R 
«CCND 


■5 












ll. 














b 


16 










19 


17 










+ ■5 n 


20 










r^'^ 






T 

.0H7PF-^ 




12 


•^ USI " 
















!'" 






,1 


8 








1 , Fin 
















^ 


U,-j \,I2 








' — tffir 




















1"' 










ALS04 




' ■ FIO 

1^ . 






4 






" iotNo'^ 






^ 




















^ 


ALSOM 






LS6Mb 










"fio^>o'° 


3 


DIR 

G 

CBA 

S8A 

CAB 

SAB 

A U67 B 


20 






21^ 












1 






23 = 










22 
































1 2 








































18 














7 


17 














8 


16 














9 


n 














10 


m 














II 


13 


























J. 


1 


















ALSZitS 










1 


DIR 

G 

A B 

A B 

A B 

A ^''*' B 
A B 
A B 
A B 










r 19. 








2" 










3 


17 












16 










15 




















13 










12 








9 






















DT/R 9 


FIO 
"u97\8 










LSAO 10 






LSAO II 


U97;, 





























-ME MR 


(SHT 10,15.19,21) 


-MEMW 


(SHT 6,7,1 5,1 9) 


-lOR 


(SHT 6,1 5,20) 


-low 


(SHT15,20S 


-INTA 


(SHT 3,4,13,16,21) 


ALE 


(SHT 4,5,6) 



SDI3 

som 

SDIS 



(SHT 6,13,20) 
(SHT 7,10) 



System Board (Sheet 2 of 22) 



C/5 

B 

o 
a. 



(SHT5) 


XA? 


(SHT15) 


XAO 


(SHT15) 


-XIOW 


(SHT4) 


5M/I0 


(SHT13) 


-CS287 


(SHT 2) 


- INTA 


(SHT1) 


- BUSY 


(SHT1) 


-ERROR 


(SHTI) 


+RESET 



(SHT 17) +ENA 10 CK 



(SHT 20) -10 CH CI 




(SHTI) 
(SHTI 3) 
(SHT 5) 
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+RAM 3 RAS (SHT 7) 

-RAM CAS (SHT 6,7) 

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-RASI (SHT8) 



-RAS 3 (SHT 9) 



-CASOL (SHT 8) 



-CAS OH (SHT 8) 



-CASIL (SHT 9) 



-CAS I H (SHT 9) 



-XAO (SHT 10) 



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MDPINI 


(SHT 6) 


MDO 



(SHT 4) 

(SHT 21) -REFRESH 

(SHT 4) SAO 

(SHT 21) + REFRESH 



(SHT 7) ADDR SEL 



(SHT 7) -RASO 

(SHT 7) -CASOL 

(SHT 7) -CA50H 

(SHT 7) -RASI 




- MDPOUT (SHT 9,10} 



(SHT 9) 



DECOUPLING caps: 


VOLTAGE 
TO GND 


BANK: 




1 


+S 


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9-.I0UF 


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32,38,42,47, 
C8, 12,17,21,29, 
33,39,43,48 



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System Board (Sheet 8 of 22) 



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MD3 ■ 

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(SHT10) 
(SHT 10) 
(SHT 8) 
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MDPINI — 
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, IOuF: 09,13,18,22,30 
34,40,44, H9 
CIO, 14, 19, 23. 31 
35,41,45,50 






System Board (Sheet 9 of 22) 



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--T/C CS (SHT 16) 

--PPICS (SHT 18) 

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(SHT 7) 


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(SHT 71 


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(SHT 31 


5YSCLK 




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OSC 




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T/C 




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RESET DRV 




(SHT 21) 


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(SHT 14) 


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• IRQ 6 

- IRQ 7 



- DRQ I 
■ DRQ2 

- 0RQ3 



(SHT 14) 
(SHT 14) 
(SHT 14) 



POWER GOOD 
+ 5 VDC 
+ 12 VDC 
-12 VDC 
GND 
GND 



GND 
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SECTION 2. COPROCESSOR 



Contents 

Description 2-3 

Programming Interface 2-3 

Hardware Interface 2-4 



Coprocessor 2-1 



Notes: 



2-2 Coprocessor 



Description 



The IBM Personal Computer AT Math Coprocessor enables the 
IBM Personal Computer AT to perform high-speed arithmetic, 
logarithmic functions, and trigonometric operations with extreme 
accuracy. 

The coprocessor works in parallel with the microprocessor. The 
parallel operation decreases operating time by allowing the 
coprocessor to do mathematical calculations while the 
microprocessor continues to do other functions. 

The coprocessor works with seven numeric data types, which are 
divided into the following three classes: 

• Binary integers (3 types) 

• Decimal integers ( 1 type) 

• Real numbers (3 types) 



Programming Interface 



The coprocessor offers extended data types, registers, and 
instructions to the microprocessor. 

The coprocessor has eight 80-bit registers, which provide the 
equivalent capacity of the 40 16-bit registers in the 
microprocessor. This register space allows constants and 
temporary results to be held in registers during calculations, thus 
reducing memory access and improving speed as well as bus 
availability. The register space can be used as a stack or as a fixed 
register set. When used as a stack, only the top two stack 
elements are operated on. The following figure shows 
representations of large and small numbers in each data type. 



Coprocessor 2-3 



Data Type 


Bits 


Significant 

Digits 

(Decimal) 


Approximate Range (Decimal) 


Word Integer 


16 


4 


-32,768< X <+32,767 


Short Integer 


32 


9 


-2x109< X <+2x109 


Long Integer 


64 


19 


-9x10l8<x<+9x10l8 


Packed Decimal 


80 


18 


-99...99< x <+99...99 (18 digits) 


Short Real * 


32 


6-7 


8.43x10-37< X <3.37x1038 


Long Real * 


64 


15-16 


4.19x10-307< X <1.67x 10308 


Temporary Real 


80 


19 


3.4x10-4932< X <1.2x 10^932 



Data Types 

* The Short and Long data types correspond to the single and 
double precision data types. 



Hardware Interface 



The math coprocessor uses the same clock generator as the 
microprocessor. It works at one-third the frequency of the system 
microprocessor clock. The coprocessor is wired so that it 
functions as an I/O device through I/O port addresses hex OOFS, 
OOF A, and OOFC. The microprocessor sends OP codes and 
operands through these I/O ports. The microprocessor also 
receives and stores results through the same I/O ports. The 
coprocessor's busy signal informs the microprocessor that it is 
executing; the microprocessor's Wait instruction forces the 
microprocessor to wait until the coprocessor is finished executing. 

The coprocessor detects six different exception conditions that 
can occur during instruction execution. If the appropriate 
exception mask within the coprocessor is not set, the coprocessor 
sets its error signal. This error signal generates a hardware 
interrupt (interrupt 13) and causes the 'BUSY' signal to the 
coprocessor to be held in the busy state. The ' BUSY ' signal may 
be cleared by an 8-bit I/O Write command to address hex FO 
with DO through D7 equal to 0. 

The power-on-self test code in the system ROM enables 
hardware interrupt 13 and sets up its vector to point to a routine 
in ROM. The ROM routine clears the 'BUSY' signal's latch and 



2-4 Coprocessor 



then transfers control to the address pointed to by the NMI 
interrupt vector. This allows code written for any IBM Personal 
Computer to work on an IBM Personal Computer AT. The NMI 
interrupt handler should read the coprocessor's status to 
determine if the NMI was caused by the coprocessor. If the 
interrupt was not generated by the coprocessor, control should be 
passed to the original NMI interrupt handler. 

The coprocessor has two operating modes similar to the two 
modes of the microprocessor. When reset by a power-on reset or 
an I/O write operation to port hex OOFl, the coprocessor is in the 
real address mode. This mode is compatible with the 8087 Math 
Coprocessor used in other IBM Personal Computers. The 
coprocessor can be placed in the protected mode by executing the 
SETPM ESC instruction. It can be placed back in the real mode 
by an I/O write operation to port hex OOFl, with D7 through DO 
equal to 0. 

The coprocessor instruction extensions to the microprocessor can 
be found in Section 6 of this manual. 

Detailed information for the internal functions of the Intel 80287 
coprocessor can be found in books listed in the Bibliography. 



Coprocessor 2-5 



Notes: 



2-6 Coprocessor 



SECTION 3. POWER SUPPLY 



Contents 

Inputs 3-3 

Outputs 3-3 

Output Protection 3-4 

Dummy Load 3-4 

Output Voltage Sequencing 3-4 

No-Load Operation 3-5 

Power-Good Signal 3-5 

Fan-Out 3-6 

Connectors 3-6 



Power Supply 3-1 



Notes: 



3-2 Power Supply 



The system's power supply is contained inside of the system unit 
and provides power for the system board, the adapters, the 
diskette drives, the fixed disk drives, the keyboard, and the IBM 
Monochrome Display. 



Inputs 



The power supply can operate at a frequency of either 60 ± 3 Hz 
or 50 ±3 Hz and it can operate at 110 Vac, 5 A or 220/240 Vac, 
2.5 A. The voltage is selected with the switch above the 
power-cord plug at the rear of the power supply. The following 
figure shows the input requirements. 



Range 


Voltage (Vac) 


Current (Amperes) 


115 Vac 
230 Vac 


Minimum 100 
Maximum 125 

Minimum 200 
Maximum 240 


Maximum 5 
Maximum 3.0 



Input Requirements 



Note: The maximum in-rush current is 100 A. 



Outputs 



The power supply provides +5, -5, + 12, and -12 Vdc. The 
following figure shows the load current and regulation tolerance 
for the voltages. 

Note: The power supply also supplies either 115 Vac or 230 
Vac for the IBM Monochrome Display. 



Power Supply 3-3 



IMominal 


Load Current (A) 


Regulation 


Output 




Tolerance 




Min 


Max 




+5Vdc 


7.0 


19.8 


+5% to -4% 


-5Vdc 


0.0 


0.3 


+10% to -8% 


+12Vdc 


2.5 


7.3 


+5% to -4% 


-12Vdc 


0.0 


0.3 


+10% to -9% 



DC Load Requirements 



Output Protection 



If any output becomes overloaded, the power supply will switch 
off within 20 milliseconds. An overcurrent condition will not 
damage the power supply. 



Dummy Load 



If no fixed disk drive is connected to the power supply, the 
Dummy Load must be connected to PIO. The Dummy Load is a 
5 ohm, 50 watt resistor. 



Output Voltage Sequencing 



Under normal conditions, the output voltage levels track within 
300 milliseconds of each other when power is applied to, or 
removed from the power supply, provided at least minimum 
loading is present. 



3-4 Power Supply 



No-Load Operation 



No damage or hazardous conditions occur when primary power is 
applied with no load on any output level. In such cases, the 
power supply may switch off, and a power/on cycle will be 
required. The power supply requires a minimum load for proper 
operation. 



Power-Good Signal 



The power supply provides a ' power-good ' signal to indicate 
proper operation of the power supply. 

When the supply is switched off for a minimum of 1 second and 
then switched on, the ' power-good ' signal is generated, assuming 
there are no problems. This signal is a logical AND of the dc 
output-voltage sense signal and the ac input-voltage sense signal. 
The power-good signal is also a TTL-compatible high level for 
normal operation, or a low level for fault conditions. The ac fail 
signal causes power-good to go to a low level at least 1 
millisecond before any output voltage falls below the regulation 
limits. The operating point used as a reference for measuring the 
1 millisecond is normal operation at minimum line voltage and 
maximum load. 

The dc output- voltage sense signal holds the ' power-good signal ' 
at a low level when power is switched on until all output voltages 
have reached their minimum sense levels. The ' power-good 
signal ' has a turn-on delay of at least 100 milliseconds but not 
longer than 500 miUiseconds. The following figure shows the 
minimum sense levels for the output voltages. 



Power Supply 3-5 



Level (Vdc) 


Minimum (Vdc) 


+5 
-5 
+12 
-12 


+4.5 
-3.75 
+10.8 
-10.4 



Sense Levels 



Fan-Out 



Fan-out is the number of inputs that one output can drive. The 
'power-good ' signal can drive six standard TTL loads. 



Connectors 



The following figure shows the pin assignments for the 
power-supply output connectors. 



3-6 Power Supply 



Load Point 


Voltage (Vdc) 


Max. Current (A) 


PS8-1 


Power Good 


See note 


PS8-2 


+5 


3.8 


PS8-3 


+12 


0.7 


PS8-4 


-12 


0.3 


PS8-5 


Ground 


0.0 


PS8-6 


Ground 


0.0 


PS9-1 


Ground 


0.0 


PS9-2 


Ground 


0.0 


PS9-3 


-5 


0.3 


PS9-4 


+5 


3.8 


PS9-5 


+5 


3.8 


PS9-6 


+5 


3.8 


P10-1 


+12 


2.8 


P10-2 


Ground 


0.0 


P10-3 


Ground 


0.0 


P10-4 


+5 


1.8 


P11-1 


+12 


2.8 


P11-2 


Ground 


0.0 


P1 1-3 


Ground 


0.0 


P1 1-4 


+5 


1.8 


P12-1 


+12 


1.0 


P12-2 


Ground 


0.0 


P12-3 


Ground 


0.0 


P12-4 


+5 


0.6 



DC Load Distribution 



Note: For more details, see ' Power-Good Signal ' . 



Power Supply 3-7 



Notes: 



3-8 Power Supply 



SECTION 4. KEYBOARD 



Contents 

Description 4-3 

Interface 4-3 

Sequencing Key Code Scanning 4-3 

Keyboard Buffer 4-3 

Keys 4-3 

Functions Performed at Power-On Time 4-4 

Power-On Reset 4-4 

Basic Assurance Test 4-4 

Commands from the System 4-5 

Reset (Hex FF) 4-5 

Resend (Hex FE) 4-6 

No-Operation (NOP) (Hex FD through F7) 4-6 

Set Default (Hex F6) 4-6 

Default Disable (Hex F5) 4-6 

Enable (Hex F4) 4-6 

Set Typematic Rate/Delay (Hex F3) 4-7 

No-Operation (NOP) (Hex F2 through EF) 4-8 

Echo (Hex EE) 4-8 

Set/Reset Mode Indicators (Hex ED) 4-8 

Keyboard Outputs 4-10 

Key Scan Codes 4-10 

Command Codes to the System 4-12 

Resend (Hex FE) 4-12 

ACK (Hex FA) 4-12 

Overrun (Hex 00) 4-13 

Diagnostic Failure (Hex FD) 4-13 

Break Code Prefix (Hex FO) 4-13 

BAT Completion Code (Hex AA) 4-13 

ECHO Response (Hex EE) 4-13 



Keyboard 4-1 



Clock and Data Signals 4-14 

Keyboard Data Output 4-15 

Keyboard Data Input 4-15 

Keyboard Layout 4-16 

U.S. English Keyboard 4-17 

U.K. English Keyboard 4-18 

French Keyboard 4-19 

German Keyboard 4-20 

Italian Keyboard 4-21 

Spanish Keyboard 4-22 

Specifications 4-23 

Size 4-23 

Weight 4-23 

Keyboard Connector 4-23 



4-2 Keyboard 



Description 

The keyboard is a low-profile, 84 key, detachable unit. 

Interface 

The keyboard uses a bidirectional serial interface to carry signals 
between the keyboard and system unit. 

Sequencing Key Code Scanning 

The keyboard is able to detect all keys that are pressed, and their 
scan codes will be sent to the interface in correct sequence, 
regardless of the number of keys held down. Keystrokes entered 
while the interface is inhibited (when the keylock is on) will be 
lost. Keystrokes are stored only when the keyboard is not 
serviced by the system. 



Keyboard Buffer 

The keyboard has a 16-character first-in-first-out (FIFO) buffer 
where data is stored until the interface is ready to receive it. 

A buffer-overrun condition will occur if more than sixteen codes 
are placed in the buffer before the first keyed data is sent. The 
seventeenth code will be replaced with the overrun code, hex 00. 
(The 17th position is reserved for overrun codes). If more keys 
are pressed before the system allows a keyboard output, the data 
will be lost. When the keyboard is allowed to send data, the 
characters in the buffer will be sent as in normal operation, and 
new data entered will be detected and sent. 



Keys 

All keys are classified as make /break, which means when a key is 
pressed, the keyboard sends a make code for that key to the 



Keyboard 4-3 



keyboard controller. When the key is released, its break code is 
sent (the break code for a key is its make code preceded by hex 
FO). 

All keys are typematic . When a key is pressed and held down, the 
keyboard continues to send the make code for that key until the 
key is released. The rate at which the make code is sent is known 
as the typematic rate (The typematic rate is described under "Set 
Typematic Rate/Delay"). When two or more keys are held 
down, only the last key pressed repeats at the typematic rate. 
Typematic operation stops when the last key pressed is released, 
even if other keys are still held down. When a key is pressed and 
held down while the interface is inhibited, only the first make 
code is stored in the buffer. This prevents buffer overflow as a 
result of typematic action. 



Functions Performed at Power-On Time 



Power-On Reset 

The keyboard logic generates a POR when power is applied to the 
keyboard. The POR lasts a minimum of 300 milliseconds and a 
maximum of 9 seconds. 

Note: The keyboard may issue a false return during the first 
200 milliseconds after the +5 Vdc is estabhshed at the 90% 
level. Therefore, the keyboard interface is disabled for this 
period. 



Basic Assurance Test 

Immediately following the POR, the keyboard executes a basic 
assurance test (BAT). This test consists of a checksum of all 
read-only memory (ROM), and a stuck-bit and addressing test of 
all random-access memory (RAM) in the keyboard's 
microprocessor. The mode indicators — three Ught emitting diodes 



4-4 Keyboard 



(LEDs) on the upper right-hand corner of the keyboard — are 
turned on then off, and must be observed to ensure they are 
operational. 

Execution of the BAT will take from 600 to 900 milliseconds. 
(This is in addition to the time required for the POR.) 

The BAT can also be started by a Reset command. 

After the BAT, and when the interface is enabled ( ' clock ' and 
' data ' lines are set high), the keyboard sends a completion code 
to the interface — either hex AA for satisfactory completion or 
hex EC (or any other code) for a failure. If the system issues a 
Resend command, the keyboard sends the BAT completion code 
again. Otherwise, the keyboard sets the keys to typematic and 
make/break. 



Commands from the System 



The commands described below may be sent to the keyboard at 
any time. The keyboard will respond within 20 miUiseconds. 

Note: The following commands are those sent by the system. 
They have a different meaning when issued by the keyboard. 



Reset (Hex FF) 

The system issues a Reset command to start a program reset and a 
keyboard internal self -test. The keyboard acknowledges the 
command with an ' acknowledge ' signal ( ACK) and ensures the 
system accepts the ' ACK ' before executing the command. The 
system signals acceptance of the ' ACK ' by raising the clock and 
data for a minimum of 500 microseconds. The keyboard is 
disabled from the time it receives the Reset command until the 
' ACK ' is accepted or until another command overrides the 
previous one. EoUowing acceptance of the ' ACK ' , the keyboard 



Keyboard 4-5 



begins the reset operation, which is similar to a power-on reset. 
The keyboard clears the output buffer and sets up default values 
for typematic and delay rates. 



Resend (Hex FE) 

The system can send this command when it detects an error in 
any transmission from the keyboard. It can be sent only after a 
keyboard transmission and before the system enables the 
interface to allow the next keyboard output. Upon receipt of 
Resend, the keyboard sends the previous output again unless the 
previous output was Resend. In this case, the keyboard will 
resend the last byte before the Resend command. 



No-Operation (NOP) (Hex FD through F7) 

These commands are reserved and are effectively no-operation or 
NOP. The system does not use these codes. If sent, the keyboard 
will acknowledge the command and continue in its prior scanning 
state. No other operation will occur. 



Set Default (Hex F6) 

The Set Default command resets all conditions to the power-on 
default state. The keyboard responds with ' ACK ' , clears its 
output buffer, sets default conditions, and continues scanning 
(only if the keyboard was previously enabled). 



Default Disable (Hex F5) 

This command is similar to Set Default, except the keyboard stops 
scanning and awaits further instructions. 



Enable (Hex F4) 

Upon receipt of this command, the keyboard responds with 
' ACK ' , clears its output buffer, and starts scanning. 



4-6 Keyboard 



Set Typematic Rate/Delay (Hex F3) 

The system issues this command, followed by a parameter, to 
change the typematic rate and delay. The typematic rate and 
delay parameters are determined by the value of the byte 
following the command. Bits 6 and 5 serve as the delay 
parameter and bits 4, 3, 2, 1, and (the least-significant bit) are 
the rate parameter. Bit 7, the most-significant bit, is always 0. 
The delay is equal to 1 plus the binary value of bits 6 and 5 
multiplied by 250 milliseconds ±20%. The period (interval from 
one typematic output to the next) is determined by the following 
equation: 

Period = (8 + A) X (2b) X 0.00417 seconds, where A = binary 
value of bits 2, 1, and and B = binary value of bits 4 and 3. 

The typematic rate (make code per second) is 1 /period. The 
period is determined by the first equation above. The following 
table results. 



Bit Rate 


Bit Rate 


00000 30.0 


10000 7.5 


00001 26.7 


10001 6.7 


00010 24.0 


10010 6.0 


00011 21.8 


10011 5.5 


00100 20.0 


10100 5.0 


00101 18.5 


10101 4.6 


00110 17.1 


10110 4.3 


00111 16.0 


10111 4.0 


01000 15.0 


11000 3.7 


01001 13.3 


11001 3.3 


01010 12.0 


11010 3.0 


01011 10.9 


11011 2.7 


01100 10.0 


11100 2.5 


01101 9.2 


11101 2.3 


01110 8.6 


11110 2.1 


01111 8.0 


11111 2.0 



Typematic Rate 

The keyboard responds to the Set Typematic Rate Delay 
command with an ' ACK ' , stops scanning, and waits for the rate 
parameter. The keyboard responds to the rate parameter with 
another ' ACK ' , sets the rate and delay, and continues scanning 
(if the keyboard was previously enabled). If a command is 
received instead of the rate parameter, the set-typematic-rate 



Keyboard 4-7 



function ends with no change to the existing rate, and the new 
command is processed. However, the keyboard will not resume 
scanning unless instructed to do so by an Enable command. 

The default rate for the system keyboard is as follows: 

The typematic rate =10 characters per second ±20% and the 
delay = 500 ms ±20%. 



No-Operation (NOP) (Hex F2 through EF) 

These commands are reserved and are effectively no-operation 
(NOP). The system does not use these codes. If sent, the 
keyboard acknowledges the command and continues in its prior 
scanning state. No other operation will occur. 



Echo (Hex EE) 

Echo is a diagnostic aide. When the keyboard receives this 
command, it issues a hex EE response and continues scanning if 
the keyboard was previously enabled. 



Set/Reset Mode Indicators (Hex ED) 

Three mode indicators on the keyboard are accessible to the 
system. The keyboard activates or deactivates these indicators 
when it receives a valid command from the system. They can be 
activated or deactivated in any combination. 

It is up to the using system to remember the previous state of an 
indicator. This is in case its setting does not change when a 
command sequence is issued to change the state of another 
indicator. 

The system remembers the previous state of an indicator so that 
its setting does not change when a command sequence is issued to 
change the state of another indicator. 

The command has the following format: 



4-8 Keyboard 



Command 


Options 



Set/Reset Command 



A Set/Reset Mode Indicators command consists of two bytes. 
The first is the command byte and has the following bit setup: 

11101101 -hex ED 

The second byte is an option byte. It has a list of the indicators to 
be acted upon. The format of the option byte is as follows: 



Bit? 


Reserved 


Bit 6 


Reserved 


Bits 


Reserved 


Bit 4 


Reserved 


Bit 3 


Reserved 


Bit 2 


Caps Lock indicator 


Bitl 


Numeric Lock indicator 


BitO 


Scroll Lock indicator 



Note: Bit 7 is the most-significant bit; bit is the 
least-significant. 

The keyboard will respond to the Set/Reset Mode Indicators 
command with an ' ACK ' , discontinue scanning, and wait for the 
option byte. The keyboard will respond to the option byte with 
an Ack, set the indicators, and continue scanning if the keyboard 
was previously enabled. If another command is received in place 
of the option byte, execution of the function of the Set/Reset 
Mode Indicators command is stopped with no change to the 
indicator states, and the new command is processed. Then 
scanning is resumed. 



Keyboard 4-9 



Keyboard Outputs 



Key Scan Codes 

Each key is assigned a unique 8-bit, make, scan code, which is 
sent when the key is pressed. Each key also sends a break code 
when the key is released. The break code consists of two bytes, 
the first of which is the break code prefix, hex FO; the second 
byte is the same as the make scan code for that key. 

The typematic scan code for a key is the same as the key's make 
code. The following figure is a keyboard layout. 



4-10 Keyboard 




Keyboard 4-11 



The following figure lists the positions of the keys and their make 
scan codes. 



Key Positions and Their Make Codes 


1--DE 


18--1D 


36--33 


55— 4A 


90--76 


2--16 


19—24 


37--3B 


56--51 


91—60 


3— IE 


20— 2D 


38- -42 


57--59 


92— 6B 


4—26 


21— 2C 


39--4B 


58--11 


93—69 


5—25 


22—35 


40- -40 


60—19 


94—77 


6— 2E 


23—30 


41 --52 


61—29 


96—75 


7—36 


24—43 


43--5A 


64- -58 


97—73 


8— 3D 


25- -44 


44--12 


65--D6 


98—72 


9--3E 


26--4D 


46--1A 


66— DC 


99—70 


10- -46 


27--54 


47--22 


67--0B 


100— 7E 


11 --45 


28— 5B 


48--21 


68- -OA 


101--7D 


12— 4E 


30—14 


49--2A 


69—09 


102- -74 


13—55 


31—10 


50- -32 


70- -05 


103-7A 


14— 5D 


32— IB 


51--31 


71—04 


104—71 


15—66 


33--23 


52--3A 


72— D3 


105—84 


16— CD 


34--2B 


53- -41 


73--83 


106—70 


17—15 


35—34 


54- -49 


74--01 


107— 7B 



Make Scan Codes 



Command Codes to the System 



The command codes described here are those sent by the 
keyboard. The codes have a different meaning when issued by 
the system. 



Resend (Hex FE) 

The keyboard issues a Resend command following receipt of an 
invalid input, or any input with incorrect parity. If the system 
sends nothing to the keyboard, no response is required. 



ACK (Hex FA) 

The keyboard issues an ' ACK ' response to any valid input other 
than an Echo or Resend command. If the keyboard is interrupted 



4-12 Keyboard 



while sending ' ACK ' , it will discard ' ACK ' and accept and 
respond to the new command. 



Overrun (Hex 00) 

An overrun character is placed in position 17 of the keyboard 
buffer, overlaying the last code if the buffer becomes full. The 
code is sent to the system as an overrun when it reaches the top of 
the buffer. 



Diagnostic Failure (Hex FD) 

The keyboard periodically tests the sense amplifier and sends a 
diagnostic failure code if it detects any problems. If a failure 
occurs during BAT, the keyboard stops scanning and waits for a 
system command or power-down to restart. If a failure is 
reported after scanning is enabled, scanning continues. 



Break Code Prefix (Hex FO) 

This code is sent as the first byte of a 2-byte sequence to indicate 
the release of a key. 



BAT Completion Code (Hex AA) 

Following satisfactory completion of the BAT, the keyboard 
sends hex AA. Hex FC (or any other code) means the keyboard 
microprocessor check failed. 



ECHO Response (Hex EE) 

This is sent in response to an Echo command from the system. 



Keyboard 4-13 



Clock and Data Signals 



The keyboard and system communicate over the ' clock ' and 
' data ' lines. The source of each of these lines is an 
open-collector device on the keyboard that allows either the 
keyboard or the system to force a line to a negative level. When 
no communication is occurring, both the ' clock ' and ' data ' lines 
are at a positive level. 

Data transmissions to and from the keyboard consist of 1 1-bit 
data streams that are sent serially over the serial data line. The 
following figure shows the structure of the data stream. 



Bit 


Function 


1st bit 


start bit 


2nd bit 


Data bit (least-significant) 


3rd bit 


Data bit 1 


4th bit 


Data bit 2 


5th bit 


Data bit 3 


6th bit 


Data bit 4 


7th bit 


Data bit 5 


8th bit 


Data bit 6 


9th bit 


Data bit 7 (most-significant) 


10th bit 


Parity bit (odd parity) 


11th bit 


Stop bit 



Transmission Data Stream 



The parity bit is either 1 or 0, and the eight data bits, plus the 
parity bit, always have an odd number. 

When the system sends data to the keyboard, it forces the ' data ' 
Une to a negative level and allows the ' clock ' line to go to a 
positive level. 

When the keyboard sends data to, or receives data from the 
system, it generates the ' clock ' signal to time the data. The 
system can prevent the keyboard from sending data by forcing the 
' clock ' line to a negative level; the ' data ' line may go high or 
low during this time. 

During the BAT, the keyboard allows the ' clock ' and ' data ' 
lines to go to a positive level. 



4-14 Keyboard 



Keyboard Data Output 

When the keyboard is ready to send data, it first checks for a 
keyboard-inhibit or system request-to-send status on the ' clock ' 
and 'data' Unes. If the 'clock' line is low (inhibit status), data is 
stored in the keyboard buffer. If the ' clock ' line is high and 
'data' is low (request-to-send), data is stored in the keyboard 
buffer, and the keyboard receives system data. 

If ' clock ' and ' data ' are both high, the keyboard sends the 
start bit, 8 data bits, the parity bit and the stop bit. Data will be 
valid before the f aUing edge and beyond the rising edge of 
' clock ' . During transmission, the keyboard checks the ' clock ' 
line for a positive level at least every 60 milliseconds. If the 
system lowers the ' clock ' hne from a positive level after the 
keyboard starts sending data, a condition known as line contention 
occurs, and the keyboard stops sending data. If line contention 
occurs before the rising edge of the tenth clock (parity bit), the 
keyboard buffer returns the ' data ' and ' clock ' lines to a positive 
level. If contention does not occur by the tenth clock, the 
keyboard completes the transmission. 

Following a transmission, the system can inhibit the keyboard 
until the system processes the input or until it requests that a 
response be sent. 



Keyboard Data Input 

When the system is ready to send data to the keyboard, it first 
checks if the keyboard is sending data. If the keyboard is sending 
but has not reached the tenth clock, the system can override the 
keyboard output by forcing the ' clock ' line to a negative level. 
If the keyboard transmission is beyond the tenth clock, the system 
must receive the transmission. 

If the keyboard is not sending, or if the system elects to override 
the keyboard's output, the system forces the ' clock ' line to a 
negative level for more than 60 microseconds while preparing to 
send. When the system is ready to send the start bit ( ' data ' line 
will be low), it allows the ' clock ' line to go to a positive level. 



Keyboard 4-15 



The keyboard checks the state of the ' clock ' line at intervals of 
no less than 60 milliseconds. If a request-to-send is detected, the 
keyboard counts 1 1 bits. After the tenth bit, the keyboard forces 
the 'data' line low and counts one more (the stop bit). This 
action signals the system that the keyboard has received its data. 
Upon receipt of this signal, the system returns to a ready state, in 
which it can accept keyboard output, or goes to the inhibited state 
until it is ready. 

Each system command or data transmission to the keyboard 
requires a response from the keyboard before the system can send 
its next output. The keyboard will respond within 20 milliseconds 
unless the system prevents keyboard output. If the keyboard 
response is invalid or has a parity error, the system sends the 
command or data again. A Resend command should not be sent 
in this case. 



Keyboard Layout 



The IBM Personal Computer AT Keyboard is available in six 
different layouts: 

• U.S. English 
. U.K. English 

• French 

• German 

• Italian 

• Spanish 

The following pages show all six possible keyboard layouts. 



4-16 Keyboard 



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German Keyboard 










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4-20 Keyboard 



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Specifications 

Size 

• Length: 540 millimeters (21.6 inches) 

• Depth: 100 millimeters (4 inches) 

• Height: 225 millimeters (9 inches) 

Weight 

• 2.8 kilograms (6.2 pounds) 



Keyboard Connector 

The keyboard cable connects to the system board through a 5 -pin 
DIN connector. The following figure lists the connector pins and 
their signals. 



Connector 
Pin 


Signal Name 


1 
2 
3 
4 
5 


Clock 

Data 

Spare 

Ground 

+5Vdc 



Keyboard Connector 



Keyboard 4-23 



o 



a 



4gnd 



P02AQ - 
P22- 



Ul 

7^o6 



|>^^§)^ 



Ul 
JH06 



^ 



LED 2 



^7^06 LED 3 



A 
A 



PARTIAL VIEW A-A H] 





Ul 


CI 






PI 


■u 


LI X 


JL 


JL 


n 




Rl 


R2 


R3 


/ 




LED 1 


LED 2 


LED 9 


ICZ] 


CD 


czil 









B 



COMPONENT SIDE- 
CARD 



B 
.J 



LED HOLDER 




PARTIAL VIEW B-B 



notes: 

I SOLDERING: THIS MANUFACTURING PROCESS 
MAY INCLUDE HAZARDOUS OPERAHONS AND 
REQUIRE SPECIAL HEALTH AND/OR 
SAFETY PRECAUTIONS. 

U] POLARIZE PI AT POSITION A9 



Enhancement Logic Card Assembly 



SECTION 5. SYSTEM BIOS 



Contents 

System BIOS 5-3 

System BIOS Usage 5-3 

Parameter Passing 5-4 

Vectors with Special Meanings 5-6 

Other Read/Write Memory Usage 5-8 

BIOS Programming Hints 5-10 

Adapters with System- Accessible ROM Modules . . 5-11 

System Board Additional ROM Modules 5-12 

Keyboard Encoding and Usage 5-12 

Encoding 5-12 

Character Codes 5-13 

Extended Codes 5-17 

Extended Functions 5-17 

Special Handling 5-21 



System BIOS 5-1 



Notes: 



5-2 System BIOS 



System BIOS 



The basic input/output system (BIOS) resides in ROM on the 
system board and provides level control for the major I/O devices 
in the system. Additional ROM modules may be placed on option 
adapters to provide device level control for that option adapter. 
BIOS routines enable the assembler language programmer to 
perform block (disk or diskette) or character-level I/O operations 
without concern for device address and characteristics. System 
services, such as time-of-day and memory size determination, are 
provided by the BIOS. 

If the sockets labeled U17 and U37 on the system board are 
empty, additional ROM modules may be placed in these sockets. 
During POST a test is made for valid code at this location, 
starting at address hex EOOOO and ending at hex EFFFF. More 
information about these sockets may be found under "System 
Board Additional ROM Modules" later in this section. 

The goal of the ROM BIOS is to provide an operational interface 
to the system and reUeve the programmer of concern about the 
characteristics of hardware devices. The BIOS interface protects 
the user from the hardware, allowing new devices to be added to 
the system, yet retaining the BIOS level interface to the device. 
In this manner, hardware modifications and enhancements 
become transparent to user programs. 

The IBM Personal Computer MACRO Assembler manual and the 
IBM Personal Computer Disk Operating System (DOS) manual 
provide useful programming information related to this section. 
A complete listing of the BIOS is given later in this section. 



System BIOS Usage 

Access to BIOS is through program interrupts of the 80286 in the 
real mode. Each BIOS entry point is available through its own 
interrupt. For example, to determine the amount of base RAM 
available in the system with the 80286 in the real mode, INT 12H 
will invoke the BIOS routine for determining the memory size and 
return the value to the caller. 



System BIOS 5-3 



Parameter Passing 

All parameters passed to and from the BIOS routines go through 
the 80286 registers. The prolog of each BIOS function indicates 
the registers used on the call and return. For the memory size 
example, no parameters are passed. The memory size, in 1Kb 
increments, is returned in the AX register. 

If a BIOS function has several possible operations, the AH 
register is used at input to indicate the desired operation. For 
example, to set the time of day, the following code is required: 



MOV AH,1 



; function is to set time-of-day 



MOV CX,HIGH COUNT ; establish the current time 
MOV DX.LOW COUNT 



INT lAH 

To read the time of day: 
MOV AH,0 
INT lAH 



;set the time 

; function is to read time-of-day 
;read the timer 



The BIOS routines save all registers except for AX and the flags. 
Other registers are modified on return only if they are returning a 
value to the caller. The exact register usage can be seen in the 
prolog of each BIOS function. 



5-4 System BIOS 



The following figure shows the interrupts with their addresses and 
functions. 



Address 


Int 


Name 


BIOS Entry 


0-3 





Divide by Zero 


D11 


4-7 


1 


Single Step 


D11 


8-B 


2 


Nonmaskable 


NMIINT 


C-F 


3 


Breakpoint 


D11 


10-13 


4 


Overflow 


D11 


14-17 


5 


Print Screen 


PRINT SCREEN 


18-1B 


6 


Reserved 


D11 


1D-1F 


7 


Reserved 


D11 


20-23 


8 


Time of Day 


TIMER INT 


24-27 


9 


Keyboard 


KB INT 


28-2B 


A 


Reserved 


D11 


2C-2F 


B 


Communications 


D11 


30-33 


C 


Communications 


D11 


34-37 


D 


Alternate Printer 


D11 


38-38 


E 


Diskette 


DISK INT 


3C-3F 


F 


Printer 


D11 


40-43 


10 


Video 


VIDEO 10 


44-47 


11 


Equipment Check 


EQUIPMENT 


48-4B 


12 


Memory 


MEMORY SIZE 
DETERMINE 


4C-4F 


13 


Diskette /Disk 


DISKETTE 10 


50-53 


14 


Communications 


RS232 10 


54-57 


15 


Cassette 


CASSb 1 1 b 
10 /System 
Extensions 


58-5B 


16 


Keyboard 


KEYBOARD lO 


5C-5F 


17 


Printer 


PRINTER 10 


60-63 


18 


Resident BASIC 


F600:0000 


64-67 


19 


Bootstrap 


BOOT STRAP 


68-6B 


1A 


Time of Day 


TIME OF DAY 


6C-6F 


IB 


Keyboard Break 


DUMMY RETURN 


70-73 


1C 


Timer Tick 


DUMMY RETURN 


74-77 


ID 


Video Initialization 


VIDEO PARMS 


78-7B 


IE 


Diskette Parameters 


DISK BASE 


7C-7F 


IF 


Video Graphics Chars 






80286 Program Interrupt Listing (Real Mode Only) 



System BIOS 5-5 



The following figure shows hardware, BASIC, and DOS reserved 
interrupts. 



Address 


Interrupt 


Function 


80-83 


20 


DOS program terminate 




84-87 


21 


DOS function call 




88-8B 


22 


DOS terminate address 




8C-8F 


23 


DOS Ctrl Break exit address 




90-93 


24 


DOS fatal error vector 




94-97 


25 


DOS absolute disk read 




98-9B 


26 


DOS absolute disk write 




9C-9F 


27 


DOS terminate, fix in storage 




AO-FF 


28-3F 


Reserved for DOS 




100-17F 


40-5F 


Reserved 




180-19F 


60-67 


Reserved for user program interrupts 




1A0-1BF 


68-6F 


Not used 




1C0-1C3 


70 


IRQ 8 Realtime clock INT (BIOS entry 
RTC INT) 




1C4-1C7 


71 


IRQ 9 (BIOS entry RE DIRECT) 




1C8-1CB 


72 


IRQ 10 (BIOS entry DID 




1CC-1CF 


73 


IRQ 11 (BIOS entry DID 




1D0-1D3 


74 


IRQ 12 (BIOS entry DID 




1D4-1D7 


75 


IRQ 13 BIOS Redirect to NMI interrupt 
(BIOS entry INT 287) 




1D8-1DB 


76 


IRQ 14 (BIOS entry DID 




1DC-1DF 


77 


IRQ 15 (BIOS entry DID 




1E0-1FF 


78-7F 


Not used 




200-217 


80-85 


Reserved by BASIC 




218-3C3 


86- FO 


Used by BASIC interpreter while BASIC 
running 


is 


3C4-3FF 


F1-FF 


Not used 





Hardware, BASIC, and DOS Interrupts 

Vectors with Special Meanings 

Interrupt 15 — Cassette I/O: This vector points to the following 
functions: 

• Device open 

• Device closed 

• Program termination 

• Event wait 



5-6 System BIOS 



• Joystick support 

• System Request key pressed 

• Wait 

• Move block 

• Extended memory size determination 

• Processor to protected mode 

Additional information about these functions may be found in the 
BIOS listing. 

Interrupt IB — Keyboard Break Address: This vector points to 
the code that will be executed when the Ctrl and Break keys are 
pressed on the keyboard. The vector is invoked while responding 
to keyboard interrupt, and control should be returned through an 
IRET instruction. The power-on routines initiaUze this vector to 
point to an IRET instruction so that nothing will occur when the 
Ctrl and Break keys are pressed unless the application program 
sets a different value. 

Control may be retained by this routine with the following 
problems: 

• The Break may have occurred during interrupt processing, so 
that one or more End of Interrupt commands must be sent to 
the 8259 controller. 

• All I/O devices should be reset in case an operation was 
underway at the same time. 

Interrupt IC — Timer Tick: This vector points to the code that 
will be executed at every system-clock tick. This vector is 
invoked while responding to the timer interrupt, and control 
should be returned through an IRET instruction. The power-on 
routines initialize this vector to point to an IRET instruction, so 
that nothing will occur unless the application modifies the pointer. 
The application must save and restore all registers that will be 
modified. 



System BIOS 5-7 



Interrupt ID — Video Parameters: This vector points to a data 
region containing the parameters required for the initialization of 
the 6845 on the video adapter. Notice that there are four 
separate tables, and all four must be reproduced if all modes of 
operation are to be supported. The power-on routines initialize 
this vector to point to the parameters contained in the ROM video 
routines. 

Interrupt IE — Diskette Parameters: This vector points to a 
data region containing the parameters required for the diskette 
drive. The power-on routines initialize this vector to point to the 
parameters contained in the ROM diskette routine. These default 
parameters represent the specified values for any IBM drives 
attached to the system. Changing this parameter block may be 
necessary to reflect the specifications of other drives attached. 

Interrupt IF — Graphics Character Extensions: When 
operating in graphics modes 320 x 200 or 640 x 200, the 
read/ write character interface will form a character from the 
ASCII code point, using a set of dot patterns. ROM contains the 
dot patterns for the first 128 code points. For access to the 
second 128 code points, this vector must be established to point 
at a table of up to 1Kb, where each code point is represented by 8 
bytes of graphic information. At power-on time, this vector is 
initialized to 000:0, and the user must change this vector if the 
additional code points are required. 

Interrupt 40 — Reserved: When an IBM Personal Computer AT 
Fixed Disk and Diskette Drive Adapter is installed, the BIOS 
routines use interrupt 40 to revector the diskette pointer. 

Interrupt 41 and 46: These vectors point to the parameters for 
the fixed disk drives, 41 for the first drive and 46 for the second. 
The power on routines initialize the vectors to point to the 
appropriate parameters in the ROM disk routine if CMOS is 
valid. The drive type codes in CMOS are used to select which 
parameter set the vector points to. Changing this parameter hook 
may be necessary to reflect the specifications of other fixed drives 
attached. 



5-8 System BIOS 



Other Read/Write Memory Usage 

The IBM BIOS routines use 256 bytes of memory from absolute 
hex 400 to hex 4FF. Locations hex 400 to 407 contain the base 
addresses of any RS-232C adapters attached to the system. 
Locations hex 408 to 40F contain the base addresses of the 
printer adapter. 

Memory locations hex 300 to hex 3FF are used as a stack area 
during the power-on initialization and bootstrap, when control is 
passed to it from power-on. If the user desires the stack to be in a 
different area, that area must be set by the appUcation. 

The following figure shows the reserved memory locations. 



Address 


Mode 


Function 


400-4A1 


ROM BIOS 


See BIOS listing 


4A2-4EF 




Reserved 


4F0-4FF 




Reserved as intra-application communication 
area for any application 


500-5FF 




Reserved for DOS and BASIC 


500 


DOS 


Print screen status flag store 

0=Print screen not active or successful print 

screen operation 

1=Print screen in progress 

255=Error encountered during print screen 

operation 


504 


DOS 


Single drive mode status byte 


510-511 


BASIC 


BASIC'S segment address store 


512-515 


BASIC 


Clock interrupt vector segment: offset store 


516-519 


BASIC 


Break key interrupt vector segment: offset 
store 


51A-51D 


BASIC 


Disk error interrupt vector segment: offset 
store 



Reserved Memory Locations 



If you do a DEF SEG (default workspace segment): 



System BIOS 5-9 



Offset 


Length 




2E 


2 


Line number of current line being executed 


347 


2 


Line number of last error 


30 


2 


Offset into segment of start of program text 


358 


2 


Offset into segment of start of variables (end of 
program text 1-1) 


6A 


1 


Keyboard buffer contents 
0=No characters in buffer 
1=Characters in buffer 


4E 


1 


Character color in graphics mode* 



BASIC Workspace Variables 



*Set to 1,2, or 3 to get text in colors 1-3. Do not set to 0. The 
default is 3. 

Example 

100 PRINT PEEK (&H2E) + 256 x PEEK (&H2F) 



L 


H 


Hex 64 


Hex 00 



The following is a BIOS memory map. 



Starting Address 




00000 


BIOS interrupt vectors 


001 EO 


Available interrupt vectors 


00400 


BIOS data area 


00500 


User read /write memory 


EOOOO 


Read only memory 


FOOOO 


BIOS program area 



BIOS Memory Map 



BIOS Programming Hints 

The BIOS code is invoked through program interrupts. The 
programmer should not "hard code" BIOS addresses into 
applications. The internal workings and absolute addresses within 
BIOS are subject to change without notice. 



5-10 System BIOS 



If an error is reported by the disk or diskette code, you should 
reset the drive adapter and retry the operation. A specified 
number of retries should be required for diskette reads to ensure 
that the problem is not due to motor startup. 

When altering I/O-port bit values, the programmer should change 
only those bits necessary to the current task. Upon completion, 
the programmer should restore the original environment. Failure 
to adhere to this practice may cause incompatibility with present 
and future applications. 

Additional information for BIOS programming can be found in 
Section 9 of this manual. 



Adapters with System- Accessible ROM Modules 

The ROM BIOS provides a way to integrate adapters with 
on-board ROM code into the system. During POST, interrupt 
vectors are estabUshed for the BIOS calls. After the default 
vectors are in place, a scan for additional ROM modules occurs. 
At this point, a ROM routine on an adapter may gain control and 
establish or intercept interrupt vectors to hook themselves into 
the system. 

The absolute addresses hex C8000 through EOOOO are scanned in 
2K blocks in search of a valid adapter ROM. A valid ROM is 
defined as follows: 

Byte Hex 55 

Byte 1 Hex AA 

Byte 2 A length indicator representing the number of 5 12-byte 
blocks in the ROM. 

Byte 3 Entry via a CALL FAR 

A checksum is also done to test the integrity of the ROM module. 
Each byte in the defined ROM module is summed modulo hex 
100. This sum must be for the module to be valid. 



System BIOS 5-11 



When the POST identifies a valid ROM, it does a far call to byte 
3 of the ROM, which should be executable code. The adapter 
may now perform its power-on initialization tasks. The adapter's 
ROM should now return control to the BIOS routines by 
executing a far return. 



System Board Additional ROM Modules 

The POST provides a way to integrate additional ROM modules' 
code into the system. These modules are placed in the sockets 
marked U17 and U37 if they are empty. A test for additional 
ROM modules on the system board occurs. At this point, the 
additional ROM, if valid, will gain control. 

The absolute addresses hex EOOOO through EFFFF are scanned in 
a 64K block in search of a valid checksum. Valid ROM is defined 
as follows: 

Byte Hex 55 

Byte 1 Hex AA 

Byte 2 Not used 

Byte 3 Entry via a CALL FAR 

A checksum is done to test the integrity of the ROM modules. 
Each byte in the ROM modules is summed modulo hex 100. This 
sum must be for the modules to be valid. This checksum is 
located at address hex EFFFF. 

When the POST identifies a valid ROM at this segment, it does a 
far call to byte 3 of the ROM, which should be executable code. 

Keyboard Encoding and Usage 

Encoding 

The keyboard routine provided by IBM in the ROM scan codes 
into what will be termed Extended ASCII 



5-12 System BIOS 



Extended ASCII encompasses one-byte character codes with 
possible values of to 255, an extended code for certain extended 
keyboard functions, and functions handled within the keyboard 
routine or through interrupts. 



Character Codes 

The following character codes are passed through the BIOS 
keyboard routine to the system or application program. A -1 
means the combination is suppressed in the keyboard routine. 
The codes are returned in the AL register. See Section 7 for the 
exact codes. 



System BIOS 5-13 



The following figure is a keyboard layout showing the key 
positions. 











a 


i 


o 


eo 
o 




2 


CM 

o 


s 


s 


s 


S 


at 


eo 
at 


en 
at 


o 


S 


CM 

a> 


en 










IT) 
CM 

o 

^ J 

c 

^ i 

- 

fl — ^1 

CO 

m 


CM 

f en 

CM 

CNJ 
CM 

r — ==n 

CM 
O) 

GO 

r* 

CO 


ft 
en 

\ -! 

eo 

en 

r* 
en 

CO 
en 

in 
en 

; \ 

% 

en 
en 

)^ (^ 

CM 1 

en 
en 

o 
en 


in 


CO 




44 46 47 48 49 50 51 52 53 54 55 


CO 

eo 












CD 


CO 
CO 


CO 
CM 


eo 

CO 


en 

CO 




en 















5-14 System BIOS 



Key 


Base Case 


Upper Case 


Ctrl 


Alt 


90 


Esc 


Esc 


Esc 


-1 


2 


1 


! 


-1 


Note 1 


3 


2 


@ 


Nul(OOO) Note 1 


Notel 


4 


3 


# 


-1 


Note 1 


5 


4 


$ 


-1 


Notel 


6 


5 


% 


-1 


Notel 


7 


6 


—I 


RS{030) 


Notel 


8 


7 


& 


-1 


Note 1 


9 


8 


* 


-1 


Note 1 


10 


9 


( 


-1 


Note 1 


11 





) 


-1 


Note 1 


12 


- 




US{031) 


Notel 


13 


= 


+~ 


-1 


Notel 


15 


Backspace(008) 


Backspace{008) 


Del(127) 


-1 


16 


-^(009) 


<-{Note1) 


-1 


-1 


17 


q 


Q 


DC1(017) 


Notel 


18 


w 


W 


ETB(023) 


Note 1 


19 


e 


E 


ENQ{005) 


Notel 


20 


r 


R 


DC2(018) 


Notel 


21 


t 


T 


DC4(020) 


Notel 


22 


y 


Y 


EM{025) 


Note 1 


23 


u 


U 


NAK{021) 


Notel 


24 


i 


1 


HT{009) 


Note 1 


25 








Sl(015) 


Note 1 


26 


P 


P 


DLE(016) 


Note 1 


27 


[ 


{ 


Esc(027) 


Notel 


28 


] 


} 


GS{029) 


-1 


43 


CR 


CR 


LF{010) 


-1 


30 Ctrl 


-1 


-1 


-1 


-1 


31 


a 


A 


SOH(OOI) 


Note 1 


32 


s 


S 


DC3(019) 


Notel 


33 


d 


D 


EOT(004) 


Note 1 


34 


f 


F 


ACK(006) 


Note 1 


35 


g 


G 


BEL(007) 


Note 1 


36 


h 


H 


BS{008) 


Notel 


37 


] 


J 


LF(OIO) 


Note 1 


38 


k 


K 


VT(OII) 


Notel 


39 


1 


L 


FF{012) 


Note 1 


40 


; 




-1 


-1 


41 


' 


■ 


-1 


-1 


1 


Q 


o 


-1 


-1 


44 Shift 


-1 


-1 


-1 


-1 


14 


\ 


1 


FS(028) 


-1 


46 


z 


Z 


SUB(026) 


Notel 


47 


X 


X 


CAN(024) 


Note 1 


48 


c 


c 


ETX(003) 


Note 1 


49 


V 


V 


SYN(022) 


Note 1 


50 


b 


B 


STX(022) 


Note 1 



(Parti of 1). 



Character Codes 



System BIOS 5-15 



Key 


Base Case 


Upper Case 


Ctrl 


Alt 


51 


n 


N 


S0(014) 


Note 1 


52 


m 


M 


CR(013) 


Notel 


53 


, 


< 


-1 


-1 


54 




> 


-1 


-1 


55 


/ 


? 


-1 


-1 


57 Shift 


-1 


-1 


-1 


-1 


106 


« 


Note 2 


Notel 


-1 


56 Alt 


-1 


-1 


-1 


-1 


61 


SP 


SP 


SP 


SP 


64 Caps 


-1 


-1 


-1 


-1 


Lock 










Lock 










70 


Nul(Notel) 


NuKNotel) 


NuKNotel) 


NuKNote 1) 


65 


Nul(Notel) 


NuKNotel) 


NuKNotel) 


NuKNote 1) 


71 


NuKNotel) 


NuKNotel) 


NuKNotel) 


NuKNote 1) 


66 


NuKNotel) 


NuKNotel) 


NuKNotel) 


NuKNotel) 


72 


NuKNotel) 


NuKNote 1) 


NuKNotel) 


NuKNotel) 


67 


NuKNotel ) 


NuKNotel) 


NuKNotel) 


NuKNotel) 


73 


NuKNotel) 


NuKNotel) 


NuKNotel) 


NuKNotel) 


68 


NuKNotel) 


NuKNotel) 


NuKNotel) 


NuKNotel) 


74 


NuKNotel) 


NuKNotel) 


NuKNotel) 


NuKNotel) 


69 


NuKNotel) 


NuKNote 1) 


NuKNotel) 


NuKNotel) 


95Num 


-1 


-1 


PauselNote 2) 


-1 


Lock 










100 


-1 


-1 


Break(Note 2) 


-1 


Scroll 










Lock 










Notes: 










1 . Refer to 


Extended Codes 


in this section. 






2. Refer to 


Special Handling 


in this section. 







(Part 2 of 2) 



Character Codes 



5-16 System BIOS 



The following figure lists keys that have meaning only in Num 
Lock, Shift, or Ctrl states. Notice that the Shift key temporarily 
reverses the current Num Lock state. 



Key 


Num 
Look 


Base Case 


Alt 


Ctrl 


91 


7 


HomelNote 1) 
TiNotel) 


-1 


Clear Screen 


96 


8 


-1 


-1 


101 


9 


Page Up{Note 1) 


-1 


Top of Text and 
Home 


107 


- 


- 


-1 


-1 


92 


4 


<-(Note1) 


-1 


Reverse 
Word(Notel) 


97 


5 


-1 


-1 


-1 


102 


6 


-^(Notel) 


-1 


Advance 
Word(Notel) 


108 


+ 


+Note 1) 


-1 


-1 


94 


1 


EndlNote 1) 
l(Notel) 


"■ 1 


Erase to 
EOL(Notel) 


98 


2 


-1 


-1 


102 


3 


Page Down(Note 1) 


-1 


Erase to 
EOS(Notel) 


99 





Ins 


-1 


-1 


104 




DeKNotes 1,2) 


Note 2 


Note 2 


Notes: 




Refer to Extended Codes in this section. | 


Refer tc 


3 Special Handling in this section I 



Special Character Codes 

Extended Codes 

Extended Functions 

For certain functions that cannot be represented by the standard 
ASCII code, an extended code is used. A character code of 000 
(null) is returned in AL. This indicates that the system or 
appUcation program should examine a second code, which will 
indicate the actual function. Usually, but not always, this second 
code is the scan code of the primary key that was pressed. This 
code is returned in AH. 



System BIOS 5-17 



Second 


Function 


Code 




3 


Nul Character 


15 


-*► 


16-25 


Alt Q, W, E, R, T, Y, U, 1, 0, P 


30-38 


Alt A, S, D, F, G, H, J, K, L 


44-50 


Alt Z, X, C, V, B, N, M 


59-68 


F1 to F10 Function keys base case 


71 
72 


Home 


73 


Page Up and Home Cursor 


75 


<r- 


11 


«-> 


79 
80 


f^ 


81 


Page Down and Home Cursor 


82 


lns{insert) 


83 


Del(delete) 


84-93 


F11 to F20(uppercase F1 to F10) 


94-103 


F21 toF30(CtrlF1 to F10) 


104-113 


F31 toF40(AltF1 to F10) 


114 


Ctrl PrtSc(start/stop echo to printer) 


115 


Ctrl ^-(reverse word) 


116 


Ctrl ^(advance word) 


117 


Ctrl End(erase to end of line-EOL) 


118 


Ctrl PgDnlerase to end of screen- EOS) 


119 


Ctrl Home(clear screen and home) 


120-131 


Alt 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, -, = keys 2-13 


132 


Ctrl PgUp(top 25 lines of text and home cursor) 



Keyboard Extended Functions 

SWft States 

Most shift states are handled within the keyboard routine, and are 
not apparent to the system or apphcation program. In any case, 
the current status of active shift states is available by calling an 
entry point in the ROM keyboard routine. The following keys 
result in altered shift states: 

Shift: This key temporarily shifts keys 1-14, 16-28, 31-41, 
46-55, 106, and 65-74 to uppercase (base case if in Caps lock 
state). Also, the Shift temporarily reverses the Num Lock or 
non-Num Lock state of keys 91-93, 96, 98, and 101-103. 



5-18 System BIOS 



Ctrl: This key temporarily shifts keys 3, 7, 13, 15, 17-28, 31-39, 
46-52, 106, 65-74, 42, 101, 92, 102, 91, 93, 95, 100, and 103 to 
the Ctrl state. The Ctrl key is also used with the Alt and Del keys 
to cause the system-reset function; with the Scroll Lock key to 
cause the break function; and with the Num Lock key to cause 
the pause function. The system-reset, break, and pause functions 
are described under "Special Handling" later in this section. 

Alt: This key temporarily shifts keys 1-13, 17-26, 31-39, 46-52, 
and 65-74 to the Alt state. The Alt key is also used with the Ctrl 
and Del keys to cause the system reset function. 

The Alt key also allows the user to enter any character code from 
0-255 into the system from the keyboard. The user holds down 
the Alt key and types the decimal value of the characters desired 
on the numeric keypad (keys 91-93, 96-98, and 101-103). The 
Alt key is then released. If more than three digits are typed, a 
modulo-256 result is created. These three digits are interpreted as 
a character code and are sent through the keyboard routine to the 
system or application program. Alt is handled internal to the 
keyboard routine. 

Break: The combination of the Ctrl and Break keys results in the 
keyboard routine signaling interrupt hex 1 A. The extended 
characters AL=hex 00, AH=hex 00 are also returned. 

Pause: The combination of the Ctrl and Num Lock keys causes 
the keyboard interrupt routine to loop, waiting for any key except 
Num Lock to be pressed. This provides a system- or 
appUcation-transparent method of temporarily suspending list, 
print, etc. and then resuming the operation. The key used to 
resume operation is thrown away. Pause is handled internal to the 
keyboard routine. 

Print Screen: The combination of the Shift and PrtSc keys 
results in an interrupt invoking the print screen routine. This 
routine works in the alphanumeric or graphics mode, with 
unrecognizable characters printing as blanks. 

Caps Lock: This key shifts keys 17-26, 31-39, and 46-52 to 
uppercase. When Caps Lock is pressed again, it reverses the 
action. Caps Lock is handled internal to the keyboard routine. 



System BIOS 5-19 



When Caps Lock is pressed, it toggles the Caps Lock Mode 
indicator. If the indicator was on, it will go off; and if it was off, 
it will go on. 

Scroll Lock: This key is interpreted by appropriate apphcation 
programs as indicating that the use of cursor control keys should 
cause windowing over the text rather than cursor movement. 
When the Scroll Lock key is pressed again, it reverses the action. 
The keyboard routine simply records the current shift state of the 
Scroll Lock key. It is the responsibility of the apphcation 
program to perform the function. When Scroll Lock is pressed, it 
toggles the Scroll Lock Mode indicator. If the indicator was on, it 
will go off; and if it was off, it will go on. 

Num Lock: This key shifts keys 90-93 and 95-104 to upper 
case. When Num Lock is pressed again, it reverses the action. 
Num Lock is handled internal to the keyboard routine. When 
Num Lock is pressed, it toggles the Num Lock Mode indicator. If 
the indicator was on, it will go off; if it was off, it will go on. 

Shift Key Priorities and Combinations: If combinations of the 
Alt, Ctrl, and Shift keys are pressed and only one is vaUd, the 
priority is as follows: the Alt key is first, the Ctrl key is second, 
and the Shift key is third. The only vaUd combination is Alt and 
Ctrl, which is used in the system-reset function. 



Sys Req 

When the Sys key is pressed, a hex 8500 is placed in AX, and an 
interrupt 15 is executed. When the Sys key is released, a hex 
8501 is placed in AX, and another interrupt 15 is executed. If an 
apphcation is to use the Sys key, the following rules must be 
observed: 

Save the previous address 

Overlay interrupt vector hex 15 

Check AH for a value of hex 85 

If yes, process may begin 



5-20 System BIOS 



If no, go to previous address 

It is the responsibility of the application to preserve the value in 
all registers, except AX, upon return. Sys is handled internal to 
the keyboard routine. 



Other Characteristics 

The keyboard routine does its own buffering, and the keyboard 
buffer is large enough to support entries by a fast typist. 
However, if a key is pressed when the buffer is full, the key will 
be ignored and the "alarm" will sound. 

The keyboard routine also suppresses the typematic action of the 
following keys: Ctrl, Shift, Alt, Num Lock, Scroll Lock, Caps 
Lock, and Ins. 



Special Handling 



System Reset 



The combination of the Alt, Ctrl, and Del keys results in the 
keyboard routine that starts a system reset or reboot. System 
reset is handled by BIOS. 



System BIOS 5-21 



Notes: 



5-22 System BIOS 



Warning: No STACK segment 



Start Stop Length Name 
OOOOOH OFFFEH FFFFH CODE 



Origin Group 




Address 


Publics by Nar 


0000:E729 


Al 


0000:3792 


ACT DISP PAGE 


0000:E137 


ADERR 


0000:E11C 


ADERRl 


0000:17AA 


BEEP 


0000:0090 


BEGIN 


0000:1669 


BLINK INT 


0000:E372 


BOOT INVA 


0000:E6F2 


BOOT STRAP 


0000:1666 


BOOT STRAP 1 


0000:E05E 


CI 


0000:0222 


Cll 


0000:E060 


C2 


0000: 0C3F 


C21 


0000:0454 


C30 


0000:0405 


C8042 


0000:E062 


CB042A 


0000:E066 


C8042B 


0000: E068 


C8042C 


0000:F859 


CASSETTE 10 


0000: 3FE2 


CASSETTE 10 1 


0000: 09FB 


CHK VIDEO 


0000:E234 


CMl 


0000:E25D 


CM2 


0000: E286 


CM3 


0000:EODO 


CM4 


0000:E2C6 


CM4 A 


0000:E2DF 


CM4 B 


0000:E2F8 


CM4 C 


0000:E311 


CM4 D 


0000:FA6E 


CRT CHAR GEN 


0000:E164 


Dl 


0000:1805 


Dll 


0000:E174 


D2 


0000:E184 


D2A 


0000: 17FD 


DDS 


0000:EC59 


DISKETTE 10 


0000:20A5 


DISKETTE 10 1 


0000:EFC7 


DISK BASE 


0000:EF57 


DISK INT 


0000:260E 


DISK INT 1 


0000:2A71 


DISK 10 


0000:28DA 


DISK SETUP 


0000:2816 


DSKETTE SETUP 


0000:FF53 


DUMMY RETURN 


0000: 1851 


DUMMY RETURN 1 


0000:E06C 


EO 


0000:E085 


EO A 


0000:E09E 


EO B 


0000:EOE9 


El 


0000:E32A 


E1_A 


0000:EOFC 


El 6 


0000:E10C 


El C 


0000:03E5 


E30B 


0000:03EB 


E30C 


0000:F84D 


EQUIPMENT 


0000:3E6C 


EQUIPMENT 1 


0000:177A 


ERR BEEP 


0000:187F 


EXC 00 


0000:1884 


EXC 01 


0000:1889 


EXC 02 


0000:188E 


EXC 03 


0000:1893 


EXC 04 


0000:1898 


EXC 05 


0000:1881 


EXC 06 


0000:1866 


EXC 07 


0000:18BB 


EXC 08 


0000:1800 


EXC 09 


00O0:18C5 


EXC 10 


0000:18CA 


EXC 11 


0000:18CF 


EXC 12 


0000:1804 


EXC 13 


0000:1809 


EXC 14 


0000:18DE 


EXC 15 


0000:18E3 


EXC 16 


0000:18E8 


EXC 17 


0000:18ED 


EXC 18 


0000:18F2 


EXC 19 



0000: 18F7 


EXC 20 


0000:18FC 


EXC 21 


0000:1901 


EXC 22 


0000:1906 


EXC 23 


0000:1906 


EXC 24 


0000:1910 


EXC 25 


0000:1915 


EXC 26 


0000: 191A 


EXC 27 


0000: 191F 


EXC 28 


0000:1924 


EXC 29 


0000: 1929 


EXC 30 


0000: 192E 


EXC 31 


0000:1753 


E MSG 


0000:E1C2 


Fl 


0000:E393 


F1780 


0000:E3A8 


F1781 


0000:E3BD 


F1782 


0000:E3DB 


F1790 


0000:E3EE 


F1791 


0000:E1FB 


Fl A 


0000:E34E 


Fl B 


0000:E21F 


F3 


0000:E152 


F3A 


0000:E15D 


F3B 


0000:E18B 


F3D 


0000:E1A1 


F3D1 


0000: E2AC 


F4 


0000:E2B2 


F4E 


0000:E401 


FD TBL 


0000:4752 


FILL 


0000:4392 


GATE A20 


0000: IFFO 


GDT_BLD 


0000: 1BC6 


H5 


0000:2FA4 


HD INT 


0000:1852 


INT 287 


0000:E8E1 


KIO 


0000:E91B 


Kll 


0000:E955 


K12 


0000:E95F 


K13 


0000:E969 


K14 


0000:E976 


K15 


0000:30A9 


K16 


0000:E87E 


K6 


0000:0008 Abs K6L 


0000:E886 


K7 


0000:E88E 


K8 


0000:E8C8 


K9 


0000:1702 


KBD RESET 


0000:E987 


KB INT 


0000:3054 


KB INT 1 


0000:E82E 


KEYBOARD 10 


0000:2FC8 


KEYBOARD 10 1 


0000:E1D7 


LOCK 


0000:0010 Abs M4 


0000:FOE4 


M5 


0000:FOEC 


M6 


0000:FOF4 


H7 


0000:F841 


MEMORY SIZE DETERMINE 


0000:3E62 


MEMORY SIZE DETERMINE 1 


0000:E2C3 


NMI INT 


0000:3E76 


NMI INT 1 


0000:0411 


OBF 42 


0000:E064 


OBF 42A 


0000:E06A 


OBF 42B 


0000:0020 


POSTl 


0000:OC3F 


P0ST2 


0000:16AD 


P0ST3 


0000:1753 


P0ST4 


0000:187F 


POSTS 


0000:199C 


P0ST6 


0000:1C2D 


P0ST7 


0000:EFD2 


PRINTER 10 


0000:346F 


PRINTER 10 1 


0000:FF54 


PRINT SCREEN 


0000:46CC 


PRINT SCREEN 1 


0000:174C 


PROC SHUTDOWN 


0000:1720 


PROT PRT HEX 


0000:1719 


PRT HEX 


0000:186A 


PRT SEG 


0000:1760 


P MSG 


0000:FFFO 


P R 


0000:38F5 


READ AC CURRENT 


0000:3778 


READ CURSOR 


0000:3A3B 


READ DOT 


0000:3DBC 


READ LPEN 


0000:1861 


RE DIRECT 



ROS Map 5-23 



0000:1600 


ROM CHECK 


0000:1AF9 


ROM ERR 


0000:16AD 


ROS CHECKSUM 


0000:E739 


RS232 10 


0000:34F5 


RS232 I0_1 


0000:462A 


RTC INT 


0000:38A3 


SCROLL OOWN 


0000:37FF 


SCROLL UP 


0000 .-2401 


SEEK 


0000:37B6 


SET COLOR 


0000:3751 


SET CPOS 


0000:372A 


SET CTYPE 


0000:364E 


SET MODE 


0000:3F2F 


SET TOD 


0000:1197 


SHUT2 


0000:114A 


SHUT3 


0000:169B 


SHUT4 


0000:11BC 


SHUT6 


0000: 119A 


SHUT7 


0000:4252 


SHUT9 


0000:1FF9 


SIOT BLO 


0000:FF23 


SLAVE VECTOR TABLE 


0000:E05B 


START 


0000:00A6 


START 1 


0000:199C 


STGTST CNT 


0000:1F1A 


SYSINITl 


0000:1933 


SYS 32 


0000:1938 


SYS 33 


0000:1930 


SYS 34 


0000:1942 


SYS 35 


0000:1947 


SYS 36 


0000:194C 


SYS 37 


0000:1951 


SYS 38 


0000:FEA5 


TIMER INT 


0000:4684 


TIMER INT 1 


0000:FE6E 


TIME OF OAY 


0000:445C 


TIME OF OAY 1 


0000:03C7 


TST4 B 


0000:0303 


TST4 C 


0000:03F7 


TST4 D 


0000:FEF3 


VECTOR TABLE 


0000:F065 


VIDEO 10 


0000:3605 


VIDEO 10 1 


0000:FOA4 


VIDEO FARMS 


0000:37DC 


VIDEO STATE 


0000:EOB7 


VIR ERR 


0000:3933 


WRITE AC CURRENT 


0000:396E 


WRITE C CURRENT 


0000:3A4C 


WRITE DOT 


0000:3038 


WRITE TTY 


0000:1713 


XLAT PR 


0000:1825 


XMIT 8042 


0000:1708 


XPC_BYTE 


Address 


Publics by Value 


0000:0000 


BEGIN 


0000:0008 Abs K6L 


0000:0010 Abs M4 


0000:002C 


POSTl 


0000:OOA6 


START 1 


0000:0222 


Cll 


0000:03C7 


TST4 B 


0000:0303 


TST4_C 


0000: OSES 


E30B 


0000:03EB 


E30C 


0000:03F7 


TST4 D 


0000:0405 


C8042 


0000:0411 


OBF 42 


0000:0454 


C30 


0000:09FB 


CHK VIDEO 


0000:OC3F 


P0ST2 


0000:0C3F 


C21 


0000: 114A 


SHUT3 


0000:1197 


SHUT2 


0000: H9A 


SHUT7 


0000: IIBC 


SHUT6 


0000:1693 


SHUT4 


0000:16AD 


ROS CHECKSUM 


0000:16AD 


P0ST3 


0000: 16B9 


BLINK INT 


0000:1600 


ROM CHECK 


0000:1708 


XPC BYTE 


0000:1713 


XLAT PR 


0000:1719 


PRT HEX 


0000:1720 


PROT PRT HEX 



0000:1740 
0000:1753 
0000:1753 
0000:1760 
0000:177A 
0000:17AA 
0000:1702 
0000:17FD 
0000:1805 
0000:1851 
0000:1852 
0000:1861 
0000:186A 
0000:187F 
0000:187F 
0000:1884 
0000:1889 
0000:188E 
0000:1893 
0000:1898 
0000:18B1 
0000:18B6 
0000:18BB 
0000:1800 
0000:1805 
0000:18CA 
0000:18CF 
0000:1804 
0000:1809 
0000:18DE 
0000:18E3 
0000:18E8 
0000:18ED 
0000:18F2 
0000:18F7 
0000:18FC 
0000:1901 
0000:1906 
0000:1908 
0000:1910 
0000:1915 
0000: 19 lA 
0000: 19 IF 
0000:1924 
0000:1929 
0000: 192E 
0000:1933 
0000:1938 
0000: 193D 
0000:1942 
0000:1947 
0000:194C 
0000:1951 
0000: 199C 
0000:1990 
0000:1AF9 
0000:1825 
0000: 1B66 
0000: 1BC6 
0000:1C2D 
0000: IFIA 
0000:1FF0 
0000:1FF9 
0000:20A5 
0000:24C1 
0000: 260E 
0000:2816 
0000:280A 
0000:2A71 
0000:2FA4 
0000:2FC8 
0000:3054 
0000:3OA9 
0000:346F 
0000:34F5 
0000:3605 
0000:364E 
0000:372A 
0000:3751 
0000:377B 
0000:3792 
0000:3786 
0000:3700 
0000:37FF 
0000:38A3 
0000:38F5 
0000:3938 



PROC_SHUTDOWN 

P0ST4 

E_MSG 

PJISG 

ERR_BEEP 

BEEP 

KBO_RESET 

DOS 

Oil 

DUMMY_RETURN_1 

INT_287 

RE_DIRECT 

PRT_SEG 

EXC_00 

P0ST5 

EXC_01 

EXC_02 

EXC_03 

EXC_04 

EXC_05 

EXC_06 

EXC_07 

EXC_08 

EXC_09 

EXC_10 

EXC_11 

EXC_12 

EXC_13 

EXC_14 

EXC_15 

EXC_16 

EXC_17 

EXC_18 

EXC_19 

EXC_20 

EXC_21 

EXC_22 

EXC_23 

EXC_24 

EXC_25 

EXC_26 

EXC_27 

EXC_28 

EXC_29 

EXC_30 

EXC_31 

SYS_32 

SYS_33 

SYS_34 

SYS_35 

SYS_36 

SYS_37 

SYS_38 

P0ST6 

STGTST_CNT 

R0M_ERR 

XMIT_8042 

B00T_STRAP_1 

H5 

P0ST7 

SYSINITl 

GOTBLD 

SIDT_BLD 

DISKETTE_I0_1 

SEEK 

DISK_INT_1 

DSKETTE_SETUP 

DISK_SETUP 

DISK_IO 

HD_INT 

KEYB0ARD_I0_1 

KB_INT_1 

K16 

PRINTER_I0_1 

RS232_I0_1 

VIDE0_I0_1 

SETJIODE 

SET_CTYPE 

SET_CPOS 

READ_CURSOR 

ACT_DISP_PAGE 

SET_COLOR 

VIDEO_STATE 

SCROLLJJP 

SCROLL_DOWN 

READ_AC_CURRENT 

WRITE AC CURRENT 



5-24 ROS Map 



0000:396E 


WRITE C CURRENT 




0000:3A3B 


READ DOT 




0000: 3A4C 


WRITE DOT 




0000:3D38 


WRITE TTY 




0000:3DBC 


READ LPEN 




000O:3E62 


MEMORY SIZE DETERMINE 


_1 


0000: 3E6C 


EQUIPMENT 1 




0000:3E76 


NMI INT 1 




0000: 3F2F 


SET_TOD 




0O0O:3FE2 


CASSKTi'E 10 1 




0000:4252 


SHUT9 




0000:4392 


GATE A20 




0000: 445C 


TIME OF DAY 1 




0000:462A 


RTC INT 




0000:4684 


TIMER INT 1 




0000:46CC 


PRINT SCREEN 1 




0000:4752 


FILL 




0000: E05B 


START 




0000:E05E 


CI 




0000:E060 


C2 




0000:E062 


C8042A 




0000:E064 


OBF 42A 




0000:E066 


C8042B 




0000:E068 


C8042C 




0000:E06A 


OBF 42B 




0000: E06C 


EO 




0000:E085 


EO A 




0000:E09E 


EO B 




0000:EOB7 


VIR ERR 




0000:EODO 


CM4 




0000: E0E9 


El 




0000:EOFC 


El B 




DOOO:E10C 


El C 




OOOOrEllC 


ADERRl 




OOO0:E137 


ADERR 




00O0:E152 


F3A 




0000:E15D 


F3B 




0000:E164 


Dl 




0000:E174 


D2 




0000:E184 


D2A 




O0O0:E18B 


F3D 




0000:E1A1 


F3D1 




0000:E1C2 


Fl 




0000:E1D7 


LOCK 




0000:E1FB 


Fl A 




0000:E21F 


F3 




00O0:E234 


CMl 




00O0:E25D 


CM2 




0000:E286 


CM3 




0000:E2AC 


F4 




0000:E2B2 


F4E 




0000:E2C3 


NMI INT 




0000:E2C6 


CM4 A 




0000:E2DF 


CM4 B 




0000:E2F8 


CM4 C 




0000:E311 


CM4 D 




0000:E32A 


El A 




0000:E34E 


Fl B 




0000:E372 


BOOT INVA 




0000:E393 


F1780 




0000:E3A8 


F1781 




0000:E3BD 


F1782 




0000:E3DB 


F1790 




0000:E3EE 


F1791 




0000:E401 


FD TBL 




000O:E6F2 


BOOT STRAP 




0000:E729 


Al 




0000:E739 


RS232 10 




0000:E82E 


KEYBOARD 10 




0000:E87E 


K6 




000O:E886 


K7 




000O:E88E 


K8 




000O:E8C8 


K9 




000O:E8El 


KIO 




000O:E91B 


Kll 




000O:E955 


K12 




O00O:E95F 


K13 




0O0O:E969 


K14 




000O:E976 


K15 




0O0O:E987 


KB INT 




0O0O:EC59 


DISKETTE 10 




0O0O:EF57 


DISK INT 




0O0O:EFC7 


DISK BASE 




0O0O:EFD2 


PRINTER 10 




0O0O:F065 


VIDEO 10 




0O0O:F0A4 


VIDEO FARMS 





0000:F0E4 
OOOOcFOEC 
0000:F0F4 
0000:F841 
0000:F84D 
0000:F859 
0000:FA6E 
0000:FE6E 
0000:FEA5 
0000:FEF3 
0000:FF23 
0000:FF53 
0000:FF54 
0000:FFFO 



M6 

M7 

MEM0RY_S I ZE_DETERM I NE 

EQUIPMENT 

CASSETTE_IO 

CRT_CHAR_GEN 

TIME_0F_DAY 

TIMER INT 

VECTOR_TABLE 

S LAVE_VECTOR_TAB LE 

DUMMY^RETURN 

PRINT_SCREEN 

P R 



ROSMap 5-25 



5-26 ROS Map 



TITLE TEST1 11/28/83 ROM POST 



= 0000 
: 0000 
= 0000 

' 00 FO 

: 0020 

: 0010 

: 0000 
: 8000 

■■ FFFF 
■■ 0000 



= 0060 
= 0061 
= OOCO 
= OOFS 
= OOOC 
= 00^40 
: 0080 

= 0061+ 
= 0001 
= 0002 
= 0004 
■- 0008 
-■ 0010 
= 0020 
= 0040 
: 0080 
: OOFE 
: OOAB 
: 00 EO 

: 0001 

= 0080 

: 0001 

: 0002 

: 0004 

■■ 0008 

■■ 0010 

: 0020 
: 0040 



'; BIOS I/O INTERFACE 








'; THESES INTERFACE LISTINGS, PROVIDE ACCESS TO BIOS ROUTINES 




; THESE BIOS ROUTINES ARE MEANT TO BE ACCESSED THROUGH 




; SOFTWARE INTERRUPTS ONLY. ANY ADDRESSES PRESENT IN 




; THE LISTINGS 


ARE INCLUDED ONLY FOR COMPLETENESS. 




; NOT FOR REFERENCE. 


APPLICATIONS WHICH REFERENCE 




; ABSOLUTE ADDRESSES 


WITHIN THE CODE SEGMENT 




VIOLATE THE STRUCTURE 


AND DESIGN OF BIOS. 




PAGE 








• MODULES REQUIRED 






; DATA. SRC 




DATA AREA 


; TEST1.SRC 




TEST. 01 THRU TEST. 16 


; TEST2.SRC 




TEST. 17 THRU TEST. 22 


; TEST3.SRC 


--> 


PROCEDURES 

ROS CHECKSUM 
BLINK INT 
ROM CHECK 
XPC BYTE 
PRT HEX 
PROT PRT HEX 
PROC SHUTDOWN 


; TEST4.SRC 




E MSG 

P MSG 

BEEP 

ERR BEEP 

KBD RESET 

on DUMMY INT HANDLER 

INT13 - X287 HANDLER 

PRT SEG 

DDS 

HARDWARE INT 9 HANDLER (TYPE 71) 


• TEST5.SRC 




EXCEPTION INTERRUPTS 


; TEST6.SRC 


--> 


STGTST CNT 
ROM ERR 
XMIT 8042 
BOOT STRAP 


'; TEST7.SRC 


--> 


PROTECTED MODE TEST 


SYSINIT1.SRC 


--> 


BUILD PROTECTED MODE DESCRIPTORS 


; GDT BLD.SRC 






; SIDT BLD.SRC 






; DSKETTE.SRC 




DISKETTE BIOS 


; DISK. SRC 




HARD FILE BIOS 


; KYBD.SRC 




KEYBOARD BIOS 


; PRT.SRC 




PRINTER BIOS 


; RS232.SRC 


--> 


RS232 BIOS 


; VIDEOl.SRC 




VIDEO BIOS 


; BIOS. SRC 




MEM SIZE 

EQUI P DET 

NMI 

SET TOD 


• BI0S1.SRC 


--> 


DUMMY CASSETTE (INT 15) 
DEVICE OPEN 
DEVICE CLOSE 
PROGRAM TERMINATION 
EVENT WAIT 
JOYSTICK SUPPORT 
SYSTEM REQUEST KEY 
WAIT 

MOVE BLOCK 

EXTENDED MEMORY SIZE DETERMINE 
PROCESSOR TO VIRTUAL MODE 


; BI0S2.SRC 


--> 


TIME OF DAY 
TlMERl INT 
PRINT SCREEN 


; ORGS. SRC 


--> 


PC COMPATABILITY AND TABLES 






POST ERROR MESSAGES 




INCLUDE POSTEQU.SRC 






'; EQUATES : 


TEST EQU 





; CONDITIONAL ASM (TEST2.SRC) 


KY LOCK EQU 





; CONDITIONAL ASM (TEST2.SRC) 


KEY_NUMS EQU 





; CONDITIONAL ASM (KYBD.SRC) 


X287 EQU 


OFOH 


; MATH PROCESSOR 


LOOP_POST EQU 


020H 


; MFC LOOP POST JUMPER 


REFRESH_BIT EQU 


010H 


; REFRESH TEST BIT 


POST SS EQU 


OH 


; POST STACK SEGMENT 


POST SP EQU 


8000H 


: POST STACK POINTER 


TEMP STACK LO EQU 


OFFFFH : 


TEMP_STACK_HI EQU 





; SET PROTECTED MODE TEMP SS 






; 0:FFFFH 


PORT A EQU 


60H 


; 8042 KEYBOARD SCAN/DIAG OUTPUTS 


PORT B EQU 


61H 


; 8042 READ WRITE REGISTER 


PARITY ERR EQU 


OCOH 


; RAM/ 10 CHANNEL PARITY ERROR 


RAM PAR ON EQU 


imOOlIB ; AND THIS VALUE 


RAM PAR OFF EQU 


OOOOnOOB ; OR THIS VALUE 


10 CHK EQU 


OlOOOOOOB ; 10 CHECK? 


PRTY_CHK EQU 


lOOOOOOOB ; PARITY CHECK? 


STATUS PORT EQU 


64H 


;8042 STATUS PORT 


OUT BUF FULL EQU 


01H 


; = +OUTPUT BUFFER FULL 


INPT BUF FULL EQU 


02H 


; 1 = +INPUT BUFFER FULL 


SYS FLAG EQU 


04H 


; 2 = -SYSTEM FLAG -POR/-SELF TEST 


CMD DATA EQU 


08H 


; 3 = -COMMAND/+DATA 


KYBD INH EQU 


lOH 


; U = +KEYBOARD INHIBITED 


TRANS TMOUT EQU 


20H 


; 5 = +TRANSMIT TIMEOUT 


RCV TMOUT EQU 


40H 


; 6 = +RECEIVE TIME OUT 


PARITY EVEN EQU 


80H 


; 7 = +PARITY IS EVEN 


SHUT CMD EQU 


OFEH 


; CAUSE A SHUTDOWN COMMAND 


INTR FACE CK EQU 


OABH 


; CHECK 8042 INTERFACE CMD 


KYBD CLK DATA EQU 


OEOH 


; GET KYBD CLOCK AND DATA CMD 


KYBD_CLK EQU 


OOIH 


; KEYBOARD CLOCK BIT 


* — — — .. — _ — — .MAMItTAPTIlR 1 


^G PORT- 




, — — — — — — — — — — ifiMliU rrti^ 1 (jr\ 1 




MFG_PORT EQU 


80H 


; MANU FACTORING CHECKPOINT PORT 



MEM FAIL 

proIfail 

lmcs_fail 

kyclk_fail 

ky_sys_fail 

kybd_fail 

DSK_FAIL 



EQU 
EQU 
EQU 
EQU 
EQU 
EQU 



ING BIT DEFINITION 

00000001 B ; 

OOOOOOIOB ; 

000001 OOB ; 
00001 OOOB 

00010000B ; 

00100000B ; 

OlOOOOOOB ; 



FOR MFG ERR_FLAG+1 

STORAGE TEST FAILED (ERROR 20X) 
VIRTUAL MODE TEST FAILED (ERROR 104) 
LOW MEG CHIP SELECT FAILED (ERROR 109) 
KEYBOARD CLOCK TEST FAILED (ERROR 304) 
KEYBOARD OR SYSTEM FAILED (ERROR 303) 
KEYBOARD FAILED (ERROR 301) 
DISKETTE TEST FAILED (ERROR 601) 



Test 1 5-27 



■~ 0010 

: 0020 

: 0040 

■■ 0080 
0010 

^ 0020 

■ 0060 
: OOAA 

- ooco 

■ OOAE 
■■ OOAD 

: OODF 

■■ OODD 

■ O0F1 

: OOFU 

^ O0F7 

: OOFE 

: OOFF 

: COED 

: OOAA 

■■ 00 FA 

■ OOFF 
: OOFE 

: OOFO 

: 0010 

: 0020 

: 0040 

: 0070 

■■ 008A 

: 008B 

■■ 0090 

: OOAD 

: 008F 

: 008D 

00B1 

: OOBO 

: 0096 

: 0095 

: 0098 

0097 

009U 

: 0092 



008E 
0080 
0040 
0020 
0010 
0008 
0004 

0083 
0080 
0040 
0020 

0020 
0021 
0020 
OOAO 
00A1 
0070 
0010 

0040 
0043 
0040 
0001 



0540 

0410 

: 0060 

: 0002 

■ 0060 

: 0061 

: 0080 

0080 
0040 

: 0020 
0010 

: 0008 
0004 
0002 
0001 
0080 

: 0040 

- 0020 

: 0010 
: 0008 
: 0004 

■■ 0045 

0046 

0038 

: 001D 

■■ 003A 

002A 

- 0036 

■ 0052 
: 0053 

■ 0054 

■ 0080 
^ 0025 
■■ 0080 

0040 
: 0020 
: 0010 
: 0009 



KEY_FAIL EQU 10000000B 

. 8042 INPUT PORT BIT DEFINI 

BASE_RAM EQU 10H 

MFG_JMP EQU 20H 

DSP_JMP EQU i(OH 

KEY_BD„INH1B EQU 80H 

; 8042 RAM DEFINITION 

INH_KEYBOARD EQU 10H 



READ„8042_RAM 

WRITE__8042_RAM 

SELr_8042_TESr 

READ_8042_INPUT 

ENA_KBO 

DIS_KBD 

ENABLE_BIT20 

DISABLE BIT20 



EQU 
EQU 
EQU 



EQU 
EQU 
EQU 



KB MENU 


EQU 


KB ENABLE 


EQU 


KB MAKE BREAK 


EQU 


KB ECHO 


EQU 


KB RESET 


EQU 


LED_CMD 


EQU 


KB. OK 


EQU 


KB ACK 


EQU 


KB OVER RUN 


EQU 


KB RESEND 


EQU 


KB BREAK 


EQU 


KB FA 


EQU 


KB FE 


EQU 


KB PR LED 


EQU 







20H 

60H 

OAAH 

OCOH 

OAEH 

OADH 

ODFH 

ODDH 
KEYBOARD/LEO COMMANDS ■ 

0F1H 

0F4H 

0F7H 

OF EH 

OFFH 

OEDH 
KEYBOARD RESPONSE 

OAAH 

OFAH 

OFFH 

OFEH 

OFOH 

010H 

020H 

040H 

CMOS EQUATES ■ 

EQU 070H 
EQU 08AH 
EQU 08BH 
EQU 090H 
EQU OADH 
EQU 08 FH 



CMOS_PORT 

CLK_UP 

CM0S_ALARM 

CMOS_BEGIN 

CMOS_END 

SHUT__D0WN 

BATTERY_CON0_STATUS EQU 08DH 

M_SIZE_HI EQU 0B1H 

M_SIZE LO EQU OBOH 

M1_SIZE_MI EQU 096H 

M1_SIZE_L0 EQU 095H 

M2_SIZE_HI EQU 098H 

M2_SIZE_L0 EQU 097H 

C_EQUIP EQU 094H 

HD_FILE_TYPE EQU 092H 

PAGE 

CMOS DIAG_STATUS ERROR 



KEYBOARD LOCKED (ERROR 302) 

BASE R/W MEMORY 
LOOP POST JUMPER 
DISPLAY TYPE JUMPER 
KEYBOARD INHIBIT SWITCH 

BYTE BIT 4 OF 8042 RAM 

BITS 0-4 = ADDRESS (20-3F) 

8042 SELF TEST 
READ 8042 INPUT PORT 
ENABLE KEYBOARD COMMAND 
DISABLE KEYBOARD COMMAND 
ENABLE ADDR LINE BIT 20 
DISABLE ADDR LINE BIT 20 

SELECT MENU COMMAND 

KEYBOARD ENABLE 

TYPAMATIC 

ECHO COMMAND 

SELF DIAGNOSTIC COMMAND 

LED WRITE COMMAND 

RESPONSE FROM SELF DIAG 

ACKNOWLEDGE FROM TRANSMISSION 

OVER RUN 

RESEND REQUEST 

KEYBOARD BREAK CODE 

ACK RECEIVED 

RESEND RECEIVED FLAG 

MODE INDICATOR UPDATE 



DIAG_STATUS 

BAD_BAT 

BAD_CKSUM 

BAD_CONFIG 

W_MEM_SIZE 

HF_FAIL 

CMOS_CLK_FAI L 



EQU 



EQU 
EQU 
EQU 
EQU 

CMOS 

INFO_STATUS EQU 
M640K EQU 

NEW_INST EQU 
HF_B00T EQU 



08EH 
080H 
040H 
020H 
010H 
O08H 
O04H 
INFORMATION FLAGS- 
0B3H 
080H 
040H 
020H 



SHUTDOWN OFFSET 

BATTERY STATUS 

10 MEMORY SIZE HIGH BYTE (POST) 

10 MFMORY SIZE 10 BYTE (POST) 

0->640K CONFIG MEMORY SIZE (SETUP) 

LOW BYTE (SETUP) 
640K->UP CONFIG MEMORY SIZE (SETUP) 

LOW BYTE (SETUP) 
CMOS EQUIPMENT FLAG 
HARD FILE TYPE BY I t 

FLAGS 

; CMOS ADDRESS OF DIAG_STATUS 

; DEAD BATTERY 

; CHECKSUM ERROR 

; MINIMUM CONFIG USED INSTEAD OF CMOS 

; MEMORY SIZE NOT EQUAL TO CONFIG 

; HARD FILE FAILURE ON I NIT 

; CMOS CLK NOT UPDATING OR NOT VALID 

; CMOS ADDRESS OF INFO BYTE 

; 512K -> 640K CARD INSTALLED 

; FLAG USED BY CMOS SETUP UTILITY 

; BOOT HARD FILE FLAG 



INTERRUPT EQUATES ■ 

:qu 20H 



TIMER 
TIM_CTL 
T IMERO 
TMINT 



EQU ^on 

EQU i43H 

EQU t40H 

EQU 01 



8253 TIMER CONTROL PORT ADDR 
8253 TIMER/CNTER PORT ADDR 
T IMER INTR RECVD MASK 



DMA08 
DMA 




EQU 
EQU 


08 
00 


; DMA STATUS REG PORT ADDR 

; DMA CH.O ADDR. REG PORT ADDR 


DMA 18 
DMA1 




EQU 
EQU 


ODOH 
OCOH 


; 2ND DMA STATUS PORT ADDR 

; 2ND DMA CH.O ADDR. REG PORT ADDR 


DMA PAGE 
LAST_DMA_ 


PAGE 


EQU 
EQU 


81H 
8FH 


; START OF DMA PAGE REGISTERS 
; LAST DMA PAGE REGISTER 



MAX PERIOD 


EQU 


540H 




MIN PERIOD 


EQU 


41 OH 




KBD IN 


EQU 


60H 




KBDINT 


EQU 


02 




KB DATA 


EQU 


60H 




KB CTL 


EQU 


61H 




KB ERR 


EQU 


80H 




; SHIFT 


FLAG EQUATES WITHIN KB 


FLAG 


INS STATE 


EQU 


80H 




CAPS STATE 


EQU 


40H 




NUM STATE 


EQU 


20H 




SCROLL STATE 


EQU 


10H 




ALT SHI FT 


EQU 


08H 




CTL SHI FT 


EQU 


04H 




LEFT SHIFT 


EQU 


02H 




RIGHT SHI FT 


EQU 


0111 




INS SHI FT 


EQU 


80 H 




CAPS SHIFT 


EQU 


40H 




NUM SHI FT 


EQU 


20H 




SCROLL SHIFT 


EQU 


10H 




HOLD STATE 


FQU 


08H 




SYS SHIFT 


EQU 


04H 




NUM KEY 


EQU 


69 




SCROLL KEY 


EQU 


70 




ALT KEY 


EQU 


56 




CTL KEY 


EQU 


29 




CAPS KEY 


EQU 


58 




LEFT KEY 


EQU 


42 




RIGHT KEY 


EQU 


54 




INS KEY 


EQU 


82 




DEL KEY 


EQU 


83 




SYS KEY 


EQU 


54H 








E EQUATES 










INT FLAG 


EQU 


080H 




MOTOR WAIT 


EQU 


37 




TIME OUT 


EQU 


80H 




RAD SFFK 


EQU 


40H 




BAD NEC 


EQU 


20H 




BAD CRC 


EQU 


10H 




DMA BOUNDARY 


EQU 


09H 





KEYBOARD DATA IN ADDR PORT 

KEYBOARD INTR MASK 

KEYBOARD SCAN CODE PORT 

CONTROL BITS FOR KEYBOARD SENSE DATA 

KEYBOARD TRANSMIT ERROR FLAG 

INSERT STATE IS ACTIVE 

CAPS LOCK STATE HAS BEEN TOGGLED 

NUM LOCK SIAIL HAS BEEN TOGGLED 

SCROLL LOCK STATE HAS BEEN TOGGLED 

ALTERNATE SHIFT KEY DEPRESSED 

CONTROL SHIFT KEY DEPRESSED 

LEFT SHIFT KEY DEPRESSED 

RIGHT SHIFT KEY DEPRESSED 

INSERT KEY IS DEPRESSED 

CAPS LOCK KEY IS DEPRESSED 

NUM LOCK KEY IS DEPRESSED 

SCROLL LOCK KEY IS DEPRESSED 

SUSPEND KEY HAS BEEN TOGGLED 

SYSTEM KEY DEPRESSED AND HELD 

SCAN CODE FOR NUMBER LOCK 

SCROLL LOCK KEY 

ALTERNATE SHIFT KEY SCAN CODE 

SCAN CODE FOR CONTROL KEY 

SCAN CODE FOR SH I FT LOCK 

SCAN CODE FOR LEFT SHIFT 

SCAN CODE FOR RIGHT SHIFT 

SCAN CODE FOR INSERT KEY 

SCAN CODE FOR DELETE KEY 

SCAN CODE FOR SYSTEM KEY 

INTERRUPT OCCURRENCE FLAG 

2 SECS OF COUNTS FOR MOTOR TURN OFF 

ATTACHMENT FAILED TO RESPOND 

SEEK OPERATION FAILED 

NEC CONTROLLER HAS FAILED 

BAD CRC ON DISKETTE READ 

ATTEMPT TO DMA ACROSS 64K BOUNDARY 



5-28 Test 1 



0008 
0006 
OOOU 
0003 
0002 
0001 



0080 

0007 

OOFS 

0010 

0003 

0020 

OOFO 

0002 

0010 

: OOOU 

: 0001 

0030 

: OOOA 

: OOOF 

: OOIU 

0000 



■ 0093 
^ 007't 
: 0015 

■ 0061 

: 0080 

■■ 000 E 

: 0070 
: 0071 

OOCO 
0010 

■ OOOF 
: 0002 



0000 
0000 
0008 
0008 
00^4 
0014 
0020 
0020 
0020 
OOUO 
OO'lO 
004C 
OO'tC 
0060 
0060 
0064 
0064 
0064 
0074 
0074 
0078 
007R 
007C 
007C 
0100 
0100 
0104 
0104 
0118 
0118 
01 CO 
OICO 
01 CO 
01D8 
01 D8 
0400 
0400 
0400 
0500 
0500 
7C00 
7C00 
7C00 



0000 
0000 


80 


0100 
0100 




0000 
0000 
0000 


04 


0008 


04 


0010 


01 



BAD DMA 


EQU 


08H ; 


MFDIA CHANGF 


EQU 


06 H ; 


RECORD NOT FND 


EQU 


04 H ; 


WRITE PROTECT 


EQU 


03H ; 


15AD ADDR MARK 


EQU 


02 H ; 


BAD_CMD 


EQU 


01H ; 


XRATE 


EQU 


02H ; 


DUAL 


EQU 


OIH ; 


DSK CHG 


EQU 


080H ; 


STATE MSK 


EQU 


007H ; 


REV STATE 


EQU 


0F8H 


DETERMINED 


EQU 


01 OH ; 


TRAN MSK 


EQU 


03H ; 


DOUBLE STEP 


EQU 


020H 


MOTOR MSK 


EQU 


OFOH ; 


MAX DRV 


EQU 


002H ; 


HOME 


EQU 


OlOH ; 


SENSE DRV ST 


EQU 


004H ; 


ONE 


EQU 


OOIH ; 


TRK SLAP 


EQU 


030H ; 


QUIET SEEK 


EQU 


OOAH ; 


HD12 SETTLE 


EQU 


015D ; 


HD320 SETTLE 


EQU 


020D ; 


WRITE OP 


EQU 


080H ; 


PAGE 






. DISK CHANGE 


LINE EQUATES 


NOCHGLN 


EQU 


OOIH ; 


CHGLN 


EQU 


002H ; 


. MEDIA/DRIVE 


STATE INDICATORS 



M326D326 
M326D12 
Ml 20 12 
POA_DUAL 
POA_START 



EQU 
EQU 
EQU 
EQU 
EQU 



093H 
074H 
015H 
06 IH 
080H 



CM0SDSB_ADDR 

CADR_PRT 

CDATA_PRT 

CMOS GOOD 

CM0SbSK_BYTE 

LOWN I B 

INVALID_DRV 



• CMOS NON-VOLATILE RAM EQUATES 



EQU 
EQU 
EQU 
EQU 
EQU 
EQU 
EQU 



OOEH 
070H 
071H 
OCOH 
OlOH 
00 FH 
002H 



MER DATA AREA 



DMA OVERRUN ON OPERATION 

MEDIA REMOVED ON DUAL ATTACH CARD 

REQUESTED SECTOR NOT FOUND 

WRITE ATTEMPTED ON WRITE PROT DISK 

ADDRESS MARK NOT FOUND 

BAD COMMAND PASSED TO DISKETTE I/O 



DISKETTE CHANGE FLAG MASK BIT 

USED TO STRIP OFF STATE OF MEDIA 

USED AS MASK FOR STATE BITS 

SET STATE DETERMINED IN STATE BITS 

ISOLATE SHIFTED TRANSFER RATE BITS 

MASK TO TURN ON DOUBLE STEPPING 

MASK TO CLEAR MOTOR ON BITS 

MAX NUMBER OF DRIVES 

TRACK MASK 

SENSE DRIVE STATUS COMMAND 

SEEK ONE TRACK 

CRASH STOP (48 TPI DRIVES) 

SEEK TO TRACK 10 

1 .2 M HEAD SETTLE TIME 

320 K HEAD SETTLE TIME 

WRITE OPERATION FLAG 



STATE MACHINE - 320/360 MEDIA/DRIVE 
STATE MACHINE - 320/360 MED 1 A, 1 . 2DR I VE 
STATE MACHINE - 1.2 MEDIA/DRIVE 
300K DATA TRANSFER RATE & STATE 1 
250K DATA TRANSFER RATE & STATE 

DISKETTE STATUS BYTE ADDRESS 

CMOS ADDRESS PORT ADDRESS 

CMOS DATA PORT ADDRESS 

BATTERY AND CHECKSUM INDICATOR 

DISKETTE BYTE ADDRESS 

ISOLATE LOW NIBBLE IN REG I SILK MASK 

FIRST INVALID DISKETTE TYPE 



COUNTS_SEX; 
COUNTS_MIN 
COUNTS_HOUR 
COUNTS^^DAY 
PAGE 

INCLUDE DSEG. SRC 



EQU 
EQU 
EQU 



1092 
65543 
1573040 = 1800BOH 



0286 INTERRUPT LOCATIONS (READ): 



ABSO SEGMENT AT 
STG_LOC0 

ORG 2*4 
NMI^PTR 

ORG 5*4 
INT5_PTR 

ORG 8*4 
INT_ADDR 
INT_PTR 

ORG 10H*4 
VIDEO_INT 

ORG 13H*4 
ORG_VECTOR 

ORG 18H*4 
BASIC_PTR 

ORG 19H*4 
BOOT_VEC 
BOOT_VECT0R 

ORG 1DH*4 
PARM_PTR 

ORG 1EH*4 
DISK_POINTER 

ORG 01FH*4 
EXT_PTR 

ORG 40H*4 
DISK_VECTOR 

ORG 41H*4 
HF_TBL_VEC 

ORG 46H*4 
Hn_TBL_VEC 

ORG 70H*4 
SLAVE_INT_PTR 
RTC_INT_VFC 

ORG 76H*4 
HDISK_INT 

ORG 
DATA_AREA 
DATA_WORD 

ORG 
MFG__TEST_RTN 

ORG 
BOOT_LOCN 
ABSO ENDS 
PAGE 



LABEL 
LABEL 
LABEL 



LABEL 

LABEL 

LABEL 

1 ABFl 
LABEL 

LABEL 

LABEL 

LABEL 

LABEL 

LABEL 

LABEL 



BYTE 
WORD 
WORD 



WORD 

DWORD 

WORD 

DWORD 
DWORD 

DWORD 

DWORD 

DWORD 

DWORD 

DWORD 

DWORD 



POINTER TO VIDEO PARMS 



DISKETTE POINTER 



400H 

0500H 
7C00H 



; ABSOLUTE LOCATION OF DATA SEGMENT 



LABEL FAR 
LABEL FAR 



STACK -- USED DURING INITIALIZATION ONLY 



ROM BIOS DATA AREAS 



DATA SEGMENT AT 40H 
DATA_BASE LABEL 
RS23'2_BASE DW 



PRINTER_BASE 



; ADDRESSES OF RS232 ADAPTERS 



ADDRESSES OF PRINTERS 



EQU I P_FLAG 



INSTALLED HARDWARE 



Test 1 5-29 



0012 01 



C MFG_TST 



1 DUP(?) 



INITIALIZATION FLAG 



0013 01 [ 
0015 01 [ 



MEMORY_SIZE DW 1 DUP(?) 
MFG_ERR_FLAG DB 1 DUP( ? ) 



; MEMORY SIZE IN K BYTES 



; SCRATCHPAD FOR MANUFACTURING 



0016 01 [ 



OUP(?) 



; ERROR CODES 



0017 01 [ 



KEYBOARD DATA AREAS 



C KB_FLAG 



0018 01 [ 



C KB_FLAG_1 



; SECOND BYTE OF KEYBOARD STATUS 



0019 01 [ 



C ALT_INPUT 



; STORAGE FOR ALTERNATE KEYPAD ENTRY 



001A 01 



C BUFFER_HEAD DW 1 DUP( ? ) 



; POINTER TO HEAD OF KEYBOARD BUFFER 



001C 01 [ 



C BUFFER_TAIL DW 1 DUP( ? ) 



POINTER TO TAIL OF KEYBOARD BUFFER 



001E 10 [ 



G KB_BUFFER 



ROOM FOR 15 ENTRIES 



003E 01 [ 



KB_BUFFER_END LABEL WORD 

. HEAD = TAIL INDICATES THAT 

• DISKETTE DATA AREAS 
SEEK_STATUS DB 1 DUP( ? ) 



THE BUFFER IS EMPTY 



DRIVE REGAL i BRAT I ON STATUS 



003F 01 [ 



C MOTOR_STATUS DB 1 DUP(?) 



BIT 3-0 = DRIVE 3-0 NEEDS REGAL 
BEFORE NEXT SEEK IF BIT IS = 
MOTOR STATUS 



OOUO 01 [ 



C MOTOR_COUNT DB 



BIT 3-0 = DRIVE 3-0 IS CURRENTLY 

RUNNING 
BIT 7 = CURRENT OPERATION IS A WRITE, 

REQUIRES DELAY 
TIME OUT COUNTER FOR DRIVE TURN OFF 



C DISKETTE_STATUS [ 



RETURN CODE STATUS BYTE 



0042 
0042 
0042 07 [ 



CMD_BL0CK LABEL 
HD_ERR0R LABEL 
NEC_STATUS DB 



BYTE 
BYTE 
7 DUP(?) 



; STATUS BYTES FROM NEC 



0049 01 [ 



; VIDEO DISPLAY 
CRT_MODE DB 



DATA AREA 
1 DUP(?) 



CURRENT CRT MODE 



004A 01 [ 
004C 01 [ 
004E 01 [ 



C CRT_COLS 



C CRT_LEN 



C CRT_START DW 



NUMBER OF COLUMNS ON SCREEN 



LENGTH OF REGEN IN BYTES 



; STARTING ADDRESS IN REGEN BUFFER 



0050 08 



C CURS0R_P0SN DW 8 DUP(?) 



; CURSOR FOR EACH OF UP TO 8 PAGES 



0060 01 [ 



C CURS0R_M0DE DW 



; CURRENT CURSOR MODE SETTING 



0062 01 



C ACTIVE_PAGE DB 



CURRENT PAGE BEING DISPLAYED 



0063 01 



C ADDR_6845 DW 



; BASE ADDRESS FOR ACTIVE DISPLAY CARD 



0065 01 [ 



C CRT_M0DE_SET 



; CURRENT SETTING OF THE 3X8 REGISTER 



0066 01 [ 



C CRT_PALLETTE DB 



CURRENT PALLETTE SETTING COLOR CARD 



5-30 Testl 



0067 01 [ 



; POST DATA AREA 
io_ROM_INIT DW 1 DUP(?) 



; PNTR TO OPTIONAL I/O ROM IN IT ROUTINE 



0069 01 [ 



C I 0_ROM_SEG 



; POINTER TO 10 ROM SEGMENT 



006B 01 [ 



C INTR_FLAG 



; FLAG TO INDICATE AN INTERRUPT HAPPEND 



006C 01 [ 



TIMER DATA AREA : 

tlMER_L0W DW 1 DUP(?) ; LOW WORD OF TIMER COUNT 



006E 01 [ 



C TIMER_HIGH 



II GH WORD OF TIMER COUNT 



0070 01 [ 



C TIMER_OFL 



; TIMER HAS ROLLED OVER SINCE LAST READ 



0071 01 [ 



; SYSTEM DATA AREA : 

BIOS_BREAK DB 1 DUP(?) ; BIT 7=1 IF BREAK KEY HAS BEEN HIT 



0072 01 [ 



C RESET_FLAG 



; WORD=123UH IF KEYBOARD RESET UNDERWAY 



0074 01 [ 

0075 01 [ 

0076 01 [ 



C PAGE 

C ; 

C ; HARD FILE DATA AREAS 

C ;- 

C DISK_STATUS1 DB 1 DUP(?) 

C 

C 

C 

C HF_NUM uB 1 uup(?) 

C 

C 

C 

C CONTROL_BYTE DB 1 DUP(?) 



0077 01 



C P0RT_0FF 



0078 Oh I 



; PRINTER AND RS232 TIME-OUT VARIABLES 
PRINT_TIM_OUT DB k DUP(?) 



007C Oh [ 



RS232_TIM_0UT DB 



0080 01 [ 
0082 01 [ 



; ADDITIONAL KEYBOARD DATA AREA 
BUFFER_START DW 1 DUP{?) 



C BUFFER_END 



C LASTRATE 



ADDITIONAL FLOPPY DATA 
ORG 8BH 



LAST DATA RATE SELECTED 



ADDITIONAL HARD FILE DATA 



; STATUS REGISTER 



008D 01 [ 



C HF_ERR0R 



ERROR REGISTER 



008E 01 [ 
008F 01 [ 



C HF_INT_FLAG DB 1 DUP(?) 



C HF_CNTRL 



; HARD FILE INTERRUPT FLAG 



; COMBO HARD FILE/ FLOPPY CARD BIT 0=1 



0090 
0090 
0090 01 [ 



; ADDITIONAL DISKETTE AREA 

ORG 90H 
DSK_STATE LABEL BYTE 

DB 1 DUP(?) 



DRIVE MEDIA STATE 



0091 01 [ 



DRIVE 1 MEDIA STATE 



0092 01 I 



; DRIVE OPERATION START STATE 



Test 1 5-31 



0093 01 ( 



DB 1 DUP(?) 



; DRIVE 1 OPERATION START STATE 



009U 01 [ 



DRIVE PRESENT CYLINDER 



0095 01 [ 



; DRIVE 1 PRESENT CYLINDER 



0096 01 [ 



DB 1 DUP(?) 



ADDITIONAL KEYBOARD LED FLAG 
ORG 97H 



USER_FLAG 



REAL TIME CLOCK DATA AREA 
ORG 98H 



; OFFSET ADDR OF USERS WAIT FLAG 



009A 01 [ 



USER_FLAG_SEG DW 1 0UP(?) 



; SEG ADDR OF USER WAIT FLAG 



009C 01 



LOW WORD OF USER WAIT FLAG 



009E 01 



C RTC_HIGH 



HIGH WORD OF USER WAIT FLAG 



OOAO 01 



C RTC_WAIT_FLAG DB 1 DUP(?) 



WAIT ACTIVE FLAG 



ENDS 

EXTRA DATA AREA 



0000 
0000 
0000 
0000 4000 



XXDATA ENDS 

• VIDEO DISPLAY BUFFER 

VIDE0_RAM SEGMENT AT 0B800H 

REGEN LABEL BYTE 

REGENW LABEL WORD 

DB 1638U DUP(?) 



VIDE0_RAM ENDS 

.LIST 

INCLUDE SEGMENT. SRC 

CODE SEGMENT BYTE PUBLIC 



EXTRN 


VIDEO PARMS:BYTE 


EXTRN 


P0ST2:NEAR 


EXTRN 


DOS: NEAR 


EXTRN 


D1 1 :NEAR 


EXTRN 


VECTOR TABLE: NEAR 


EXTRN 


KBD RESET: NEAR 


EXTRN 


DUMMY RETURN: NEAR 


EXTRN 


STGTST CNTrNEAR 


EXTRN 


ERR BEEP: NEAR 


EXTRN 


ROM CHECK: NEAR 


EXTRN 


ROS CHECKSUM: NEAR 


EXTRN 


SYSINIT1 :NEAR 


EXTRN 


SHUT2:NEAR 


EXTRN 


SHUTS: NEAR 


EXTRN 


SHUTt|:NEAR 


EXTRN 


SHUT6:NEAR 


EXTRN 


SHUT? : NEAR 


EXTRN 


SHUT9:NEAR 


EXTRN 


PROC SHUTDOWN: NEAR 


EXTRN 


CI :NEAR 


EXTRN 


C2:NEAR 


EXTRN 


C80U2A:NEAR 


EXTRN 


OBF U2A:NEAR 


EXTRN 


C80U2B;NEAR 


EXTRN 


C80l+2C:NEAR 


EXTRN 


OBF U2B:NEAR 


EXTRN 


F3B:NEAR 


EXTRN 


SLAVE VECTOR TABLE: NEAR 


FXTRN 


NMI INT:NFAR 


EXTRN 


PRINT SCREEN: NEAR 


EXTRN 


GATE_A20:NEAR 




ASSUME CS: CODE, SS: CODE 


PUBLIC 


P0ST1 


PUBLIC 


BEGIN 


PUBLIC 


CHK VIDEO 


PUBLIC 


START 1 


PUBLIC 


C8042 


PUBLIC 


OBf 42 


PUBLIC 


on 


PUBLIC 


030 


PUBLIC 


TST4 B 


PUBLIC 


TST4 C 


PUBLIC 


TSTU D 


PUBLIC 


E30B 


PUBLIC 


E30C 



5-32 Testl 



36 36 31 31 38 38 

31 31 30 30 32 32 

38 39 20 20 43 43 

'IF 'IF 50 50 52 52 

2E 2E 20 20 49 19 

H2 12 UD ttO 20 20 

31 31 39 39 38 38 
34 3U 



6181028 COPR. 

6181029 COPR. 

'66118811002289 CCOOPPRR. . 



I B M 

I B M 
I IBBMM 



1 9 8 U ; EVEN 

19 8 4 ;ODD 
11998844' ; COPYRIGHT NOTICE 



INITIAL RELIABILITY TESTS -- PHASE 1 : 

PROG NEAR 

LOAD A BLOCK OF TEST CODE THROUGH THE KEYBOARD PORT 

FOR MANUFACTUING TEST. 

THIS ROUTINE WILL LOAD A TEST (MAX LENGTH= FAFFH ) THROUGH 

THE KEYBOARD PORT. CODE WILL BE LOADED AT LOCATION 

0000:0500. AFTER LOADING, CONTROL WILL BE TRANSFERED 

TO LOCATION 0000:0500. STACK WILL BE LOCATED AT 30:100 

THIS ROUTINE ASSUMES THAT THE FIRST 2 

BYTES TRANSFERED CONTAIN THE COUNT OF BYTES TO BE LOADED 

(BYTE 1=C0UNT LOW, BYTE 2=C0UNT HI.) 



002C 








002C 


hA 






002D 


R4 


DD 




002F 


E8 


0000 


L 


0032 


?B 


CO 




0034 


fit. 


CO 




0036 


H9 


0008 




0039 


OF 






003A 


IF 






003B 


BF 


0000 


E 


003E 


BF 


0020 


K 


0041 


A5 






0042 


4/ 






0043 


47 






0044 


E2 


FB 




0046 


?B 


CO 




0048 


8E 


CO 




004A 


B9 


0008 




004D 


OF 






004E 


IF 






004F 


RF 


0000 


E 


0052 


BF 


OICO 


R 


0055 


A5 






0056 


47 






0057 


47 






0058 


E2 


FB 





005A 


?B 


CO 






005C 


fiF 


D8 






005E 


8F 


CO 






0060 


C7 


06 0008 


R 0000 


0066 


C.7 


06 0014 


R 0000 


006C 


07 


06 0062 


R F600 


0072 


BO 


60 






0074 


Ffi 


0405 


R 




0077 


BO 


09 






0079 


E6 


60 






007B 


Fft 


009D 


R 




007E 


fiA 


F8 






0080 


Ffi 


009D 


R 




0083 


fiA 


E8 






0085 


«A 


CF 






0087 


FC 








0088 


BF 


0500 






008B 










008B 


t4 


64 






008D 


A8 


01 






008F 


74 


FA 






0091 


F4 


60 






0093 


AA 








0094 


E6 


80 






0096 


E2 


F3 






0098 


EA 


0500 




- R 


009D 


F4 


64 






009 F 


A8 


01 






OOAl 


El 


FA 






00A3 


F4 


60 






00A5 


03 









CLl 




NO INTERRUPTS 


DEGATE 


ADDRESS LINE 20 




MOV 


AH. DISABLE B 1 T20 


DEGATE COMMAND 


CALL 


GATE_A20 


ISSUE THE COMMAND 


SETUP 


HARDWARE INT VECTOR TABLE 


LVL 0-7 


SUB 


AX, AX 




MOV 


ES,AX 




MOV 


CX,08 


Gtl VECTOR CNT 


PUSH 


CS 


SETUP DS BEG REG 


POP 


DS 




MOV 


SI, OFFSET VECTOR TABLE 




MOV 


Dl, OFFSET INT PTR 




MOVSW 







SKIP OVER SEGMENT 



SETUP HARDWARE INT VECTOR TABLE LVL 8-15 (VECTORS START AT INT 70H ) 



SUB 

MOV 

MOV 

PUSH 

POP 

MOV 

MOV 

MOVSW 

INC 

INC 



AX, AX 
ES,AX 
CX,08 



SKIP OVER SEGMENT 



SET UP OTHER INTERRUPTS AS NECESSARY 

ASSUME DS:ABSO 

ASSUME ES:ABSO 

SUB AX, AX 

MOV DS,AX 

MOV ES,AX 

MOV NMI PTR, OFFSET NMI_INT 

MOV I NT5_PTR, OFFSET PRINT_SCREEN 

MOV BASIC_PTR+2,0F600H 



ES=0 

NMI INTERRUPT 

PRINT SCREEN 

SEGMENT FOR CASSETTE BASIC 



ENABLE KEYBOARD PORT 



MOV 
CALL 
MOV 
OUT 

CALL 
MOV 
CALL 
MOV 
MOV 
OLD 
MOV 

IN 

TEST 

JZ 

IN 

STOSB 

OUT 

LOOP 

JMP 

IN 



AL,60H 
C8042 

AL,00001001B 
P0RT_A,AL 

MFG_2 
BH,AL 
MFG_2 
CH,AL 
CL,BH 



AL,STATUS_PORT 

AL,0UT_BUF_FULL 

MFG_1 

AL, PORT_A 



MFG_PORT,AL 

MFG_1 

MFG_TEST_RTN 

AL,STATUS_PORT 

AL,OUT_BUF_FULL 

MFG_2 

AL, PORT_A 



WRITE 8042 RAM 
ISSUE THE COMMAND 

SET INHIBIT OVER IDE/ENABLE OBF IN' 
AND NOT PC COMP 

GET COUNT LOW 

SAVE IT 

GET COUNT HI 

CX NOW HAS COUNT 

SET DIR. FLAG TO INCRIMENT 

St I TARGET OFFSET ( DS^OOOO ) 

GET 8042 STATUS PORT 
KB REQUEST PENDING? 
LOOP TILL DATA PRESENT 
GET DATA 
STORE IT 

DISPLAY CHAR AT MFG PORT 

LOOP TILL ALL BYTES READ 

FAR JUMP TO CODE THAT WAS JUST 

LOADED 

CHECK FOR OUTPUT BUFF FULL 

HANG HERE IF NO DATA AVAILABLE 



GET THE COUNT 



TEST. 01 

X286 PROCESSOR TEST (REAL MODE) 
DESCRIPTION 

VERIFY FLAGS, REGISTERS 

AND CONDITIONAL JUMPS 




ASSUME CS: CODE, DS: DATA, ES:NOTH I NG.SS: NOTHING 



00A6 


FA 




00A7 


B4 


D5 


00A9 


9L 




OOAA 


/;i 


2A 


OOAC 


75 


28 


OOAE 


7B 


26 


OOBO 


79 


24 


0082 


9F 





START 1 


: CLl 






MOV 
SAHF 


AH.0D5H 




JNC 


ERR02 




JNZ 


ERR02 




JNP 


ERR02 




JNS 


ERR02 




LAHF 





GO TO ERR ROUTINE IF CF NOT SET 
GO TO ERR ROUTINE IF ZF NOT SET 
GO TO ERR ROUTINE IF PF NOT SET 
GO TO ERR ROUTINE IF SF NOT SET 
LOAD FLAG IMAGE TO AH 



Test 1 5-33 



00B3 


Bl 


05 


00B5 


0? 


EC 


00B7 


73 


ID 


00 B9 


BO 


UO 


OOBB 


00 


to 


OOBD 


71 


17 


008 F 


3? 


Ek 


00C1 


9E 




O0C2 


76 


12 


OOCU 


78 


10 


00C6 


/A 


OE 


00C8 


9K 




00C9 


Bl 


Ob 


OOCB 


U? 


EC 


OOCD 


1? 


7 


oocr 


no 


m 


00D1 


70 


03 


00D3 


HI 


Oit 90 


0006 


E9 


01 AC R 


00D9 






00D9 


H« 




OODC 


8L 


D8 



MOV 


CL,5 


SHR 


AH,CL 


JNC 


ERR02 


MOV 


AL,40H 


SHE 


AL, 1 


JNO 


ERR02 


XOR 


AH, AH 


SAME 




JBE 


ERR02 


JS 


ERR02 


JP 


ERR02 


LAME 




MOV 


CL,5 


SHR 


Atl,CL 


JC 


ERR02 


SHL 


AH, 1 


JO 


ERR02 


JMP 


C7A 


JMP 


ERR01 


MOV 


AX, DATA 


MOV 


DS.AX 



LOAD CNT REG WITH SHIFT CNT 

SHIFT AF INTO CARRY BIT PCS 

GO TO ERR ROUTINE IF AF NOT SET 

SET THE OF FLAG ON 

SETUP FOR TESTING 

GO TO ERR ROUTINE 

SET AH = 

CLEAR SF, CF, ZF, 

GO TO ERR ROUTINE 

GO TO ERR ROUTINE 

GO TO ERR ROUTINE 

GO TO ERR ROUTINE 

LOAD FLAG IMAGE TO AH 

LOAD CNT REG WITH SHIFT CNT 

SHIFT "AF' INTO CARRY BIT POS 

GO TO ERR ROUTINE I F ON 

CHECK THAT 'OF' IS CLEAR 

CO TO ERR ROUTINE I F ON 

CONTINUE 

ERROR EXIT 



SET DATA SEGMENT 



IF 


OF 


NOT 


SET 


AND PF 




1 F 


CF 


ON 




1 F 


7? 


ON 




1 F 


SF 


ON 




1 F 


PF 


ON 





OODE 


EU 


64 


OOEO 


A8 


O't 


00E2 


fb 


03 


OOEU 


E9 


0181 


00E7 






OOE/ 


HO 


8F 


00 E9 


F6 


70 


OOEB 


EB 


00 


OOED 


Fit 


71 


OOEF 


fi6 


CH 


00F1 


80 


EC 09 


OOFU 


/4 


3C 



00F6 


?A 


CO 


OOFS 


F6 


F 1 


00 FA 


BO 


1 1 


OOFC 


F6 


20 


OOFE 


FB 


00 


0100 


BO 


08 


0102 


E6 


21 


0104 


tB 


00 


0106 


BO 


04 


0108 


E6 


21 


OlOA 


FB 


00 


OlOC 


BO 


01 


010E 


F6 


21 


0110 


EB 


00 


0112 


BO 


F F 


0114 


E6 


21 



0118 


E6 AO 


01 1 A 


EB 00 


one 


BO 70 


011E 


E6 Al 


0120 


BO 02 


012? 


EB 00 


0124 


E6 Al 


0126 


EB 00 


0128 


BO 01 


012A 


E6 Al 


012C 


EB 00 


012E 


BO FF 


0130 


E6 Al 



0132 


BO 8F 


0134 


E6 70 


0136 


EB OO 


0138 


2A CO 


013A 


E6 71 


013C 


86 EG 


013E 


3C OA 


0140 


77 2C 


0142 


BE 0158 R 


0145 


03 FO 


0147 


03 FO 


0149 


2E: 8B 1C 


014C 


FA 


014D 


B8 


0150 


8E DO 


015? 


BC 0100 R 


0155 


FB 


0156 


FF E3 


0158 


016E R 


015A 


09B0 R 


015C 


0000 E 



CHECK FOR PROCESSOR SHUTDOWN 



IN 


AL, STATUS PORT 


TEST 


AL.SYS FLAG 


JNZ 


C7B 


JMP 


C7 


CHECK 


FOR SHUTDOWN 9 


MOV 


AL,SHUT DOWN 


OUT 


CMOS PORT.AL 


JMP 


SHORT $+2 


IN 


AL,CMOS PORT+1 


XCHG 


AL,AH 


CMP 


AH,09H 



CHECK FOR SHUTDOWN 
GO I F YES 



CMOS ADDR FOR SHUTDOWN BYTE 

10 DELAY 

GET WHO 

SAVE THE SHUTDOWN REQUEST 

WAS IT SHUTDOWN REQUEST 9? 

BYPASS I NIT OF I NT CH I PS 



RE- INITIALIZE THE 8259 INTERRUPT tf^ CONTROLLER CHIP 



SUB 


AL.AL 


OUT 


X287+1,AL 


MOV 


AL,11H 


OUT 


INTAOO,AL 


JMP 


SHORT $+2 


MOV 


AL,8 


OUI 


INIAOl ,AL 


JMP 


SHORT $+2 


MOV 


AL,04H 


OUT 


INTAOl ,AL 


JMP 


SHORT $+2 


MOV 


AL,01H 


OUT 


INTAOl ,AL 


JMP 


SHORT $+2 


MOV 


AL,OFFH 


OUT 


INTAOl ,AL 



INSURE 


MATH 


PROCESSOR 


RESET 




ICWI - 


EDGE 


, MASTER, 


CW4 




WAIT STATE 
SETUP ICW2 


FOR 10 

- INT TYPE 


8 (8- 


F) 



WAIT STATE FOR 10 
SETUP ICW3 - MASTER LV 



WAIT STATE FOR 10 
MASK ALL INTS. OFF 
(VIDEO ROUTINE ENABLES 



RE- INITIALIZE THE 8259 INTERRUPT //2 CONTROLLER CH I i 



MOV 


AL, 11H 


OUI 


INIBOO.AL 


JMP 


SHORT $+2 


MOV 


AL, INT TY 


OUT 


INTBOl ,AL 


MOV 


AL,02H 


JMP 


SHORT $+2 


OUT 


INTBOl ,AL 


JMP 


SHORT $+2 


MOV 


AL,01H 


OUT 


INTBOl ,AL 


JMP 


SHORT $+2 


MOV 


AL,OFFH 


OUT 


INTBOl, AL 



ICWI - EDGE, SLAVE ICW4 



SETUP ICW3 - SLAVE LV 2 



SHUTDOWN 

RETURN CONTROL AFTER A SHUTDOWN COMMAND IS ISSUED 

DESCRI PTION 

A TEST IS MADE FOR THE SYSTEM FLAG BEING SET. IF 

THE SYSTEM FLAG IS SET, THE SHUTDOWN BYTE IN CMOS 

IS USED TO DETERMINE WHERE CONTROL IS RETURNED. 

CMOS = SOFT RESET OR UNEXPECTED SHUTDOWN 

CMOS = 1 SHUT DOWN AFTER MEMORY SIZE 

CMOS = 2 SHUT DOWN AFTER MEMORY TEST 

CMOS = 3 SHUT DOWN WITH MEMORY ERROR 

CMOS = 4 SHUT DOWN WITH BOOT LOADER REQUEST 

CMOS = 5 JMF" DWORD REQUEST (WITH INT INIT) 

CMOS = 6 PROTECTED MODE TEST7 PASSED 

CMOS = 7 PROTECTED MODE TEST7 FAILED 

CMOS = 8 PROTECTED MODE TEST! FAILED 

CMOS = 9 BLOCK MOVE SHUTDOWN REQUEST 

CMOS = A JMP DWORD REQUEST (W/0 INT INIT) 



CHECK FROM WHERE 



MOV 

OUT 

JMP 

SUB 

OUT 

XCHG 

CMP 

JA 

MOV 

ADD 

ADD 

MOV 

CLI 

MOV 

MOV 

MOV 



BRANCH: DW 



AL,SHUT_DOWN 

CM0S_P0R7, AL 

SHORT $+2 

AL,AL 

CM0S__P0RT+1,AL 

AH,AL 

AL.OAH 

SIIUTO 

SI, OFFSET BRANCH 

SI, AX 

SI ,AX 

BX,CS: [SI i 

AX, STACK 

SS,AX 

SP. OFFSET TOS 



SHUTO 
SHUTl 
SHUT2 



CLEAR CMOS BYTE 



MAX TABLE ENTRYS 
GO I F GREATER THAN MAX 
GET THE START OF BRANCH TABLE 



SET STACK 



JUMP BACK 



NORMAL POWER bP/UNEXPECTED SHUTDOWN 
SHUT DOWN AFTER MEMORY SIZE 
SHUT DOWN AFTER MEMORY TEST 



5-34 Testl 



015E 


0000 E 


0160 


0000 E 


0162 


0171 R 


0164 


0000 E 


0166 


0000 E 


0168 


07F7 R 


016A 


0000 E 


016C 


017D R 


016E 


EB 


11 90 


0171 


EU 


64 


0173 


A« 


01 


0175 


74 


02 


0177 


m 


60 


0179 


BO 


20 


017B 


L6 


20 


017D 


FF 


2E 0067 R 


0181 


BO 


01 


0183 


t6 


80 



SHUTS 
SHUT4 
SHUT5 
SHUT6 
SHUT7 
SHUT8 
SHUT9 
SHUTA 
C7 



SHUT DOWN WITH MEMORY ERROR 

SHUT DOWN WITH BOOT_LOA0ER REQUEST 

JMP DWORD REQUEST (WITH INTERRUPT INIT) 

PROTECTED MODE TEST7 PASSED 

PROTECTED MODE TEST7 FAILED 

PROTECTED MODE TEST1 FAILED 

BLOCK MOVE SHUTDOWN REQUEST 

JMP DWORD REQUEST (W/O INTERRUPT INIT) 



IO_ROM_INIT MUST BE INITIALIZED BY THE USER 



SHUT5: IN AL,STATUS_PORT 

TEST AL,OUT_BUF_FULL 

JZ SHUT5B 

IN AL.PORT_A 

SHUT5B: MOV AL,EOI 

OUT !NTAO0,AL 

SHUTA: JMP DWORD PTR DS: I 0_ROM_ I N 1 T; 



GO I F NOT 

FLUSH 

FLUSH LAST TIMER TICK 

-TO ALLOW TIMER INTERRUPTS 



■ CHECKPOINT 1 



0185 B8 FFFF 



0189 


73 


21 


018B 


8E 


D8 


018D 


«C 


l)B 


018F 


8E 


C3 


0191 


«C 


(;i 


0193 


8E 


D1 


0195 


8C 


0? 


0197 


fiB 


f? 


0199 


fiB 


FC 


019B 


«B 


1-5 


019D 


8B 


FE 


019F 


73 


0/ 


01A1 


33 


C7 


01 A3 


1^ 


07 


01A5 


h8 




01A6 


FB 


F3 


01A8 






01A8 


OB 


C/ 


01 AA 


74 


01 


01 AC 


F4 





01AF 


F6 


70 


01B1 


FB 


00 


01B3 


F4 


71 


01B5 


86 


C4 


01B7 


80 


E4 07 


01 BA 


BO 


8B 


01 BC 


F6 


70 


01BE 


86 


C4 


01 CO 


FB 


00 


01C2 


E6 


71 


01C4 


FB 


00 


01C6 


BO 


8C 


01C8 


F6 


70 


01 CA 


FB 


00 


01CC 


E4 


71 



DICE 


B8 


R 




01D1 


8L 


D8 




01D3 


81 


3E 0072 R 


1?34 


01 D9 


/4 


OB 




01 DB 


?A 


CO 




01 DD 


RA 


03D8 




01E0 


FF 






01E1 


FL 


CO 




01E3 


B2 


B8 




01E5 


EL 






01 E6 


BO 


FC 




01 E8 


L6 


61 





MOV 
STC 
JNC 
MOV 
MOV 
MOV 
MOV 
MOV 
MOV 
MOV 
MOV 
MOV 
MOV 
JNC 
XOR 
JNZ 
CLC 
JMP 



ERR01 
DS,AX 
BX, DS 
ES.BX 
CX, ES 
SS,CX 
DX,SS 
SP,DX 
BP,SP 
S1,BP 
DI,SI 



C10A: 


MOV 


1 MA 1 i^nuca oi_ui-t\ 
AL,CMOS ALARM 




OUT 


CMOS PORT,AL 




JMP 


SHORT $+2 




IN 


AL.CMOS PORT+1 




XCHG 


AL,AH 




AND 


AH,07H 




MOV 


AL,CMOS ALARM 




OUT 


CMOS PORT.AL 




XCHG 


AL,AH 




JMP 


SHORT $+2 




OUT 


CM0S_P0RT+1,AL 




JMP 


SHORT $+2 




MOV 


AL,CMOS ALARM+1 




OUT 


CMOS PORT.AL 




JMP 


SHORT $+2 




IN 


AL,CM0S_P0RT+1 




— RESET 


VIDEO 




ASSUME 


DS:DATA 




MOV 


AX, DATA 




MOV 


DS,AX 




CMP 


RESET FLAG,1234H 




JZ 


SFT_RST 




SUB 


AL,AL 




MOV 


DX,3D8H 




OUT 


DX,AL 




INC 


AL 




MOV 


DL, 0B8H 




OUT 


DX, AL 


SFT_RST 


:MOV 


AL, niniooB 




OUT 


PORT B,AL 



SETUP ONE'S PATTERN IN AX 

SET CARRY FLAG 

GO I F NO CARRY 

WRITE PATTERN TO ALL REGS 



PATTERN MAKE IT THRU ALL REGS 
NO - CO TO ERR ROUTINE 
CLEAR CARRY FLAG 

TST1A 

ZERO PATTERN MAKE IT THRU? 
YES - GO TO NEXT TEST 
HALT SYSTEM 



GET THE CURRENT CONTROL REG 

SAVE IT 

CLEAR SET, PIE, A IE, AND SQWE BITS 



SET DATA SEGMENT 
SOFT RESET? 
GO I F YES 



DISABLE COLOR VIDEO 



01 EA 


BO 


02 


01 EC 


£6 


80 


01EE 


B9 


0009 


01F1 


B4 


01 


01 F3 


BO 


8F 


01 F5 


E6 


70 


01 F7 


8A 


C4 


01 F9 


EB 


00 


01 FB 


E6 


71 


01FD 


BO 


8F 


01FF 


EB 


00 


0201 


E6 


70 


0203 


FB 


00 


0205 


F4 


71 


0207 


3A 


C4 


0209 


75 


A1 


020B 


DO 


D4 


020D 


E2 


E4 



TEST. 02 

VER I FY CMOS SHUTDOWN BYTE 
DESCRIPTION 

ROLLING BIT WRITTEN AND VER I 

AT SHUTDOWN ADDRESS 



; VERIFY 


AND CLEAR SHUTDOWN FLAG 




MOV 


AL,2 


<><><><><><><><><><><> 


OUT 


MFG_PORT,AL 


OOOCHECKPOINT 2<><> 


MOV 


CX,09H 


LOOP COUNT 


MOV 


AH, 1 


START WITH BIT 


C10B: MOV 


AL,SHUT DOWN 




OUT 


CMOS PORT,AL 




MOV 


AL,AH 


OUTPUT ROLLING BIT 


JMP 


SHORT $+2 


10 DELAY 


OUT 


CMOS PORT+1, AL 




MOV 


AL.SHUT DOWN 


READ CMOS 


JMP 


SHORT $+2 


10 DELAY 


OUT 


CMOS PORT,AL 




JMP 


SHORT $+2 


10 DELAY 


IN 


AL.CMOS PORT+1 




CMP 


AL.AH 


MUST BE THE SAME 


JNZ 


ERR01 


ERROR 1 F NOT 


RCL 


AH,1 


ROLL A BIT THRU SHUT DOWN 


LOOP 


C10B 


LOOP TILL DONE 



TEST. 03 

ROS CHECKSUM TEST I 

DESCRIPTION 

A CHECKSUM IS DONE FOR THE 32K 
ROS MODULES CONTAINING POD AND 



Test 1 5-35 



020F 


RO 


03 




0211 


E6 


80 




0213 


8C 


C8 




0215 


at 


DO 




0217 


8E 


08 




0219 


RB 


0000 


R 


021C 


BC 


0000 


e: 


021 F 


h9 


0000 


F 


0222 








0222 


f^ 


01 




0224 


FU 







' CHECKPOINT 3 
MOV AL,0 



MOV 
MOV 
MOV 

ASSUME SS:CODE 



BX, OFFSET BEGIN 
SP, OFFSET 01 
ROS_CHECKSUM 



HLT 



StfUP SS SEG REG 



HALT SYSTEM I F ERROR 



TEST. 04 

8253 CHECK TIMER 1 ALL BITS ON 
DESCRI PTION 

SET TIMER COUNT 

CHECK THAT TIMER 1 ALL BITS ON 



0225 B8 --■ 

0228 8E D8 

022A BO OU 

022C E6 80 



ASSUME DS:DATA 
MOV AX, DATA 
MOV DS,AX 
MOV AL,04H 
OUT MFG_P0RT,AL 

DISABLE DMA CONTROLLER 



022E 


E6 


08 


0230 


E6 


DO 


0232 


fiB 


16 0072 R 


0236 


BO 


54 


0238 


t6 


43 


023A 


EB 


00 


023C 


8A 


CI 


023E 


F6 


41 


0240 


B/ 


05 


0242 






0242 


BO 


40 


0244 


FB 


00 


0246 


F6 


43 


0248 


80 


FB FF 


024B 


fit 


OB 


024D 


K4 


41 


024 F 


OA 


D8 


0251 


E2 


EF 


0253 


FF 


CF 


0255 


75 


EB 


0257 


F4 





MOV 


AL,04 


OUT 


DMA08,AL 


OUT 


DMA18,AL 


^ERI FY 


THAT TIMER 1 FU 


MOV 


DX, RESET FLAG 


MOV 


AL,54H 


OUT 


TIMER+3,AL 


JMP 


SHORT $+2 


MOV 


AL,CL 


OUT 


TIMFR+1,AL 


MOV 


BH,05H 


MOV 


AL,40H 


JMP 


SHORT $+2 


OUT 


TIMER+3,AL 


CMP 


BL.OFFH 


JE 


C13 


IN 


AL,TIMER+1 


OR 


BL,AL 


LOOP 


C12 


DEC 


BH 


JNZ 


C12 


HLT 





SET DATA SEGMENT 
OOOOCHECKPOINT 4< 



AL ALREADY = 04H 
DISABLE DMA CONTROLLER 1 
DISABLE DMA CONTROLLER 2 



LOOP COUNT 
TIMER1_BITS_0N 
LATCH TIMER 1 COUNT 
10 DELAY 

YES - SEE IF ALL BITS GO 01 

TIMER1_B1TS_0FF 

READ TIMER 1 COUNT 

ALL BITS ON IN TIMER 

T1MER1_BITS_0N 

TRY AGAIN 
TIMER 1 FAILURE, HALT SYS 
TIMER1_BITS_0FF 



TEST. 05 

8253 CHECK TIMER 1 ALL BIT OFF 
DESCRI PTION 

SET TIMER COUNT 

CHECK THAT TIMER 1 ALL BITS OFF 



CHECKPOINT 5 



0258 


BO 


05 


025A 


E6 


80 


025C 


8A 


C3 


025E 


?B 


cy 


0260 


F6 


41 


0262 


R7 


05 


0264 






0264 


fB 


no 


0266 


BO 


40 


0268 


F6 


43 


026A 


LB 


00 


026C 


l-B 


00 


026E 


F4 


41 


0270 


?? 


08 


0272 


74 


0/ 


0274 


F2 


Fh 


0276 


FF 


ci- 


0278 


75 


EA 


027A 


^4 





MOV 
SUB 
OUT 
MOV 

JMP 
MOV 
OUT 
JMP 
JMP 



LOOP 
DEC 
JNZ 

HLT 



AL,BL 
CX,CX 
TIMER+I.AL 
BH,05H 

SHORT $+2 

AL,40H 

TIMER+3,AL 

SHORT $+2 

SHORT $+2 

AL,TIMER+1 

BL,AL 



C15 
C14 



oooCHECKPOINT 5<><: 
SET TIMER 1 CNT 



SET TRY AGAIN COUNT 
T1MER_L00P 

10 DELAY 
LATCH TIMER 1 COUNT 

DELAY FOR TIMER 
ADDED DELAY FOR TIMER 
READ TIMER 1 COUNT 



HALT SYSTEM 



TEST. 06 

8237 DMA INITIALIZATION CHANNEL REGISTER TEST 
DESCRI PTION 

DISABLE THE 8237 DMA CONTROLLER. 

WRITE/READ THE CURRENT 

ADDRESS AND WORD COUNT REGISTERS FOR ALL 

CHANNELS. 



CHECKPOINT 6 



027B 






027B 


B8 




027E 


Rh 


D8 


0280 


BO 


06 


0282 


F6 


80 


0284 


89 


16 


0288 


L6 


00 


028A 


RO 


FF 


028C 


8A 


D8 


028E 


«A 


F8 


0290 


B9 


0008 


0293 


BA 


0000 


0296 


EE 




0297 


LB 


00 


0299 


LL 




029A 


BO 


01 


029C 


FB 


00 


029E 


KG 




029F 


FB 


00 


02A1 


RA 


EO 


02A3 


tc 





MOV 
MOV 
MOV 
OUT 
MOV 
OUT 



AL,06H 
MFG_PORT,AL 
RESET^FLAG.DX 
DMA+ODH,AL 



SET DATA SEGMENT 

OOOCHECKPOINT 6<><><> 
RESTORE SOFT RESET FLAG 
SEND MASTER CLEAR TO DMA 



■ WRAP DMA CHANNEL ADDRESS AND COUNT REGISTERS 



MOV 
MOV 
MOV 
MOV 
MOV 
OUT 
JMP 
OUT 
MOV 
JMP 



AL,OFFH 

BL,AL 

BH.AL 

CX,8 

DX, DMA 

DX.AL 

SHORT $+2 

DX, AL 

AL,01H 

SHORT $+2 

AL,DX 

SHORT $+2 

AH,AL 

AL,DX 



SETUP LOOP CNT 

SETUP I/O PORT ADDR OF REG 

WRITE PATTERN TO REG, LSB 

WAIT STATE FOR 10 

MSB OF 16 BIT REG 

AL TO ANOTHER PAT BEFORE RD 

WAIT STATE FOR 10 

READ 16-BIT DMA CH REG, LSB 

WAIT STATE FOR 10 

SAVE LSB OF 16-BIT REG 

READ MSB OF DMA CH REG 



5-36 Test 1 



02An 


3B 


08 


02A6 


7U 


01 


02A8 


fk 




02A9 






02A9 


^2 




02AA 


K2 


EA 


02AC 


Ft 


CO 


02AE 


74 


DC 


02B0 


fiO 


FB 55 


02B3 


7'i 


09 


02B'j 


«() 


hB AA 


02B8 


li\ 


08 


02BA 


BO 


55 


02BC 


tB 


CE 


02BE 


BO 


AA 


02CO 


EB 


CA 



0202 


BO 


07 


02CU 


F6 


80 


02C6 


L6 


DA 


02C8 


BO 


FF 


02CA 


8A 


D8 


02CC 


«A 


F8 


02CE 


89 


0008 


02D1 


HA 


OOCO 


02DU 


FF 




02D5 


FB 


00 


02D7 


FF 




02D8 


HO 


01 


02DA 


^B 


00 


02DC 


yr. 




02DD 


FB 


00 


02DF 


8A 


EO 


02E1 


FC 




02E2 


3B 


D8 


02E4 


74 


01 


02E6 


Ht 




02E7 






02E7 


B3 


C2 02 


02EA 


\? 


E8 


02EC 


FE 


GO 


02CC 


m 


DA 


02FO 


80 


FB 55 


02F3 


ih 


09 


02F5 


«0 


FB AA 


02F8 


lU 


08 


02 FA 


BO 


55 


02FC 


EB 


CC 


02FE 


BO 


AA 


0300 


EB 


C8 


0302 


8B 


IE 0072 


0306 


A3 


0010 R 


0309 


BO 


12 


030B 


E6 


'n 


030D 






030D 


?A 


CO 


030F 


E6 


08 





CMP 


BX,AX 




PATTERN READ AS WRITTEN? 




JE 


C18 




YES - CHECK NEXT REG 




HLT 






NO - HALT THE SYSTEM 


18: 








NXT DMA CH 




INC 


DX 




SET 10 PORT TO NEXT CH REG 




LOOP 


C17 




WRITE PATTERN TO NEXT REG 




INC 


AL 




SET PATTERN TO 




JZ 


C16 




YES CONT INUE 






DMA WITH 55 


PATTERN 












CMP 


BL,55H 




CHECK IF 55 PATTERN DONE 




JZ 


C19 




GO 1 F YES 




CMP 


BL.OAAH 




CHECK IF AA PATTERN DONE 




JZ 


C2C 




GO IF YES 




MOV 


AL,55H 








JMP 


C16 
DMA WITH AA 


PATTERN 










19: 


MOV 
JMP 


AL.OAAH 
C16 







TEST. 07 

8237 DMA 1 INITIALIZATION CHANNEL REGISTER TEST 
DESCRIPTION 

DISABLE THE 8237 DMA CONTROLLER 1. 

WRITE/READ THE CURRENT DMA 1 

ADDRESS AND WORD COUNT REGISTERS FOR ALL 

CHANNELS. 



-- CHECKPOINT 7 DMA 1 

MOV AL,07H 

OUT MFG_PORT,AL 

OUT DMA1+0DH*2,AL 

WRAP DMA 1 CHANNEL ADDRESS AND COUNT REGISTERS 



MOV 


AL,OFFH 


MOV 


BL,AL 


MOV 


BH,AL 


MOV 


CX, 8 


MOV 


DX,DMA1 


OUT 


DX,AL 


JMP 


SHORT $+2 


OUT 


DX,AL 


MOV 


AL,01H 


JMP 


SHORT $+2 


IN 


AL,DX 


JMP 


SHORT $+2 


MOV 


AH,AL 


IN 


AL.DX 


CMP 


BX,AX 


JE 


C18A 


HLT 




ADD 


DX,2 


LOOP 


C17A 


INC 


AL 


JZ 


C16A 


- WRITE 


DMA WITH 55 PATTERN 


CMP 


BL,55H 


JZ 


C20A 


CMP 


BL.OAAH 


JZ 


021 


MOV 


AL,55H 


JMP 


C16A 


- WRITE 


DMA WITH AA PATTERN 


MOV 


AL.OAAH 


JMP 


C16A 



SETUP LOOP CNT 

SETUP I/O PORT ADDR OF REG 

WRITE PATTERN TO REG, LSB 

WAIT STATE FOR 10 

MSB OF 16 BIT REG 

AL TO ANOTHER PAT BEFORE RD 

WAIT STATE FOR 10 

READ 16-BIT DMA CH REG, LSB 2ST DMA 

WAIT STATE FOR 10 

SAVE LSB OF 16-BIT REG 

READ MSB OF DMA CH REG 

PATTERN READ AS WRITTEN? 

YES - CHECK NEXT REG 

NO - HALT THE SYSTEM 

NXT_DMA_CH 

SET 10 PORT TO NEXT CH REG 

WRITE PATTERN TO NEXT REG 

SET PATTERN TO 

YES CONTINUE 



CHECK IF 55 PATTERN DONE 
GO I F YES 

CHECK IF AA PATTERN DONE 
GO I F YES 



INITIALIZE AND START MEMORY RE 

MOV BX,RESET_FLAG 

MOV EQUIP_FLAG,AX 

MOV AL,18 

OUT TIMER+I.AL 

- SET DMA COMMAND 



FRESH. 

GET THE RESET FLAG 



DACK SENSE LOW.DREQ SENSE HIGH 

LATE WRITE, FIXED PR I OR I TY, NORMAL TIMING 

CONTROLLER ENABLE, CHO ADDR HOLD DISABLE 

MEMORY TO MEM DISABLE 

SAME TO SECOND CONTROLLER 



0313 


BO 


40 


0315 


E6 


OB 


0317 


BO 


GO 


0319 


L6 


D6 


031B 


IB 


00 


031D 


BO 


41 


031F 


F6 


OB 


0321 


F6 


D6 


0323 


FB 


00 


0325 


BO 


42 


0327 


F6 


OB 


0329 


h6 


D6 


032B 


FB 


00 


032D 


BO 


43 


032F 


F6 


OB 


0331 


E6 


D6 


0333 


89 


IE 0072 R 



MOD 

MOV 


^ SET ALL DMA C 
AL.40H 


OUT 


DMA+OBH,AL 


MOV 


AL.OCOH 


OUT 


DMA18+06H,AL 


JMP 


SHORT $+2 


MOV 


AL.41H 


OUT 


DMA+OBH.AL 


OUT 


DMA18+06H,AL 


JMP 


SHORT $+2 


MOV 


AL,42H 


OUT 


DMA+OBH.AL 


OUT 


DMA18+06H.AL 


JMP 


SHORT $+2 


MOV 


AL,43H 


OUT 


DMA+OBH.AL 


OUT 
RESTC 


DMA18+06H,AL 
)RE RESET FLAG 



SET MODE FOR CHANNEL 

SET CASCADE MODE ON CHANNEL 4 



SET MODE FOR CHANNEL 5 

WAIT STATE FOR 10 

SET MODE FOR CHANNEL 2 

SET MODE FOR CHANNEL 6 

WAIT STATE FOR 10 

SET MODE FOR CHANNEL 3 

SET MODE FOR CHANNEL 7 



TEST. 08 

DMA PAGE REGISTER TEST 
DESCRI PTION 

WRITE/READ ALL PAGE REGISTERS 



0337 BO 08 



■ CHECK POINT 8 
MOV AL.OSH 



:><><><><><><><><><><><> 



Test 1 5-37 



0339 


F6 


80 


033B 


?A 


CO 


0330 


BA 


0081 


0340 


BO 


OOFF 


0343 


K 




0344 


4? 




0345 


Ft 


CO 


0347 


m 


FA 008F 


034B 


75 


F6 


034D 


86 


EO 


034F 


FF 


CC 


0351 


4A 




0352 


?K 


CO 


0354 


FC 




0355 


3 A 


CU 


0357 


/5 


30 


0359 


l-L 


CC 


035B 


4A 




035C 


81 


FA 0080 


0360 


/5 


FO 


0362 


yt 


CU 


0364 


8A 


C1+ 


0366 


t2 


DB 


0368 


BO 


CC 


036A 


BA 


008F 


036D 


8A 


EO 


036F 


EE 




0370 


?A 


CO 


0372 


EC 




0373 


3 A 


C4 


0375 


75 


r^ 


0377 


80 


FC CC 


037A 


(^5 


ou 


037C 


BO 


33 


037E 


LB 


EA 


0380 


80 


FC 00 


0383 


74 


05 


0385 


?A 


CO 


0387 


EB 


El 



038A 


BO 


09 


038C 


E6 


80 


038E 


?R 


C9 


0390 


F4 


61 


0392 


A8 


10 


0394 


F1 


FA 


0396 


Ih 




0398 


2B 


cy 


039A 


h4 


61 


039C 


A« 


10 


039E 


FO 


FA 


03A0 


75 


t/ 



03A2 


BO 


OA 


03A4 


E6 


80 


03A6 


?B 


C9 


03A8 


E4 


6U 


03AA 


KA 


EO 


03AC 


h6 


CU 01 


03AF 


/4 


02 


0381 


h4 


60 


03B3 


h6 


CU 02 


03B6 


FO 


FO 


0388 


74 


01 





OUT 


MFC PORT.AL 






SUB 


AL,AL 






MOV 


DX,DMA PAGE 






MOV 


CX,OFFH 




C22A: 


OUT 


DX,AL 






INC 


DX 






INC 


AL 






CMP 


DX.8FH 






JNZ 


C22A 






XCHG 


AH,AL 






DEC 


AH 






DEC 


DX 




C22B: 


SUB 


AL,AL 






IN 


AL,DX 






CMP 


AL,AH 






JNZ 


C26 






DEC 


AH 






DEC 


DX 






CMP 


DX.MFG PORT 






Ml 


C22B 






INC 


AH 






MOV 


AI.,AH 






LOOP 


C22A 








LAST DMA PAGE REGISTER 
AL,OCCH 


(US 




MOV 


C22: 


MOV 


DX,LAST DMA PAGE 






MOV 


AH,AL 




C23: 


OUT 


DX,AL 






--- VERI 


FY PAGE REGISTER 8F 




C24: 


SUB 


AL,AL 






IN 


AL,OX 






CMP 


AL.AH 






JNZ 


C26 






CMP 


AH,OCCH 






JNZ 


C25 






MOV 


AL,033H 






JMP 


C22 




C25: 


CMP 


AH,0 






JZ 


C27 






SUB 


AL,AL 






JMP 


C22 








HALT 




C26: 


HLT 





oooCHECKPOl NT 8<><><> 
DO ALL UAIA PATTERNS 

TEST DMA PAGES 81 THUR 8EI 

SAVE CURRENT DATA PATTERN 
CHECK LAST WRITTEN 

CHANGE DATA BEFORE READ 



CONTINUE TILL PORT 80 
NEXT PATTERN TO RIPPLE 



WRITE AN CC TO PAGE REGISTERS 



GO I F ERROR 

GO I F ERROR 

SET UP DATA PATTERN OF 33 

DO DATA 3 3 

CHECK DONE 

GO I F YES 

SET UP FOR DATA PATTERN 00 

DO DATA 



HALT SYSTEM 



TEST. 09 

STORAGE REFRESH TEST 
DESCRI PTION 

VERIFY STORAGE REFRESH IS OCCURRING 



CHECKPOINT 9 TEST MEMORY REFRESH 



SUB CX,CX 

IN AL,PORT_B 

TEST AL,REFRESH_BI I 

LOOPZ C28 

JZ C26 

SUB CX,CX 

IN AL,PORT_B 

TEST AL,REFRESH_BIT 

LOOPNZ C29 

JNZ C26 



INSURE REFRESH BIT IS TOGGLING 



NSURC REFRESH IS ON 
NO REFRESH 



GO 



TEST. 10 

8042 TEST AND CONFIGURATION JUMPERS 
DESCRI PTION 

ISSUE A SELF TEST TO THE 8042 

INSURE A 55H IS RECEIVED 

GET MANUFACTURING/DISPLAY TYPE JUMPER 
INPUT PORT INFO SAVED IN MFG_TEST 



CHECKPOINT OA 

; ooCHECPOINT OAooo 
SOFT RESET (HANDLE ALL POSSIBLE CONDITIONS) 



FLUSH 

IS THE OUTPUT BUFFER ALSO FULL? 

TRY AGAIN 

CONTINUE IF OK 

HALT SYSTEM IF BUFFER FULL 



SUB 


CX,CX 


IN 


AL, STATUS PORT 


MOV 


AH.AL 


TEST 


AH, OUT BUF FULL 


JZ 


TST2 


IN 


AL,PORT A 


TEST 


AH, INPT BUF FULL 


LOOPNZ 


TST1 


JZ 


TST4 



03BB 


BO 


OB 


03BD 


E6 


80 


03BF 


BO 


AA 


03C1 


Bc; 


OOOO 


03C4 


FB 


3F 90 


03C7 


AR 


01 


03C9 


74 


02 


03CB 


e4 


60 


03CD 


BC 


OOOO 


03D0 


EB 


3F 90 


03D3 


F4 


60 


03D5 


3C 


55 


03D7 


BO 


OC 


03D9 


L6 


80 



03DB 75 DD 



03DD BO CO 

03DF BC OOOO E 

03E2 EB 21 90 

03E5 BC OOOO E 



TST4 




MOV 


AL.OBH 






OUT 


MFG_PORT,AL 






MOV 


AL.OAAH 






MOV 


SP, OFFSET C8042A 






JMP 


C8042 


TST4 


B: 


TEST 


AL,0UT BUF FULL 






JZ 


TST4 A 






IN 


AL,P0RT A 


TST4 


A: 


MOV 


SP, OFFSET OBF 42A 






JMP 


OBF 42 


TST4 


C: 


IN 


AL,PORT A 






CMP 


AL,55H 






MOV 


AL,OCH 






OUT 


MFG_PORT,AL 






JNZ 


ERRO 




-- 


- GET 


THE SWITCH SETTINGS 






MOV 


AL.OCOH 






MOV 


SP, OFFSET C8042C 






JMP 


C8042 


E30B 




MOV 


SP, OFFSET OBF 42B 



:><><>CHECKPOI NT OB ■ 



IS THE OUTPUT BUFFER FULL? 

GO I F NOT 

FLUSH 

SET RETURN ADDR 

GO WAIT FOR BUFFER 

GET THE ENDING RESPONSE 



oooCHECKPOl NT OC <>< 
GO I F NOT OK 



READ INPUT COMMAND 
SET RETURN ADDRESS 
ISSUE COMMAND 
SET RETURN ADDRESS 



5-38 Test 1 



03E8 


FR 


27 90 


03EB 


F4 


60 


03ED 


E6 


82 


03EF 


BO 


60 


03F1 


BC 


0000 


03FU 


yn 


OF 90 


03F7 


74 


05 


03F9 


BO 


OD 


03FB 


e6 


80 


03FD 


F4 




03FE 


BO 


5D 


0400 


E6 


60 


0U02 


LB 


IE 90 


0405 


FA 




0406 


E6 


64 


0408 


?B 


C9 


040A 


E4 


64 


040C 


A8 


02 


040E 


FO 


FA 


0410 


C3 




0411 


28 


C9 


0413 


B3 


06 


0415 


F4 


64 


0417 


A8 


01 


0419 


75 


06 


041B 


F2 


F8 


041D 


FF 


CB 


041 F 


75 


F4 


0421 


C3 









JMP 


OBF 42 


E30C 




IN 


AL, PORT A 






OUT 


DMA_PAGE+1,AL 






WRITE 


BYTE OF 8042 RAM 










MOV 


AL,60H 






MOV 


SP, OFFSET C8042B 






JMP 


C8042 


TST4. 


-D: 


JZ 


TSTU_D1 






MOV 


AL.ODH 






OUT 


MFC P0RT,AL 






HLT 




TST4 


ni 


:M0V 


AL,5DH 






OUT 


PORT A,AL 






JMP 


E30A 



GO WAIT FOR RESPONSE 
GET THE SWITCH 
SAVE TEMP 



WRITE BYTE COMMAND 

SET RETURN ADDR 

ISSUE THE COMMAND 

CONTINUE IF COMMAND ACCEPTED 



; oooCHECKPOINT OD <><> 

ENABLE OUTPUT BUFF FULL INT - DISABLE KEYBOARD 
SET SYS FLAG - PC 1 COMP - I NH OVERRIDE 
CONTINUE 



STATUS_PORT,AL 





SUB 


CX,CX 


C42 1 : 




AL, STATUS PORT 




TEST 


AL, INPT BUF FULL 




LOOPNZ 


C42 1 




RET 






-WAIT 


FOR 8042 RESPONSE 




OBF 42: 


SUB 


CX.CX 




MOV 


BL,6 


C42 2: 


IN 


AL, STATUS PORT 




TFST 


AL,OUT BUF FULL 




JNZ 


CU2 3 




LOOP 


C42 2 




DEC 


BL 




JNZ 


C42 2 


C42 3: 


RET 





GO IF RESPONSE 

TRY AGAIN 

DECREMENT LOOP COUNT 

RETURN TO CALLER 



TEST. 11 

BASE 64K READ/WRITE STORAGE TEST 

DESCRI PTION 

WRITE/READ/VERIFY DATA PATTERNS 
AA,55,FF,01, AND 00 TO 1ST 64K OF 
STORAGE. VERIFY STORAGE ADDRESSABILITY. 



FILL MEMORY WITH DATA 



0422 


BO 


OF 




0424 


E6 


80 




0426 


Rft 





R 


0429 


RF 


D8 




042B 


RB 


IE 00 rz R 


042F 


FC 






0430 


B9 


8000 




0433 


?B 


FF 




0435 


?B 


F6 




0437 


?B 


CO 




0439 


8E 


D8 




04 3 B 


RF 


CO 




043D 


R1 


FB 1234 


0441 


75 


03 




0443 


F9 


05E6 


R 


0446 


BO 


OF 




0448 


E6 


80 




044A 


BO 


80 




044C 


F6 


87 




044 E 


BC 


0000 


E 


0451 


F9 


0000 


E 


0454 


8B 


D8 




0456 


75 


03 




0458 


E9 


05F1 


R 



;SET CHECKPOINT (E) 



MOV 
MOV 
MOV 
CLD 
MOV 
SUB 
SUB 
SUB 
MOV 
MOV 
CMP 
JNZ 
JMP 



AX, DATA 

DS, AX 

BX, RESET_FLAG 



SI, SI 



;,AX 
DS,AX 
ES,AX 
BX, 1234H 
E30A_0 
CLR_STG 



GET THE SYSTEM SEGMENT 

OF DATA 
SAVE RESET__FLAG IN BX 
SET DIR FLAG TO INC. 
SET FOR 32K WORDS 
FIRST 16K 



GET THE INPUT BUFFER (SWITCH SETTINGS) 



MOV 
OUT 
MOV 
JMP 
C30: MOV 
JNZ 
JMP 



AL, PRTY_CHK 

DMA_PAGE+6,AL 

SP, OFFSET C2 

STGTST_CNT 

BX,AX 

C31 

C33 



SET BASE RAM PARITY 
USE AS TEMP SAVE 
SET RETURN ADDRESS 

SAVE FAILING BIT PATTERN 

STORAGE OK, CONTINUE 



BASE 64K STORAGE FAILURE 

DISPLAY THE CHECKPOINT (MFC CHECKPOINT) 

AND XOR EXPECTED WITH READ IN MFG_PORT 
DISPLAY CHECKPOINT IN MFG_P0RT+3 
DISPLAY XOR'D DATA HIGH BYTE MFG_P0RT+1 

LOW BYTE IN MFG_P0RT+2 
A READ/WRITE SCOPE LOOP OF THE FIRST 
WORD FOR POSSIBLE ADDRESS LINE FAILURES 



045B 






045B 


8A 


C7 


045D 


Eft 


81 


045F 


8A 


C3 


0461 


E6 


82 


0463 


B9 


COOO 


0466 


RF 


D9 


0468 


?B 


DB 


046A 


RB 


07 


046C 


FB 


00 


046E 


30 


AA55 


0471 


74 


OC 


0473 


Rl 


CI 0080 


0477 


R1 


F9 C800 


047B 


7C 


E9 


047D 


23 


C9 


047 F 


75 


03 


0481 


L9 


0573 R 



MOV 


AL,BH 


OUT 


MFG P0RT+1,AL 


MOV 


AL,BL 


OUT 


MFG_P0RT+2,AL 


CHECK 


FOR VIDEO ROM 


MOV 


CX, OCOOOH 


MOV 


DS,CX 


SUB 


BX, BX 


MOV 


AX, [BX] 
SHORT $+2 


JMP 


CMP 


AX, 0AA55H 


JZ 


Z5 


ADD 


CX,080H 


CMP 


CX,0C800H 


JL 


Ml 


AND 


CX,CX 


JNZ 


C32 


JMP 


C31 



SAVE HIGH BYTE 
SAVE LOW BYTE 



START OF 10 ROM 

GET THE FIRST 2 LOCATIONS 

BUS SETTLE 

IS THE VIDEO ROM PRESENT? 

GO I F YES 

POINT TO NEXT 2K BLOCK 

TOP OF VIDEO ROM AREA YET? 

TRY AGAIN 

SET NON ZERO FLAG 



IF VIDEO ROM 



; SET VIDEO MODE TO DISPLAY MEMORY ERROR 

; IHIS ROUTINE INITIALIZES THE ATTACHMENT TO 

; TO DISPLAY FIRST 64K STORAGE ERRORS. 

; BOTH COLOR AND MONO ATTACHMENTS ARE INITIALIZED. 



0484 BA 03D8 
0487 2A CO 
0489 EE 



MOV 
SUB 
OUT 



DX, 3D8H 

AL,AL 

DX.AL 



Test 1 5-39 



0U8A 
0U8D 
0U8F 
0490 



MOV 


DX,03B8H 


MOV 


AL, 1 


OUT 


DX.AL 


SUB 


DX,U 



CONTROL REG ADDRESS OF BW CARD 

MODE SET FOR CARD 

RESET VIDEO 

BACK TO BASE REGISTER 



BB 0030 I 
B9 0010 



0U9B 


8A 


C4 


0490 


EE 




049E 


42 




049 F 


FE 


04 


04A1 


2E 


8A 07 


04A4 


EE 




04A5 


43 




04A6 


4A 




04A7 


E2 


F2 


04A9 


8A 


E2 


04AB 


80 


E4 FO 


04AE 


80 


FC DO 


0481 


74 


08 


0483 


BB 


0000 E 


04B6 


HA 


03D4 


04B9 


EB 


DB 


04BB 


33 


FF 


048D 


B8 


BOOO 


04C0 


8E 


CO 


04C2 


B9 


0800 


04C5 


B8 


0720 


04C8 


F3/ AB 


04CA 


33 


FF 


04CC 


BB 


B800 


04CF 


8E 


C3 


04D1 


B9 


2000 


0404 


F3/ AB 


04D6 


BA 


03B8 


04D9 


BO 


29 


04DB 


EE 




04DC 


42 




04DD 


80 


30 


04DF 


EE 




04E0 


BA 


03D8 


04E3 


BO 


28 


04E5 


EE 




04 E6 


42 




04E7 


80 


30 


04 E9 


EE 




04 EA 


8C 


C8 


04EC 


8E 


DO 


04EE 


BB 


BOOO 


04F1 


8E 


DB 


04F3 


BO 


30 


04F5 


B9 


0006 


04 F8 


28 


FF 


04 FA 


88 


05 


04 FC 


47 




04 FD 


47 




04FE 


E2 


FA 


0500 


80 


FF 88 


0503 


74 


OC 


0505 


2B 


FF 


0507 


B7 


BO 


0509 


8E 


C3 


050B 


87 


B8 


050D 


8E 


DB 


050F 


EB 


E2 


0511 


BO 


20 


0513 


88 


05 


0515 


26 


88 05 


0518 


47 




0519 


47 




051A 


E4 


81 


051C 


B1 


04 


051 E 


D2 


E8 


0520 


BC 


05DE R 


0523 


EB 


IE 90 


0526 


E4 


81 


0528 


24 


OF 


052A 


BC 


05E0 R 


052D 


EB 


14 90 


0530 


E4 


82 


0532 


B1 


04 


0534 


D2 


E8 


0536 


BC 


05E2 R 


0539 


EB 


08 90 


053C 


E4 


82 


053E 


24 


OF 


0540 


BC 


05 E4 R 



MOV BX, OFFSET V I DEO_PARMS+M4*3 
ASSUME DS:CODE 
MOV CX,M4 

BX POINTS TO CORRECT ROW OF 



POINT TO VIDEO PARMS 
; COUNT OF MONO VIDEO PARMS 
NITIALIZATION TABLE 



XOR AH, AH ; AH WILL SERVE AS REGISTER NUMBER DURING LOOP 

LOOP THROUGH TABLE, OUTPUTTTING REG ADDRESS, THEN VALUE FROM TABLE 



MOV 


AL,AH 


OUT 


DX,AL 


INC 


DX 


INC 


AH 


MOV 


AL,CS:[BX] 


OUT 


DX,AL 


INC 


BX 


DEC 


DX 


LOOP 


M10 


MOV 


AH,DL 


AND 


AH.OFOH 


CMP 


AH,ODOH 


JZ 


Z 3 


MOV 


BX, OFFSET VIDEO PARMS 


MOV 


DX,3D4H 


JMP 


Z_2 


FILL 


REGEN AREA WITH BLANK 


XOR 


D1,D1 


MOV 


AX.OBOOOH 


MOV 


ES,AX 


MOV 


ex. 2048 


MOV 


AX.' '+7*256 


REP 


STOSW 


XOR 


DI,DI 


MOV 


BX,OB800H 


MOV 


ES,BX 


MOV 


CX,8192 


REP 


STOSW 


:nable 


VIDEO AND CORRECT PORT 


MOV 


DX,388H 


MOV 


AL,29H 


OUT 


DX,AL 



GET 6845 REGISTER NUMBER 

POINT TO DATA PORT 

NEXT REGISTER VALUE 

GET TABLE VALUE 

OUT TO CHI P 

NEXT IN TABLE 

BACK TO POINTER REGISTER 

DO THE WHOLE TABLE 

CHECK I F COLOR CARD DONE 

STRI P UNWANTED BITS 

IS IT THE COLOR CARD? 

CONTINUE I F COLOR 

POINT TO VIDEO PARMS 

COLOR BASE 

CONTINUE 



NUMBER OF WORDS IN MONO CARD 

FILL CHAR FOR ALPHA 

FILL THE REGEN BUFFER WITH BLANKS 



FILL WITH BLANKS 



SET VIDEO ENABLE PORT 



SET UP OVERSCAN REGISTER 



SET OVERSCAN PORT TO A DEFAULT 

VALUE OF 30H FOR ALL MODES EXCEPT 640X200 

OUTPUT THE CORRECT VALUE TO 3D9 PORT 



ENABLE COLOR VIDEO AND CORRECT PORT SETTING 
MOV DX,3D8H 
MOV AL,28H 
OUT DX,AL 

SET UP OVERSCAN REGISTER 



SET VIDEO ENABLE PORT 



MOV 


AL.30H ; 


OUT 


DX.AL ; 


DISPLAY FAILING CHECKPOINT AND 


MOV 


AX, cs ; 


MOV 


SS,AX ; 


MOV 


BX,0B00OH ; 


MOV 


DS,BX ; 


MOV 


AL, '0' 


MOV 


CX,6 ; 


SUB 


DI,DI ; 


MOV 


DS:[DI],AL 


INC 


Dl ; 


INC 


Dl ; 


LOOP 


Z 


CMP 


BH,0B8H ; 


JZ 


Z 1 


SUB 


Dl,Dl ; 


MOV 


BH,0B0H ; 


MOV 


ES,8X ; 


MOV 


BH,0B8H ; 


MOV 


DS,BX ; 


JMP 


z_o ; 


-- PR 


NT FAILING BIT PATTERN 


MOV 


AL, ' ' ; 


MOV 


OS:(DI],AL ; 


MOV 


ES:(DI],AL ; 


INC 


Dl ; 


INC 


Dl ; 


IN 


AL.MFG PORT+1 ; 


MOV 


CL.4 ; 


SHR 


AL,CL ; 


MOV 


SP, OFFSET Zl 


JMP 


PR 


IN 


AL,MFG PORT+1 ; 


AND 


AL,OFH ; 


MOV 


SP, OFFSET Z2_0 


JMP 


PR ; 


IN 


AL,MFG PORT+2 ; 


MOV 


CL,4 ; 


SHR 


AL,CL ; 


MOV 


SP, OFFSET Z3 


JMP 


PR 


IN 


AL,MFG PORT+2 ; 


AND 


AL,OFH ; 


MOV 


SP. OFFSET Z4_0 ; 



SET OVERSCAN PORT TO A DEFAULT 

VALUE OF 30H FOR ALL MODES EXCEPT 640X200 

OUTPUT THE CORRECT VALUE TO 3D9 PORT 



SET STACK SEGMENT TO CODE SEGMENT 



SET DS TO BW CRT BUFFER 

DISPLAY BANK 000000 

START AT 

WRITE TO CRT BUFFER 

POINT TO NEXT POST I TON 



CHECK THAT COLOR BUFFER WRITTEN 
POINT TO START OF BUFFER 



ES = MONO 

SET SEGMENT TO COLOR 

DS = COLOR 



DISPLAY A BLANK 
WRITE TO COLOR BUFFER 
WRITE TO MONO BUFFER 
POINT TO NEXT POST I TON 

GET THE HIGH BYTE OF FALING PATTERN 
SHIFT COUNT 
NIBBLE SWAP 



ISOLATE TO LOW NIBBLE 



GET THE HIGH BYTE OF FALING PATTERN 
SH I FT COUNT 
NIBBLE SWAP 



CONVERT AND PRINT 



5-40 Testl 



0543 


04 90 


05U5 


27 


05U6 


14 40 


05U8 


27 


05U9 


88 05 


054B 


26: 88 05 


05UE: 


47 


05UF 


47 


0550 


C3 


0551 


BO 20 


0553 


88 05 


0555 


26: 88 05 


0558 


47 


0559 


47 


055A 


BO 32 


055C 


88 05 


055E 


26: 88 05 


0561 


47 


0562 


47 


0563 


BO 30 


0565 


88 05 


0567 


26: 88 05 


056A 


47 


056B 


47 


056C 


BO 31 


056E 


88 05 


0570 


26: 88 05 


0573 


BO DO 


0575 


E6 80 


0577 


E6 83 


0579 


28 C9 


057B 




057B 


2B CO 


0570 


8E D8 


057F 


B8 AA55 


0582 


2B FF 


0564 


89 05 


0586 


88 05 


0588 


E2 F1 


058A 




058A 


89 05 


058C 


88 05 


05SE 


E2 FA 


0590 




0590 


89 05 


0592 


88 05 


059U 


E2 FA 


0596 




0596 


89 05 


0598 


8B 05 


059A 


E2 FA 


059C 




059C 


89 05 


059E 


88 05 


05A0 


E2 FA 


05A2 


E4 81 


05AU 


E6 80 


05A6 




05A6 


B8 AA55 


05A9 


89 05 


05AB 


88 05 


05AD 


"E2 F7 


05AF 




05AF 


89 05 


05B1 


88 05 


0583 


E2 FA 


05B5 




05B5 


89 05 


0587 


8B 05 


05B9 


E2 FA 


05BB 


E4 82 


05BD 


E6 80 


05BF 


B8 AA55 


05C2 


2B FF 


05CU 


89 05 


05C6 


8B 05 


05C8 


E2 F8 


05CA 




05CA 


89 05 


05CC 


88 05 


05CE 


E2 FA 


05DO 




05D0 


89 05 


0502 


8B 05 


0504 


E2 FA 


0506 




05D6 


89 05 


05D8 


8B 05 


05DA 


E2 FA 


05DC 


EB 95 


05DE 


0526 R 


05E0 


0530 R 


05E2 


053C R 


05 EU 


0551 R 



05E6 
05E8 
05EB 
05ED 



05F1 
05 F4 
05F6 
05F9 



8E 08 
BC 0000 
8E D4 



PR: 


ADD 
DAA 


AL,090H 






ADC 


AL,040H 






DAA 








MOV 


DS:[DI ],AL 






MOV 


ES:[D1 ],AL 






INC 


Dl 






INC 


Dl 






RET 


\Y 201 ERROR 










Z4: 


MOV 


AL,' ' 






MOV 


DS:IDI ],AL 






MOV 


ES:[DI ],AL 






INC 


Dl 






INC 


01 






MOV 


AL. '2' 






MOV 


DS:[DI ),AL 






MOV 


ES:[DI ],AL 






INC 


01 






INC 


Dl 






MOV 


AL.'O' 






MOV 


DS:[DI ],AL 






MOV 


ES:[DI ],AL 






INC 


Dl 






INC 


01 






MOV 


AL.'T 






MOV 


DS:(DI ],AL 






MOV 


ES:IDI ],AL 








ERROR CODE IN MFG_PORT 










C31_0: 


MOV 


AL,ODDH 






OUT 


MFC PORT,AL 






OUT 


MFC P0RT+3,AL 






SUB 


CX.CX 




C31_A: 










SUB 


AX, AX 






MOV 


OS, AX 






MOV 


AX,0AA55H 






SUB 


DI,DI 






MOV 


DS:(OI ],AX 






MOV 


AX, OS: [Dl ] 






LOOP 


C31_A 




C31_B: 










MOV 


DS:[DI ],AX 






MOV 


AX,DS: [Dl ] 






LOOP 


C31_B 




C31_C: 










MOV 


DS:[DI ],AX 






MOV 


AX,DS:[D1 J 






LOOP 


C31_C 




C31_D: 










MOV 


DS:[DI ].AX 






MOV 


AX,DS:[DI 1 






LOOP 


C31_D 




C31_E: 










MOV 


DS:[DI ],AX 






MOV 


AX,US:[DI ] 






LOOP 


C31_E 








ERROR CODE IN MFG_PORT 


— > 




ROLL 




IN 


AL,MFG PORT+1 






OUT 


MFG_PORT,AL 




C31_G: 










MOV 


AX,0AA55H 






MOV 


DS:[DI ],AX 






MOV 


AX,DS:[DI J 






LOOP 


C31_G 




C31_H: 










MOV 


DS:[DI ],AX 






KOV 


AX,DS:[DI] 






LOOP 


C31_H 




C31_l: 










MOV 


DS:[DI ],AX 






MOV 


AX,DS:[DI ] 






LOOP 


C31_l 








ERROR CODE IN MFG_PORT 
AL,MFG PORT+2 






IN 






OUT 


MFC PORT.AL 






MOV 


AX,0AA55H 




C31_K: 


SUB 


DI,DI 






MOV 


DS:[DI 1,AX 






MOV 


AX,DS:[DI ] 






LOOP 


C31_K 




C31_L: 










MOV 


DS:[DI ],AX 






MOV 


AX,DS:[DI ] 






LOOP 


C31_L 




C31_M: 










MOV 


DS:[DI ],AX 






MOV 


AX,DS:[DI ] 






LOOP 


C31_M 




C31_N: 










MOV 


DS:[D1 ],AX 






MOV 


AX,OS:[DI ] 






LOOP 


C31 N 






JMP 


C31_0 




Z1 


DW 


Z1 




Z2 


DW 


Z2 




Z3_0 


DW 


Z3 




Z4_0 


DW 


Z4 






- CLEAR 


STORAGE ENTRY 




CLR_STG: 








ASSUME 


DS:DATA 






REP 


STOSW 






MOV 


AX, DATA 






MOV 


DS,AX 






MOV 


RESET FLAG,BX 






SETUP STACK SEC AND SP 




C33: 


MOV 


AX, DATA 






MOV 


DS,AX 






MOV 


SP,POST SS 






MOV 


SS,SP 





CONVERT 00-0 F TO ASCII CHARACTER 
ADD FIRST CONVERSION FACTOR 
ADJUST FOR NUMERIC AND ALPHA RANGE 
ADO CONVERSION AND ADJUST LOW NIBBLE 
ADJUST HIGH NIBBLE TO ASCH I RANGE 

WRITE TO COLOR BUFFER 
WRITE TO MONO BUFFER 
POINT TO NEXT POST I TON 



DISPLAY A BLANK 
WRITE TO CRT BUFFER 
WRITE TO MONO BUFFER 
POINT TO NEXT POST I TON 

DISPLAY 201 ERROR 
WRITE TO CRT BUFFER 
WRITE TO MONO BUFFER 
POINT TO NEXT POST I TON 



WRITE TO CRT BUFFER 
WRITE TO MONO BUFFER 
POINT TO NEXT POST I TON 



-> FIRST THE CHECKPOINT 



SETUP SEGMENT 
WRITE AN AA55 



NEXT THE HIGH BYTE 



WRITE AN AA55 

READ THE FIRST WORD 



THEN THE LOW BYTE 

LOW BYTE 
WRITE AN AA55 

READ THE FIRST WORD 



TEMP STACK 
TEMP STACK 
TEMP STACK 
TEMP STACK 



RESTORE RESET FLAG 



SET DATA SEGMENT 



Test 1 5-41 



0';>FB 


BC 


8000 


05FE 
0600 


BO 
E6 


n 

80 


0602 
060U 
0606 
0609 
0606 


E4 
2U 
A? 
2A 
E6 


82 

FO 

0012 

CO 

82 



MOV SP,P0ST_SP ; STACK IS READY TO GO 

-- GET THE INPUT BUFFER (SWITCH SETTINGS) 



060D 


OF 




060E 






060E 


01 


EO 


0610 






060E 






060E 


01 




0610 






0610 


A9 


OOOF 


0613 


/5 


37 


0615 


BO 


12 


0617 


E6 


80 


0619 


IF 




061A 


07 




061B 


Br 


DOAO 


061 E 


B9 


0003 


0621 


BR 


AAAA 


062'1 


F8 


064F 


0627 


B8 


5555 


062A 


E8 


064F 


0620 


?B 


GO 


062F 


F8 


064F 


0632 


2B 


ED 


063^ 


FO 




0635 


90 




0636 


58 




0637 


A9 


0200 


06 3 A 


75 


10 


063C 


A9 


0400 


063 F 


/4 


OB 


oe^n 


hC 




06U2 


9(; 




0643 


58 




064*1 


A9 


0400 


0647 


75 


03 


0649 


FB 


3E 90 


064C 






064C 


F4 




0640 


EB 


FD 


064r 


B9 


0003 


0652 


F3/ AB 


0654 


BD 


DOAO 



0659 
065C 
065C 



0660 
0661 
0661 
0664 
0661 
0661 
0664 



0664 BD D8A0 



0668 


OF 




0669 






0669 


8B 


4E 00 


066C 






0669 






0669 


01 




066C 






066C 


BU 


D8A5 


066F 


26 




0670 


OF 




0671 






0671 


03 


46 00 


0674 






0671 






0671 


01 




0674 






0674 


BF 


DOAO 


0677 


8B 


05 


0679 


Bq 


0005 


06 7C 


BF 


D8A0 


067F 


26 


3B 04 



AND 
MOV 
SUB 
OUT 



AL.DMA_PAGE+1 

AL,0F0H 

MFG_TST,AL 

AL,AL 

DMA_PAGE+1,AL 



GET THE SWITCH SETTINGS 
STRIP UNUSED BITS 
SAVE SETTINGS 
RESET DMA_PAGE 



TEST. HA 

VERIFY 286 LGDT/SGDT LIDT/SIDT 
INSTRUCTIONS 

DESCRIPTION 

LOAD GDT AND IDT REGISTERS WITH 
AA,55,00 AND VERIFY CORRECT 



VERIFY STATUS INDICATE COMPABII 



ITY (REAL) MODE 
GET THE CURRENT STATUS WORD 



DB 


OOFH 


LABEL 


BYTE 


SHL 


AX, 1 


LABEL 


BYTE 


ORG 


OFFSET CS 


DB 


001H 


ORG 


OFFSET CS 


TEST 


AX,OFH 


JNZ 


ERR PROT 



TEST PROTECTED MODE REGISTERS 



PUSH 

POP 

MOV 

MOV 

MOV 

CALL 

MOV 

CALL 

SUB 

CALL 

SUB 



DI,SYS_iDT_LOC 

CX,3 

AX, OAAAAH 

WRT_PAT 

AX,05555H 

WRT_PAT 

AX, AX 

WRT_PAT 

BP,BP 



TEST 286 CONTROL FLAGS 



STD 

PUSHF 

POP 

TEST 

JNZ 

TEST 

JZ 



AX,0200H 
ERR_PR0T 
AX,0400H 
ERR_PR0T 



SHORT ERR_PROT 



WRITE TO 286 REGISTERS 



WRT_PAT:HOV 
REP STOSW 
MOV 
SEGOV 



LABEL 

MOV 

LABEL 

ORG 

DB 

ORG 

MOV 

SEGOV 



LABEL 
MOV 
LABEL 
ORG 



LABEL 

MOV 

LABEL 

ORG 

DB 

ORG 

MOV 

SEGOV 



LABEL 

ADD 

LABEL 

ORG 

DB 

ORG 

MOV 

MOV 

MOV 

MOV 

CMP 



BP] 



P] 



ES 

026H 

[BP] 

OOFH 

BYTE 

AX, [B 

BYTE 

OFFSET CS:??OOOC 

001H 

OFFSET CS:??OOOD 

Dl ,SYS_IDT_LOC 

AX, OS: [Dl 1 

CX,5 

SI ,GDT_LOC 

AX, ES:[SI ] 



;SET CHECK POINT 12 

; <><><><><><><><><><><> 

SET ES TO SAME SEGMENT AS DS 

USE THIS AREA TO BUILD TEST PATTERN 

FIRST PATTERN 



RESTORE BP REG 



INTERRUPT FLAG SHOULD BE OFF 
GO I F NOT 

CHECK DIRECTION FLAG 
GO I F NOT SET 
CLEAR DIRECTION FLAG 
INSURE DIRECTION FLAG IS RESET 



BP,SYS_1DT_L0C 

ES 

026H 

IBP] 

OOFH 

BYTE 

BX,WORD PTR [BP] 

BYTE 

OFFSET CS: 770003 

001H 

OFFSET CS: 770004 

BP,SYS_IDT_LOC 

ES 

026H 

[BP] 

OOFH 

BYTE 

DX.WORD PTR [BP] 

BYTE 

OFFSET CS:?70006 
DB 001 H 
ORG OFFSET CS:??0007 
READ AND VERIFY 286 REGISTERS 



BP,GDT_LOC 

ES 

026H 

[BP] 

OOFH 

BYTE 

CX, [B 

BYTE 

OFFSET CS: 770009 

001H 

OFFSET CS:7?00OA 

BP,GDT_L0C+5 



GO I F NOT 

TEST OK CONTINUE 



STORE 6 BYTES OF PATTERN 
LOAD THE IDT 
REGISTER FROM THIS AREA 



LOAD THE GDT 
FROM THE SAME AREA 



STORE THE REGISTERS HERE 
GET THE IDT REGS 



GET THE GDT REGS 



GET THE PATTERN WRITTEN 
CHECK ALL REGISTERS 
POINT TO THE BEGINNING 



5-42 Testl 



0582 
0684 
0685 
0686 
0688 



JNZ ERR_PROT 
SI 
SI 
C37B 

INITIALIZE THE 8259 



INC 
LOOP 
RET 



; CONTINUE TILL DONE 
NTERRUPT #1 CONTROLLER OH I P : 



0689 


?A 


CO 


068B 


F6 


FT 


068D 


BO 


n 


068F 


F6 


?0 


0691 


FB 


00 


0693 


BO 


08 


0695 


F6 


21 


0697 


EB 


00 


0699 


BO 


OU 


069B 


tf, 


21 


069D 


Hi 


00 


069F 


BO 


01 


06A1 


F6 


21 


06A3 


FB 


00 


06A5 


BO 


FF 


06A7 


E6 


21 



06A9 


BO 


13 


06AB 


E6 


80 


06AD 


BO 


11 


06AF 


F6 


AO 


06B1 


FB 


00 


06B3 


BO 


70 


06B5 


F6 


A1 


06B7 


BO 


02 


06B9 


FB 


00 


06BB 


F6 


A1 


06BD 


FB 


00 


06BF 


BO 


01 


06C1 


FA 


A1 


06C3 


FB 


00 


06C5 


BO 


FF 


06C7 


E6 


A1 


06C9 


BO 


14 


06CB 


E6 


80 


06CD 


B9 


0078 


06DO 


J>B 


FF 


06D2 


BF 


C7 


06D14 


B8 


0000 E 


06D7 


AB 




06D8 


BC 


C8 


06 DA 


AB 




06DB 


E2 


F7 


06DD 


BO 


15 


06DF 


L6 


80 


06tl 


BF 


0040 R 


06Et4 


OF 




06E5 


IF 




06E6 


BC 


D8 


06E8 


BF 


0010 E 


06EB 


B9 


0010 


06EE 


A5 




06EF 


U7 




06 FO 


147 




06F1 


E2 


FB 



C37A: SUB 
OUT 
MOV 
OUT 
JMP 
MOV 
OUT 
JMP 

MOV 
OUT 
JMP 
MOV 
OUT 
JMP 
MOV 
OUT 



AL.AL 
X287+1.AL 
AL, 11H 
INTAOO,AL 
SHORT $+2 
AL,8 

INTA01,AL 
SHORT $+2 

AL,04H 
INTA01,AL 
SHORT S+2 
AL.OIH 
INTAOI.AL 
SHORT $+2 
AL,0FFH 
INTAOI.AL 



RESET MATH PROCESSOR 

ICW1 - EDGE, MASTER, I CW4 



WAIT STATE FOR 10 

SETUP 1CW3 - MASTER LV 2 



WAIT STATE FOR 10 
MASK ALL I NTS. OFF 
(VIDEO ROUTINE ENABLES INTS.) 



INITIALIZE THE 8259 INTERRUPT #2 CONTROLLER CHI 



MOV 


AL, 13H 


OUT 


MFG_PORT,AL 


MOV 


AL, IIH 


OUT 


INTBOO,AL 


JMP 


SHORT $+2 


MOV 


AL, INT TYPE 


OUT 


INTBOI.AL 


MOV 


AL,02H 


JMP 


SHORT $+2 


OUT 


INTB01,AL 


JMP 


SHORT $+2 


MOV 


AL,01H 


OUT 


INTBOI.AL 


JMP 


SHORT $+2 


MOV 


AL,0FFH 


OUT 


INTB01,AL 


SET UP 


THE INTERRUPT 


MOV 


AL, 14H 


OUT 


MFG_P0RT,AL 


MOV 


CX,78H 


SUB 


DI,DI 


MOV 


ES,DI 


MOV 


AX,OFFSET D11 


STOSW 




MOV 


AX.CS 


STOSW 




LOOP 


D3 



><>CHECKPOINT 13 <><> 
'1 - EDGE, SUkVE ICW4 



SETUP ICW3 - SLAVE LV 2 



FILL ALL INTERRUPT LOCATIONS 
FIRST INTERRUPT LOCATION 
SET ES ALSO 
MOVE ADDRESS OF INT OFFSET 

GET THE SEGMENT 



- ESTABLISH BIOS SUBROUTINE CALL INTERRUPT VECTORS 
MOV AL,15H ; <><><><: 

OUT MFG_PORT,AL 



:><><>CHECKPOINT 15 <><> 



MOV 
PUSH 
POP 
MOV 
MOV 
MOV 



, OFFSET VIDE0_1NT 



SET VIDIO INT AREA 



; MOVE VECTOR TABLE TO RAM 
; SKI P SEGMENT POINTER 



06 F3 


E8 


0000 E 


06 F6 


BO 


16 


06F8 


E6 


80 


06 FA 


BO 


8D 


06 FC 


K6 


70 


06FE 


FB 


00 


070O 


F4 


71 


0702 


A8 


80 


070U 


74 


OF 


0706 


BO 


8E 


0708 


L6 


70 


070A 


FB 


00 


070C 


E4 


71 


070E 


A8 


80 


071O 


74 


21 


0712 


E9 


07A1 R 


0715 


BO 


17 


0717 


E6 


80 


0719 


BO 


8E 


071B 


F6 


70 


071D 


FB 


00 


071F 


F4 


71 


0721 


86 


C4 


0723 


SO 


CC 80 


0726 


BO 


8F 


0728 


1-6 


70 


072A 


86 


C4 


072C 


FR 


00 


072E 


E6 


71 



TEST. 12 

VERIFY CMOS CHECKSUM/BATTERY GOOD 
DESCRI PTION 

DETERMINE IF CONFIG RECORD SHOULD I 

USED FOR INITIALIZATION 



. IS T 

MOV 


HE BATTERY LOW THIS POWER 
AL, BATTERY COND STATUS 


OUT 


CMOS PORT,AL 


JMP 


SHORT $+2 


IN 


AL,CMOS PORT+1 


TEST 


AL,80H 


JZ 


CMOS! A 


MOV 


AL,DIAG STATUS 


OUT 


CMOS PORT,AL 


JMP 


SHORT $+2 


IN 


AL,CMOS PORT+1 


TEST 


AL,BAD BAT 


JZ 


CMOS! 


JMP 


CMOSU 


. SET DEFECTIVE BATTERY FLAG 


CM0S1A: MOV 


AL, 17H 


OUT 


MFG_PORT.AL 


MOV 


AL,DIAG STATUS 


OUT 


CMOS PORT,AL 


JMP 


SHORT $+2 


IN 


AL,CMOS PORT+1 


XCHG 


AL,AH 


OR 


AH, BAD BAT 


MOV 


AL,DIAG STATUS 


OUT 


CMOS PORT,AL 


XCHG 


AL, AH 


JMP 


SHORT $+2 


OUT 


CMOS PORT+1, AL 



SET THE DATA SEGMENT 
oooCHECKPOINT 16 <><> 



CHECK BATTERY CONDITION 

POINT TO BATTERY STATUS 
WAIT STATE FOR 10 

IS THE BATTERY LOW? 

GO I F YES 

GET THE OLD STATUS 



CONTINUE WITHOUT CONFIG 



CMOS DIAGNOSTIC STATUS BYTE 



GET THE CURRENT STATUS 

SAVE 

SET THE DEAD BATTERY FLAG 



OUTPUT THE STATUS 
SET FLAG IN CMOS 



Test 1 5-43 



0?30 


EB 


6F 90 


0733 


BO 


8E 


0735 


th 


70 


0737 


FB 


00 


0739 


F4 


71 


073B 


FB 


00 


073D 


86 


C4 


073F 


BO 


8E 


0741 


F6 


70 


071*3 


81 


3E 0072 R 


0749 


/5 


07 


0748 


86 


EO 


07UD 


24 


10 


074 F 


EB 


03 90 


0752 






0752 


^A 


CO 


0754 


E6 


71 


0756 


?B 


DB 


0758 


?B 


C9 


075A 


B1 


90 


075C 


B5 


AE 


075E 


8A 


CI 


0760 


F6 


70 


0762 


FB 


00 


0764 


r4 


71 


0766 


?A 


E4 


0768 


13 


D8 


076A 


FE 


CI 


076C 


3 A 


E9 


076E 


75 


EE 


0770 


OB 


DB 


0772 


74 


16 


0774 


BO 


AE 


0776 


F6 


70 


0778 


EB 


00 


077A 


^4 


71 


077C 


8A 


EO 


077E 


BO 


AF 


0780 


F6 


70 


0782 


FB 


00 


0784 


F4 


71 


0786 


3B 


C3 


0788 


/4 


17 


078A 


BO 


8E 


078C 


F6 


70 


078E 


FB 


00 


0790 


F4 


71 


0792 


86 


C4 


0794 


80 


CC 40 


0797 


BO 


8E 


0799 


F6 


70 


079B 


FB 


00 


079D 


86 


C4 


079F 


E6 


71 


07A1 


RO 


18 


07A3 


E6 


80 



JMP 


CM0S4 


; VERIFY 


CHECKSUM 


CM0S1 : MOV 


AL.DIAG STATUS 


OUT 


CMOS PORT,AL 


JMP 


SHORT S+2 


IN 


AL.CMOS PORT+1 


JMP 


SHORT $+2 


XCHG 


AL.AH 


MOV 


AL.DIAG STATUS 


OUT 


CMOS PORT.AL 


CMP 


RESET FLAG,1234H 


JNZ 


CM0S1 A 


XCHG 


AH.AL 


AND 


AL,W_MEM_31ZE 


JMP 


CM0S1_B 


CM0S1 A: 




SUB 


Al ,Al 


CM0S1_B: OUT 


CM0S_P0RT+1,AL 


SUB 


BX,BX 


SUB 


CX,CX 


MOV 


CL.CMOS BEGIN 


MOV 


CH,CM0S_END+1 


CM0S2: MOV 


AL,CL 


OUT 


CMOS PORT,AL 


JMP 


SHORT $+2 


IN 


AL,CMOS PORT+1 


SUB 


AH. AH 


ADC 


BX.AX 


INC 


CL 


CMP 


CH.CL 


JNZ 


CM0S2 


OR 


BX.BX 


JZ 


CM0S3 


MOV 


AL.CMOS END+1 


OUT 


CMOS PORT.AL 


JMP 


SHORT $+2 


IN 


AL.CMOS PORT+1 


MOV 


AH.AL 


MOV 


AL.CMOS END+2 


OUT 


CMOS PORT.AL 


JMP 


SHORT $+2 


IN 


AL.CMOS PORT+1 


CMP 


AX.BX 


JZ 


CM0S4 


. SET 


CMOS CHECKSUM ERROR 


CM0S3 : MOV 


AL.DIAG STATUS 


OUT 


CMOS PORT.AL 


JMP 


SHORT $+2 


IN 


AL.CMOS PORT+1 


XCHG 


AL.AH 


OR 


AH. BAD CKSUM 


MOV 


AL.DIAG STATUS 


OUT 


CMOS PORT.AL 


JMP 


SHORT $+2 


XCHG 


AL.AH 


OUT 


CM0S_P0RT+1.AL 


CM0S4: MOV 


AL.18H 


OUT 


MFG_PORT.AL 



GO TO MINIMUM CONFIG 



CLEAR OLD STATUS 

10 DELAY 

GET THE CURRENT STATUS 

10 DELAY 

SAVE THE CURRENT STATUS 



IS THIS A SOFT RESET 
GO I F NOT 

RESTORE THE STATUS 

CLEAR ALL BUT THE CMOS/POR MEMORY i 
MISCOMPARE 



INSURE AH=0 

ADD TO CURRENT VALUE 

POINT TO NEXT WORD 

FINISHED? 

GO I F NOT 

BX MUST NOT BE 

CMOS BAD IF CKSUM=0 

GET THE CHECK SUM 



FIRST BYTE OF CHECKSUM 

SAVE IT 

SECOND BYTE OF CHECKSUM 



SET BAD CHECKSUM FLAG 

10 DELAY 

GET THE CURRENT STATUS 

SAVE I T 

SET BAD CHECKSUM FLAG 



07A5 


E4 


61 


07A7 


oc 


OC 


07A9 


1 B 


00 


07AB 


E6 


61 


07AD 


BO 


19 


07AF 


E6 


80 


07B1 


BO 


8F 


07B3 


E6 


70 


07B5 


EB 


00 


07B7 


BO 


01 


07B9 


E6 


71 


07BB 


BC 


0000 


07BE 


8F 


04 


07C0 


BC 


8000 


07C3 


E8 


0000 E 


07C6 


BO 


1A 


07C8 


E6 


80 


07CA 


B8 


0008 


07CD 


8F 


D8 


07CF 


C7 


06 005A 0000 


07D5 


C6 


06 005C OO 


07DA 


BF 


0058 


07DD 


8F 


06 


07DF 


BC 


FFFD 



IN AL.PORT_B 

OR AL.RAM PAR_OFF 

JMP SHORT ?+2 ; 

OUI POKT_B,AL ; 

SET RETURN ADDRESS BYTE IN CMOS 



DISABLE lO/RAM PARITY CHK 



MOV 
OUT 
JMP 
MOV 
OUT 



AL.SHUTDOWN 
CMOS_PORT.AL 
SHORT $+2 
AL.01H 
CM0S_P0RT+1,AI 



MOV SP,POST_SS 

MOV SS.SP 

MOV SP.POST_SP 

CALL SYSINIT1 



oooCHECKPOl NT 19 
SET THE RETURN ADDR 



SET STACK FOR SYSINIT1 



oooCHECKPOl NT 1A 



SET TEMPORY STACK 



NOV AX.GDT_PTR ; 

MOV DS.AX ; 

MOV DS:SS_TEMP.BASE_LO_WORD.O 

MOV BYTE PTR DS: ( SS_TEMP. BASE_H l_BYTE ) , TEMP_STACK_H I 

MOV SI.SS_TEMP ; 

MOV SS.SI ; 

MOV SP.MAX_SEG_LEN-2 ; 



TEST. 13 

PROTECTED MODE TEST 

CHECK MSW FOR PROTECTED MODE 

MEMORY SIZE DETERMINE (RAM -> 640K) 
OESCRI PTION 

THIS ROUT INF RUNS IN PROTECTED MODE IN 

ORDER TO ADDRESS ALL STORAGE 
MEMORY SIZE IS SAVED AT MEMORY_SIZE 
CMOS DIAGNOSTIC BYTE BIT 4 = 512 -> 640K 



07E2 
07E3 
07 E3 
07E5 
07E3 
07E3 





- INSURE 


PROlECrtD MODE 




SMSW 


AX 




DB 


00 FH 


?000E 


LABEL 


BYTE 




SHE 


AX.l 


?0O0F 


LABEL 


BYTE 




ORG 


OFFSET CS:??00 




DB 


001H 



GET THE MACHINE STATUS WORD 



5-44 Testl 



07 E5 






07 E5 


A9 


0001 


07E8 


75 


10 


07 EA 


BO 


8F 


07EC 


E6 


70 


07 EE 


EB 


00 


07 FO 


BO 


08 


07 F2 


E6 


71 


07 FU 


E9 


0000 E 


07 F7 


FH 




07 F8 


LB 


FL 



ORG OFFSET CS:??000F 
TEST AX,VIRTUAL_ENABLE 
JNZ VIR_OK 



MOV 


AL,SHUT DOWN 


OUT 


CMOS PORT.AL 


JMP 


SHORT $+2 


KCV 


AL,08H 


OUT 


CMOS P0RT+1,AL 


JMP 


PROC SHUTDOWN 



VIRTUAL MODE ERROR HALT 



JMP 



SHUTS 



; ARE WE IN PROTECTED MODE 



SET THE RETURN ADDR 



CAUSE A SHUTDOWN 



ERROR HALT 



07FA 07 06 00U8 FFFF 



0800 C6 06 OOUD 93 



. 54K SEGMENT LIMIT 

VIR_OK: MOV DS : ES_TEMP. SEG_L I M I T. MAX_SEG_LEN 

. CPLO, DATA ACCESS RIGHTS 

MOV BYTE PTR DS: ( ES_TEMP. DATA_ACC_RI GHTS) , CPLO_DATA_ACCESS 
. START WITH SEGMENT ADDR 01-0000 (SECOND eUK) 



0814 BB 0040 



0817 


B8 0048 


081A 


8E CO 


081C 


E8 0838 R 


081 F 


74 03 


0821 


E9 08B7 R 


082U 




0824 


83 03 40 



MOV 
OUT 


AL, IBH 
MFG_PORT,AL 


MOV 


BX, 16*4 


; START 


STORAGE SIZE/ 


NOT DONE: 

MOV 

MOV 

CALL 

JZ 

JMP 

NOT FIN: 


AX, ES TEMP 
ES,AX 
HOW BIG 
NOT FIN 
DONE 



0827 FE 06 004C 



082B 


80 


3E 004C OA 


0830 


75 


E5 


0832 


E8 


088B R 


0835 


E9 


08B7 R 


0838 






0838 


2B 


FF 


083A 


B8 


AA55 


083D 


8B 


C8 


083F 


26 


89 05 


0842 


BO 


OF 


0844 


26 


8B 05 


0847 


26 


89 05 


084A 


33 


CI 


0840 


75 


3D 


084E 


IE 




084F 


B8 


0018 


0852 


8E 


D8 


0854 


81 


3E 0072 R 1234 


085A 


IF 




085B 


75 


26 


085D 


26 


07 05 0101 


0862 


E4 


61 


0864 


EB 


00 


0866 


OC 


00 


0868 


E6 


61 


086A 


EB 


00 


086O 


24 


F3 


086E 


E6 


61 


0870 


B8 


FFFF 


0873 


50 




0874 


58 




0875 


26 


8B 05 


0878 


E4 


61 


087A 


24 


CO 


087C 


26 


07 05 0000 


0881 


75 


08 


0883 






0883 


23 


CO 


0885 


B9 


8000 


0888 


F3/ AB 


088A 


03 




088B 






088B 


9C 




088C 


BO 


10 


088E 


E6 


80 


0890 


BO 


B3 


0892 


E6 


70 


0894 


EB 


00 


0896 


E4 


71 


0898 


OC 


80 


089A 


86 


C4 


089O 


BO 


B3 


089E: 


E6 


70 


08AO 


86 


C4 


08A2 


81 


FB 0200 


08A6 


77 


02 


08A8 


24 


7F 


08AA 


E6 


71 



; oooCHECKPOINT IB <><: 
; SET THE FIRST 64K DONE 



POINT ES TO DATA 

POINT TO SEGMENT TO TEST 

DO THE FIRST 6i:K 

CHECK I F TOP OF RAM 



ADD BX,16*4 ; BUMP MEMORY COUNT BY 64K 
DO NEXT 64K (0X0000) BLOCK 

INC BYTE PTR DS: ( ES_TEMP. BASE_H l_BYTE ) 

. CHECK FOR END OF FIRST 640K (END OF BASE RAM) 

CMP BYTE PTR DS: ( ES_TEMP. BASE_H l_BYTE) , OAH 

JNZ N0T_DONE ; GO 

CALL HOW_BIG_END 

JMP DONE 

. FILL/CHECK LOOP 

HOW_B I G : 

SUB DI,DI 

TEST PATTERN 
SAVE PATTERN 
SEND PATTERN TO MEM. 
PUT SOMETHING IN AL 
GET PATTERN 

INSURE NO PARITY 10 CHECK 
COMPARE PATTERNS 
GO END I F NO COMPARE 

POINT TO SYSTEM DATA AREA 

SOFT RESET 
RESTORE DS 
GO I F NOT SOFT RESET 



SUB 


Dl ,DI 


MOV 


AX,0AA55H 


MOV 


OX, AX 


MOV 


ES: [Dl ],AX 


MOV 


AL.OFH 


MOV 


AX,ES:[DI] 


MOV 


ES:[DI],AX 


XOR 


AX,CX 


JNZ 


HOW_BIG_ENO 


PUSH 


DS 


MOV 


AX,RSOA PTR 


MOV 


DS , AX 


CMP 


RESET FLAG,1234H 


POP 


DS 


JNZ 


HOW_B 1 G_2 


MOV 


WORD PTR ES:[D1 ],0101H , 


IN 


AL, PORT B 


JMP 


SHORT S+2 


OR 


AL,RAM PAR OFF 


OUT 


PORT B,AL 


JMP 


SHORT $+2 


AND 


AL,RAM PAR ON 


OUT 


P0RT_B,AL 


MOV 


Ax,orrrrii 


PUSH 


AX 


POP 


AX 


MOV 


AX,ES:[DI] 


IN 


AL, PORT B 


AND 


AL, PARITY_ERR ; 


MOV 


WORD PTR ES:[DI 1,0 ; 


JNZ 


HOW_BIG_END ; 


HOW BIG 2: 




SUB 


AX, AX ; 


MOV 


OX,2000H*4 ; 


REP 


STOSW 


RET 




HOW BIG END: 




PUSHF 




MOV 


AL,1CH ' 


OUT 


MFG_P0RT,AL ; 


;- - SET 


OR RESET 512 TO 640 INSTALL 


MOV 


AL, INFO STATUS ; 


OUT 


CMOS P0RT,AL ; 


JMP 


SHORT $+2 ; 




AL,CM0S PORT+1 ; 


OR 


AL,M640K ; 


XCHG 


AL.AH ; 


MOV 


AL, INFO STATUS 


OUT 


CMOS PORT,AL ; 


XCHG 


AL,AH ; 


CMP 


BX,512 ; 


JA 


K640 


AND 


AL,N0T M640K ; 


K640: OUT 


CMOS PORT+1, AL ; 



TURN OFF BOTH PARITY BITS 



; CHECK FOR PAR I TY/ I CHECK 



WRITE ZEROS 



E THE CURRENT FLAGS 
>CHECKPOINT 10 <><><> 



SET/RESET 640K STATUS FLAG 



SAVE THE STATUS 



RESTORE THE STATUS 
CHECK MEMORY SIZE 
SET FLAG FOR 512 -> 



640 INSTALLED 



Test 1 5-45 



08AC 


88 0018 


08AF 


8E D8 


08B1 


89 IE 0013 R 


08B5 


90 


08B6 


C3 



MOV AX, RSDA_PTR 

MOV DS,AX 

MOV MEM0RY_S1ZE,BX 

POPF 

RET 



RESTORE THE DATA SEGMENT 



TEST.13A 

MEMORY SIZE DETERMINE (RAM ABOVE 1024K) 
DESCRl PTION 

THIS ROUTINE RUNS IN PROTECTED MODE 
MEMORY SIZE ABOVE 1MEG ADDRESSING IS 
SAVED IN CMOS 



08B7 
08 BA 


B8 0008 
8E D8 


08BC 
08C1 


C6 06 OOUC 10 
C7 06 OOUA 0000 


08C7 
08C9 


BO ID 
E6 80 



POINT DS TO THE DESCRl PTER TABLE 



08CB 2B DB 



START WITH SEGMENT ADDR 10-0000 (ONE MEG AND ABOVE) 

MOV BYTE PTR DS: ( ES_TEMP. BASE_H l_BYTE ) . 10H 
MOV DS:ES_TEMP.BASE_L0_WORD,OH 



08CD 




08CD 


B8 0048 


08D0 


8E CO 


08D2 


E8 08EE R 


08D5 


74 03 


08D7 


EB 75 90 


08DA 


83 03 40 


08DD 


FE 06 004C 


08E1 




08E1 


80 3 E 004C FE 


08E6 


75 E5 


08E8 


E8 093 3 R 


08EB 


EB 61 90 


08EE 




08EE 


2B FF 


08 FO 


B8 AA55 


08F3 


8B C8 


08F5 


26: 89 05 


08 F8 


BO OF 


08 FA 


26: 8B 05 


08FD 


26: 89 05 


0900 


33 CI 


0902 


75 2F 


090U 


IE 


0905 


B8 0018 


0908 


8E D8 


090A 


81 3E 0072 R 1234 


0910 


IF 


0911 


75 18 


0913 


26: 07 05 0101 


0918 


B8 FFFF 


091B 


50 


091C 


58 


091D 


26: 8B 05 


0920 


E4 61 


0922 


A8 40 


0921* 


26: C7 05 0000 


0929 


75 08 


0923 




092B 


2B CO 


0920 


B9 80O0 


0930 


F3/ AB 


0932 


C3 


0933 




0933 


BO IE 


0935 


E6 80 


0937 


BO BO 


0939 


E6 70 


093B 


EB 00 


093D 


8A C3 


093F 


E6 71 


09U1 


EB 00 


0943 


BO 81 


09U5 


E6 70 


0947 


EB 00 


0949 


8A 07 


094B 


E6 71 



START STORAGE SIZE/CLEAR 



AX, ES_TEMP 

ES,AX 

H0W_BIG1 



START WITH COUNT 



POINT ES TO DATA 

POINT TO SEGMENT TO TEST 

DO THE FIRST 64K 



JZ 
JMP 

ADD 



BX,16*4 
DO NEXT 64K ( XXOOOO ) BLOCK 
NO BYTE PTR DS: ( ES_TEMP. BASE_H 
CHECK FOR TOP OF RAM (FEOOOO) 



NOT_END_BASE: 
CMP 
JNZ 

CALL HOW_B I G_EN01 

JMP DONE! 



BUMP MEMORY COUNT BY 64K 



_8YTE),0FEH 



; LAST OF POSSIBLE RAM^ 

; GO I F NOT 

; GO SET MEMORY SIZE 



. FILL 

HOW BIG1 : 


/CHECK LOOP 


SUB 


DI,DI 


MOV 


AX,0AA55H ; 


MOV 


CX,AX ; 


MOV 


ES:[DI],AX ; 


MOV 


AL,0FH ; 


MOV 


AX,ES:[DI] ; 


MOV 


ES:[D1],AX ; 


XOR 


AX.CX ; 


JNZ 


H0W_BIG_END1 ; 


PUSH 


DS ; 


MOV 


AX,RSDA PTR ; 


MOV 


DS.AX ; 


CMP 


RESET FLAG,1234H ; 


POP 


DS ; 


JNZ 


HOW_B 1 G_2A ; 


MOV 


WORD PTR ES:[DI ],0101H ; 


MOV 


AX,OFFFFH ; 


PUSH 


AX 


POP 


AX ; 


MOV 


AX,ES:[DI] ; 


IN 


AL, PORT B ; 


TEST 


AL, IO_CHK 


MOV 


WORD PTR ES:[DI ],0 ; 


JNZ 


H0W_BIG_END1 ; 


HOW BIG 2A: 




SUB 


AX, AX ; 


MOV 


CX,2000H*4 ; 


REP 


STOSW 


RET 




HOW BIG ENDl : 




MOV 


AL,1EH ; 


OUT 


MFG_P0RT,AL ; 


; SET 


10 RAM SIZE IN CMOS 


MOV 


AL,M SIZE LO ; 


OUl 


CMOS PORT,AL ; 


JMP 


SHORT $+2 


MOV 


AL.BL ; 


OUT 


CMOS P0RT+1,AL ; 


JMP 


SHORT $+2 ; 


MOV 


AL,M SIZE HI ; 


OUT 


CMOS PORT.AL ; 


JMP 


SHORT $+2 ; 


MOV 


AL,BH ; 


OUT 


CM0S_P0RT+1,AL ; 


RET 




; TEST 


ADDRESS LINES 19 - 23 



TEST PATTERN 

SAVE PATTERN 

SEND PATTERN TO MEM. 

PUT SOMETHING IN AL 

GET PATTERN 

INSURE NO PARITY 10 CHECK 

COMPARE PATTERNS 

GO END IF NO COMPARE 



POINT TO SYSTEM DATA AREA 

SOFT RESET 
RESTORE DS 
GO IF NOT SOFT RESET 

TURN OFF BOTH PARITY BITS 



DELAY 

CHECK PARITY 

CHECK FOR 10 CHECK 



WRITE ZEROS 

SET COUNT FOR 32K WORDS 

FILL 32K WORDS 



OOCHECKPOINT IE <><><> 



ADDRESS LO BYTE 

10 DELAY 

SET LOW MEMORY SIZE 
IN CMOS 

10 DELAY 
ADDRESS HI BYTE 

10 DELAY 

SET THE HIGH MEMORY SIZE 
IN CMOS 



094E 


BO 


1 F 




0950 


F6 


80 




0952 


C6 


06 0O4C 


00 


0957 


BA 


FFFF 




095A 


E8 


098A R 




095D 


2B 


D2 




095F 


C6 


06 0O4C 


08 


0964 


L« 


098A R 




0967 


C6 


06 0O4C 


10 


096C 


Efi 


098A R 




096 F 


C6 


06 004C 


20 


0974 


E8 


098A R 




0977 


C6 


06 004C 


40 


097C 


E8 


098A R 





oooCHECKPOINT IF <><> 

HI_BYTE),OOH 

WRITE FFFF AT ADDRESS 



MOV AL,1FH ; 

OUT MFG_PORT,AL ; 

MOV BYTE PTR DS: ( ES_TEMP. BASE 

MOV DX,OFFFFH ; 

CALL SDO 

SUB DX,DX ; WRITE 

MOV BYTE PTR DS: ( ES_TEMP. BASE_H l_3YTE) , 08H 

CALL SDO ; 

MOV BYTE PTR DS: ( ES_TEMP. BASE_H l_BYTE ) , 10H 

CALL SDO ; 

MOV BYTE PTR DS: ( ES_TEMP. BASE_H l_BYTE ) , 20H 

CALL SDO ; 

MOV BYTE PTR OS: ( ES_TEMP. BASE_H l_BYTE) , 40H 

CALL SDO ; 



5-46 Test 1 



097F 
098'4 


C6 06 OOUC 
E8 098A R 


80 


0987 


E8 20 90 




098A 
098C 
098F 
0991 


2B FF 
B8 00U8 
8E CO 
26: 89 15 




0994 


C6 06 OOUC 


00 


0999 
099C 
099E 
09A3 
09A5 
09A8 


B8 00U8 
8E CO 
26: 81 30 
74 03 
E9 07EA R 
03 


FFFF 


09A9 
09AB 
09AD 


BO 20 
E6 80 
E9 0000 E 





09B0 


BO 


21 


09B2 


E6 


SO 


09BU 


BC 


R 


09 B7 


8E 


04 


09B9 


BC 


0100 R 


09BC 


B8 


R 


09BF 


8E 


D8 


09C1 


BO 


8E 


09C3 


E6 


70 


09Ci> 


LB 


00 


09C7 


EM 


71 


09C9 


A8 


CO 


09CB 


7U 


03 


09CD 


EB 


77 90 


09D0 


8A 


EO 


09D2 


BO 


8E 


09011 


E6 


70 


0906 


86 


04 


09D8 


2U 


OF 


09DA 


E6 


71 


09DC 


BO 


94 


09DE 


EB 


00 


09 EO 


E6 


70 


09E2 


EB 


00 


09E4 


EU 


71 


09E6 


8A 


EO 


09E8 


A8 


30 


09 EA 


75 


2E 


09EC 


E8 


09FB R 


09EF 


74 


4A 


09F1 


F6 


06 0012 R 20 


09F6 


74 


7A 


09F8 


EB 


40 90 


09FB 






09 fB 


B9 


0000 


09FE 






09FE 


50 




09FF 


IE 




OAOO 


8E 


D9 


0A02 


2B 


D6 


OAOU 


8B 


07 


0A06 


IF 




0A07 


3D 


AA55 


OAOA 


58 




OAOB 


74 


00 


OAOD 


81 


01 0080 


OAII 


81 


F9 0800 


0A15. 


7C 


E7 


0A17 


23 


09 


0A19 






0A19 


03 




0A1A 






OAIA 


E8 


09FB R 


0A1D 


74 


27 


OAl F 


8A 


04 


0A21 


F6 


06 0012 R ^0 


0A26 


74 


OB 


0A28 


24 


30 


0A2A 


30 


30 


0A2C 


75 


18 


0A2E 


8A 


04 


0A30 


EB 


09 90 


0A33 






OA33 


24 


30 


0A35 


30 


30 


0A37 


8A 


04 


0A39 


74 


OB 


0A3B 


A8 


01 


0A3D 


75 


33 


0A3F 


F6 


06 0012 R 20 


OAl+U 


74 


20 





MOV 


BYTE PTR OS: ( ES 


_TEMP 


BASE_HI_BYTE),80H 




CALL 


SDO 








JMP 


SD2 




; TEST PASSED CONTINUE 


SDO: 


SUB 


01 ,DI 








MOV 


AX,ES TEMP 






POINT ES TO DATA 




MOV 


ES.AX 






POINT TO SEGMENT TO TEST 




MOV 


ES:[DI ],DX 






WRITE THE PATTERN 




MOV 


BYTE PTR DS:(ES. 


.TEMP 


BASE_HI_BYTE),00H 




MOV 


AX,ES TEMP 




; POINT ES TO DATA 




MOV 


ES,AX 






POINT TO SEGMENT TO TEST 




CMP 


WORD PTR ES:[Di 


,OFFFFH 


DID LOCATION CHANGE? 




JZ 


SD1 






CONTINUE IF NOT 




JMP 


SHUT_8 






GO HALT 1 F YES 


SD1: 


RET 


A SHUTDOWN 












SD2: 


MOV 


AL,20H 




• <><><><><><><><><><><><> 




OUT 


MFC PORT.AL 






oooCHEOKPOlNT 20 <><> 




JMP 


PROO SHUTDOWN 






CAUSE A SHUTDON (RETURN \ 


; RETURN 1 FROM SHUTDOWN : 


SHUT!: 


MOV 


AL,21H 




; <><><><><><><><><><><><> 




OUT 


MFC PORT,AL 






oooCHECKPOINT 21 <><> 




MOV 


SP. STACK 






SET REAL MODE STACK 




MOV 


SS.SP 










MOV 


SP, OFFSET TOS 










MOV 


AX, DATA 




; SET UP THE REAL DATA AREV 




MOV 


DS,AX 








-- GET 


THE CONFIGURATION 


FROM 


CMOS 




MOV 


AL.DIAG STATUS 




; CHECK CMOS GOOD 




OUT 


CMOS PORT,AL 








JMP 


SHORT $+2 








IN 


AL.CMOS PORT+1 






GET THE STATUS 




TEST 


AL.OCOH 






OK? 




JZ 


M OK 






GO IF YES 




JMP 


BAD MOS 






GO IF NOT 


M_OK: 


MOV 


AH,AI 






SAVE THE CMOS STATUS 




MOV 
OUT 


AL.DIAG STATUS 
CMOS PORT,AL 






ADDRESS THE D 1 AG STATUS 




XCHG 


AL,AH 






RESTORE THE STATUS BYTE 




AND 


AL,ODFH 






CLEAR THE MIN CONFIG BIT 




OUT 


CMOS PORT+1, AL 










MOV 


AL,C EQUIP 






GET THE EQUIPMENT BYTE 




JMP 


SHORT $+2 










OUT 


CMOS PORT,AL 










JMP 


SHORT $+2 






10 DELAY 




IN 


AL,0M0S_P0RT+1 












RE CONFIGURATION HAS CORRECT VIDEO TYPE 








MOV 


AH,AL 




; SAVE VIDEO TYPE 




TEST 


AL, 030H 






ANY VIDEO? 




JNZ 


MOS OK 1 






CONTINUE 




CALL 


CHK VIDEO 






INSURE VIDEO ROM PRESENT 




JZ 


MOS OK 






CONTINUE 



CHK V 


DEO: 






MOV 


CX,OCOOOH 


CHK V 


DE01: 






PUSH 


AX 




PUSH 


DS 




MOV 


OS, OX 




SUB 


BX,BX 




MOV 


AX,[BX] 




POP 


DS 




CMP 


AX,0AA55H 




POP 


AX 




JZ 


CHK VIDE02 




ADD 


CX,080H 




CMP 


CX,00800H 




JL 


CHK VIDEOI 




AND 


OX, OX 


CHK VIDE02: 






RET 





START OF 10 ROM 



GET THE FIRST 2 LOCATIONS 

RESTORE DATA SEG AND BUS SETTLE 

IS THE VIDEO ROM PRESENT? 

GET THE CONFIG 

GO IF VIDEO ROM INSTALLED 

POINT TO NEXT 2K BLOCK 

TOP OF VIDEO ROM AREA YET? 

TRY AGAIN 

SET NON ZERO FLAG 



; RETURN TO CALLER 
CMOS VIDEO BITS NON ZERO (CHECK FOR PRIMARY DISPLAY AND NO VIDEO ROM) 



MOV AL.AH 

TEST MFG_TST,DSP_JMP 

JZ M0S_0K_2 



MONO 


CARD IS 


AND 


AL,30H 


CMP 


AL, 30H 


JNZ 


BAD MOS 


MOV 


AL,AH 


JMP 


MOS_OK 


. COLOR 


CARD 


MOS OK 2: 




AND 


AL,30H 


CMP 


AL,30H 


MOV 


AL,AH 


JZ 


BAD MOS 


. CONFI 


CURAT ION 



PRIMARY DISPLAY 



RESTORE CONFIGURATION 

CHECK FOR DISPLAY JUMPER 

GO IF COLOR CARD IS PRIMARY DISPLAY 

(NO JUMPER INSTALLED) 

INSURE MONO IS PRIMARY 
CONFIG OK? 
GO I F NOT 

RESTORE CONFIGURATION 
USE THE CONFIG BYTE FOR CRT 



STRI P UNWANTED BITS 

MUST NOT BE MONO WITH JUMPER 

RESTORE CONFIGURATION 

GO I F YES 



CONFIGURATION MUST HAVE AT LEAST ONE DISKETTE 



TEST AL,01H 

JNZ NORMAL_CONFIG 

TEST MFG_TST,MFG_JMP 

JZ NORMAL_OONFIG 



MUST HAVE AT LEAST ON DISKETTE 
GO SET CONFIGURATION IF OK 
EXCEPT IF MFC JUMPER IS INSTALLED 
GO IF INSTALLED 



Test 1 5-47 



MINIMUM CONFIG WITH BAD CMOS OR NON VALID VIDEO 



0An6 


BO 


8E 


0AU8 


F6 


70 


OAUA 


EB 


00 


OAttC 


Fk 


71 


OAUE 


Afi 


CO 


OA'iO 


?■> 


OE 


0A52 


86 


CU 


0A51 


BO 


8E 


0A56 


F6 


70 


0A58 


EB 


00 


0A5A 


86 


CU 


0A5C 


DC 


20 


0A5E 


E6 


71 


0A60 






0A60 


L8 


09FB R 


0A63 


BO 


01 


0A65 


74 


OB 


0A67 


F6 


06 001 


0A6C 


BO 


11 


0A6E 


yu 


02 



0A72 
0A77 
0A79 

0A7B 
0A7D 
0A80 
0A86 



0A88 
0A8A 
0A8D 



. MINI 

BAD MOS: 


MUM CONFIG WITH B/ 


MOV 


AL,DIAG STATUS 


OUT 


CMOS PORT.AL 


JMP 


SHORT $+2 


IN 


AL,CMOS PORT+1 


TEST 


AL,0C0H 


JNZ 


BAD MOST 


XCHG 


AL.AH 


MOV 


AL.DIAG STATUS 


OUT 


CMOS PORT,AL 


JMP 


SHORT $+2 


XCHG 


AL,AH 


OR 


AL,20H 


OUT 


CMOS PORT+1, AL 


BAD M0S1 : 




CALL 


CHK VIDEO 


MOV 


AL.OIH 


JZ 


N0RMAL_C0NF1G 


TEST 


MFG TST.DSP JMP 


MOV 


AL, 11H 


JZ 


NORMAL CONFIG 



0A70 BO 31 



GET THE DIAGNOSTIC STATUS 



WAS THE BATTERY DEFECTIVE OR BAD CKSUM 

GO I F YES 

SAVE THE STATUS 

CHECK CMOS GOOD 



STORE THE STATUS 

CHECK FOR VIDEO ROM 

DISKETTE ONLY 

GO IF VIDEO ROM PRESENT 

CHECK FOR DISPLAY JUMPER 
DEFAULT TO 40X25 COLOR 
GO IF JUMPER IS INSTALLED 

DISKETTE / BW CRT 80X25 



CONFIGURATION AND MFG. 
NORMAL_CONFIG: 



F6 06 0012 R 20 
75 02 
24 3E 

2A E4 

A3 0010 R 

81 3E 0072 R 1234 

74 2C 



BO 60 

E8 0405 R 

BO 4D 



TEST 
JNZ 
AND 

SUB 
MOV 
CMP 



MFG_TST,MFG_JMP 

N0RM1 

AL,03EH 

AH, AH 

EqUIP_FLAG,AX 

RESET_FLAG.1234H 



IS THE MANUFACTURING JUMPER 
GO I F NOT 
STRIP DISKETTE FOR MFG TEST 



0A8F E6 60 



0A91 


?B 


C9 




0A93 


E8 


040A 


R 


0A96 


B9 


7FFF 




0A99 


F4 


64 




0A9B 


Aft 


01 




0A9D 


El 


FA 




0A9F 


9C 






OAAO 


BO 


AD 




0AA2 


E8 


0405 


R 


0AA5 


9D 






0AA6 


74 


OC 




0AA8 


F4 


60 




OAAA 


A2 


0072 


R 


OAAO 


3C 


65 




OAAF 


fb 


03 




0AB1 


t9 


002C 


K 



GET THE FIRST SELF TEST RESULTS FROM KEYBOARD 



MOV 
CALL 
MOV 



AL,60H 
C8042 
AL,4DH 



AL, STATUS_PORT 

AL,OUT_BUF_FULL 

TST6 



PUSHF 
MOV 
CALL 
POPF 
JZ 
IN 



E6 

AL, PORT_A 

BYTE PTR RESET_FLAG,AL 



MOV 

-- CHECK FOR MFG REQUEST 

CMP AL,065H 

JNE E6 

JMP MFG_BOOT 



ENABLE KEYBOARD 

ISSUE WRITE BYTE COMMNAD 

ENABLE OUT BUFF FULL INT 

SYS FLAG - PC 1 COMP - INH OVERRIDE 

ENABLE KEYBOARD 



WAIT FOR COMMAND ACCEPTED 



SET LOOP COUNT FOR APPROX 100 MS 

TO RESPOND 
WAIT FOR OUTPUT BUFF FULL 

TRY AGAIN IF NOT 

SAVE FLAGS 
DISABLE KEYBOARD 
ISSUE THE COMMAND 
RESTORE FLAGS 
CONTINUE WITHOUT RESULTS 
GET INPUT FROM KEY BOARD 
TEMP SAVE FOR AA RECIEVED 



LOAD MFG. TEST REQUEST? 
GO TO BOOTSTRAP 1 F SO 



TEST. 14 

INITIALIZE AND START CRT CONTROLLER (6845) 

TEST VIDEO READ/WRITE STORAGE. 
DESCRIPTION 

RESET THE VIDEO ENABLE SIGNAL. 

SELECT ALPHANUMERIC MODE, 40 * 25, B & W. 

READ/WRITE DATA PATTERNS TO STG. CHECK STG 

ADDRESSABILITY. 
ERROR = 1 LONG AND 2 SHORT BEEPS 



0AB4 






0AB4 


A1 


0010 R 


0A87 


50 




0AB8 


BO 


30 


OABA 


A3 


0010 R 


OABD 


?A 


E4 


OABF 


CD 


10 


0AC1 


BO 


20 


0AC3 


A3 


0010 R 


0AC6 


?A 


E4 


0AC8 


CD 


10 


OACA 


B8 


0001 


OACD 


CD 


10 


OACF 


58 




OADO 


A3 


0010 R 


0AD3 


24 


30 


0AD5 


/5 


12 


0AD7 


IF 




0AD8 


50 




0AD9 


2B 


CO 


OADB 


a^ 


D8 


OADD 


BF 


0040 R 


OAEO 


C7 


05 0000 E 


0AE4 


58 




0AE5 


IK 




0AE6 


E9 


0B68 R 


0AE9 






0AE9 


3C 


30 


OAEB 


74 


08 


OAED 


FF 


C4 


OAEF 


3C 


20 


0AF1 


75 


02 


0AF3 


B4 


03 


0AF5 


86 


EO 


0AF7 


50 




0AF8 


^A 


E4 


OAFA 


CD 


10 


OAFC 


58 




OAFD 


50 




OAFE 


BB 


BOOO 


0801 


BA 


0388 



MOV 


AX, EQUIP FLAG 


PUSH 


AX 


MOV 


AL,30H 


MOV 


EQUIP FLAG, AX 


SUB 


AH, AH 


INT 


INT VIDEO 


MOV 


AL,20H 


MOV 


EQUIP FLAG, AX 


SUB 


AH, AH 


INT 


INT VIDEO 


MOV 


AX, 0001 H 


INT 


INT VIDEO 


POP 


AX 


MOV 


EQUIP FLAG, AX 


AND 


AL, 30H 


JNZ 


E7 


PUSH 


DS 


PUSH 


AX 


SUB 


AX, AX 


MOV 


DS.AX 


MOV 


Dl, OFFSET VIDEO INT 


MOV 


WORD PTR [Dl ], OFFSET 


POP 


AX 


POP 


DS 


JMP 


E18 1 



CMP 


AL,20H 


JNE 


E8 


MOV 


AH, 3 


XCHG 


AH,AL 


PUSH 


AX 


SUB 


AH, AH 


INT 


INT VIDEO 


POP 


AX 


PUSH 


AX 


MOV 


BX,OBO00H 


MOV 


DX,3B8H 



SEND I NIT TO B/W CARD 

AND I NIT COLOR CARD 

SET COLOR 40X25 MODE 

RECOVER REAL SWITCH INFO 
RESTORE IT 
ISOLATE VIDEO SWS 
VIDEO SWS SET TO 0? 
SAVE THE DATA SEGMENT 

SET DATA SEGMENT TO 

SET INT 10H TO DUMMY 
DUMMY_RETURN ; RETURN IF NO VIDEO CARD 
RESTORE REGISTERS 

BYPASS VIDEO TEST 
TEST_VIDEO: 
B/W CARD ATTACHED? 
YES - SET MODE FOR B/W CARD 
SET COLOR MODE FOR COLOR CD 
80X25 MODE SELECTED? 
NO - SET MODE FOR 40X25 
SET MODE FOR 80X25 
SET_MODE: 

SAVE VIDEO MODE ON STACK 
INITIALIZE TO ALPHANUMERIC MD 
CALL VIDE0_10 

RESTORE VIDEO SENSE SWS IN AH 
RESAVE VALUE 

BEG VIDEO RAM ADDR B/W CD 
MODE REG FCR B/W 



5-48 Testl 



0B0i4 


B9 


0800 


0B07 


BO 


01 


0B09 


80 


FC 30 


OBOC 


7U 


09 


OBOE 


B7 


B8 


OBIO 


BA 


03D8 


OBI 3 


B^ 


20 


0B15 


FF 


C8 


0817 






0B17 


FF 




0B18 


8E 


C3 


0B1A 


8F 


DB 


0B1C 


01 


C9 


0B1E 


FH 


0000 


0B21 


75 


6F 



0B23 




0823 


BO 22 


0825 


E6 80 


0627 


58 


0828 


50 


0B29 


B4 00 


0B2B 


CD 10 


0B2D 


B8 7020 


0B30 


2B FF 


0832 


B9 0028 


0B35 


F3/ AB 



0B37 


58 




0B38 


50 




0B39 


80 


FC 30 


0B3C 


BA 


03 BA 


0B3F 


71+ 


03 


OBUl 


BA 


03DA 


OBUU 






OBUU 


B4 


08 


0B46 






0646 


2B 


09 


0Bi48 


EC 




0BU9 


22 


CU 


OBUB 


75 


04 


OBUD 


F? 


F9 


OBUF 


EB 


^^ 


0B51 


2B 


C9 


OB53 


EC 




0654 


22 


04 


OB56 


7U 


05 


0B58 


E2 


F9 


0B5A 


EB 


36 90 


0B5D 


B1 


03 


0B5F 


02 


EC 


0B61 


75 


E3 


OB63 






OB63 


58 




0B64 


BU 


00 


0B66 


CD 


10 


OB68 


BA 


0000 


0B6B 


BO 


23 


0B6D 


E6 


80 


0B6F 


8E 


DA 


0B71 


2B 


DB 


OB73 


8B 


07 


OB75 


53 




OB76 


5B 




OB77 


3D 


AA55 


0B7A 


75 


05 


0B7C 


E8 


0000 E 


0B7F 


EB 


04 


0B81 


81 


02 0080 


0B85 


81 


FA C800 


OB89 


7C 


EG 


0B8B 


BO 


24 


0B8D 


E6 


80 


OB8F 


E9 


0000 E 


0B92 


E8 


0000 E 


OB95 


C6 


06 0015 R 00 


0B9A 


80 


3E 0072 R 64 


0B9F 


74 


OD 


0BA1 


F6 


06 0012 R 20 


0BA6 


74 


06 


0BA8 


BA 


0102 


OBAB 


E8 


0000 E 


OBAE 


IE 




OBAF 


AT 


0010 R 


0BB2 


2U 


30 


OBBU 


3C 


30 


0BB6 


7U 


31 



MOV 


OX, 2048 


MOV 


AL,1 


CMP 


AH, 30H 


JE 


E9 


MOV 


BH,0B8H 


MOV 


DX, 3D8H 


MOV 


CH,20H 


DEC 


AL 


OUT 


DX,AL 


MOV 


ES,BX 


MOV 


DS,BX 


ROR 


OX, 1 


CALL 


STGTST CNT 


JNE 


E17 



RAM WORD CNT FOR B/W CD 

SET MODE FOR BW CARD 

B/W VIDEO CARD ATTACHED? 

YES - GO TEST VIDEO STG 

BEG VIDEO RAM ADDR COLOR CD 

MODE REG FOR COLOR CD 

RAM WORD CNT FOR COLOR CD 

SET MODE TO FOR COLOR CD 

TEST VIDEO_STG: 

DISABLE VIDEO FOR COLOR CD 

POINT ES TO VIDEO RAM 

POINT OS TO VIDEO RAM 

DIVIDE BY 2 FOR WORD COUNT 

GO TEST VIDEO R/W STG 

R/W STG FAILURE - BEEP SPK 



TEST. 15 

SETUP VIDEO DATA ON SCREEN FOR VIDEO 

LINE TEST. 
DESCRI PTION 

ENABLE VIDEO SIGNAL AND SET MODE. 

DISPLAY A HORIZONTAL BAR ON SCREEN. 





MOV 


AL,22H ; 




OUT 


MFG_PORT,AL ; 




POP 


AX 




PUSH 


AX ; 




MOV 


AH,0 ; 




INT 


INT VIDEO ; 




MOV 


AX,7020H ; 




SUB 


D1,DI ; 




MOV 


CX,40 ; 




REP 


STOSW ; 


; TEST 


16 






CRT INTERFACE LINES TEST : 


• DESCRIPTION 






SENSE 


ON/OFF TRANSITION OF THE : 




VIDEO 


ENABLE AND HORIZONTAL : 




SYNC 


LINES. : 




POP 


AX ; 




PUSH 


AX ; 




CMP 


AH,30H ; 




MOV 


DX,03BAH ; 




JE 


Ell ; 




MOV 


DX,03DAH ; 


Ell: 








MOV 


AH, 8 


E12: 








SUB 


CX,OX 


El 3: 


IN 


AL,DX ; 




AND 


AL,AH ; 




JNZ 


E14 ; 




LOOP 


El 3 ; 




JMP 


SHORT El 7 ; 


E14: 


SUB 


CX,CX 


E15: 


IN 


AL,DX ; 




AND 


AL,AH ; 




JZ 


El 6 




LOOP 


El 5 ; 




JMP 


El 7 ; 



E16: 


MOV 


CL,3 




SHR 


AH,CL 




JNZ 


El 2 


E18: 








POP 


AX 




MOV 


AH.O 




INT 


INT_VIDEO 
CHECK FOf 


El 8 1: 


MOV 


DX,OCOOOH 


E18A: 


MOV 


AL,23H 




OUT 


MFG PORT,AL 




MOV 


DS,DX 




SUB 


BX.BX 




MOV 


AX,[BX] 




PUSH 


BX 




POP 


BX 




CMP 


AX,0AA55H 




JNZ 


E18B 




CALL 


ROM CHECK 




JMP 


SHORT E18C 


E18B: 


ADD 


DX,0080H 


E18C: 


CMP 


DX,OC800H 




JL 


E18A 




MOV 


AL,24H 




OUT 


MFG PORT.AL 




JMP 


POST2 



0BB8 C6 06 0015 R OD 



OBBD 


BA 


03B8 


OBCO 


BO 


01 


0BC2 


FF 




0BC3 


BB 


BOOO 


0BC6 


8F 


DB 


0BC8 


B8 


AA55 



GET VIDEO SENSE SWS (AH) 

SAVE IT 

ENABLE VIDEO AND SET MODE 

VIDEO 

WRT BLANKS IN REVERSE VIDEO 

SETUP STARTING LOG 

NO. OF BLANKS TO DISPLAY 

WRITE VIDEO STORAGE 



GET VIDEO SENSE SW INFO 

SAVE IT 

B/W CARD ATTACHED? 

SETUP ADDR OF BW STATUS PORT 

YES - GO TEST LINES 

COLOR CARD IS ATTACHED 

LINE_TST: 

OFLOOP_ONT: 

READ CRT STATUS PORT 

CHECK VIDEO/HORZ LINE 

ITS ON - CHECK IF IT GOES OFF 

LOOP TILL ON OR TIMEOUT 

GO PRINT ERROR MSG 

READ CRT STATUS PORT 
CHECK VIDEO/HORZ LINE 
ITS ON - CHECK NEXT LINE 
LOOP IF ON TILL IT GOES OFF 
GO ERROR BEEP 



GET NEXT BIT TO CHECK 

CONTINUE 

DISPLAY_CURSOR: 

GET VIDEO SENSE SWS (AH) 

SET MODE AND DISPLAY CURSOR 

CALL VIDEO I/O PROCEDURE 



CHECK FOR THE ADVANCED VIDEO CARD 



SET THE LOW SEGMENT VALUE 
oooCHECKPOINT 23 <><> 



GET FIRST 2 LOCATIONS 

LET BUS SETTLE 

PRESENT? 

NO? GO LOOK FOR OTHER MODULES 

GO SCAN MODULE 

POINT TO NEXT 2K BLOCK 
TOP OF VIDEO ROM AREA YET? 
GO SCAN FOR ANOTHER MODULE 

OOOCHECKPOINT 24 oooo 
GO TO NEXT TEST 



■ CRT ERROR SET MFG CKPT AND ERR BEEP 



CHECKPOINT 00 = MONO FAILED 



MOV 


MFG ERR FLAG.OCH 


CMP 


BYTE PTR RESET FLAG,064H 


JZ 


E19 


TEST 


MFG TST,MFG JMP 


JZ 


E19 


MOV 


DX, 102H 


CALL 


ERR BEEP 


PUSH 


DS 


MOV 


AX, EQU 1 P FLAG 


AND 


AL, 30H 


CMP 


AL,30H 


JZ 


TRY COLOR 


COLOR 


FAILED TRY MONO 



-- CHECKPOINT OD = COLOR FAILED 

MOV MFG_ERR_FLAG,ODH 

MOV DX, 3B8H 

MOV AL, 1 

OUT DX,AL 

MOV BX, OBOOOH 

MOV DS, BX 

MOV AX,0AA55H 



POINT TO DATA 



;o<><><>CRT ERR CHKPT. OCoo 

; IS THIS A MFG REQUEST? 
; BY PASS ERROR BEEP IF YES 
; IS THE MFG LOOP JUMPER INSTALLED? 
; BY PASS ERROR BEEP IF YES 

; GO BEEP SPEAKER 

; GET THE CURRENT VIDEO 

; STRI P OTHER BITS 

; IS IT MONO? 

; GO I F YES 



;<><><><>CRT ERR CHKPT. 
; DISABLE B/W 



WRITE AN AA55 



Test 1 5-49 



OBCB 


28 


OB 


OBCD 


89 


07 


OBCf 


EB 


00 


OBDl 


8B 


07 


0BD3 


3D 


AA55 


0BD6 


IF 




0BD7 


75 


56 


0BD9 


81 


OE 0010 R 0030 


OBDF 


Al 


0010 R 


ORF? 




F4 


0BE4 


CO 


10 


0BE6 


EB 


35 90 


0BE9 






0BE9 


BO 


01 


OBEB 


2A 


E'l 


OBED 


CD 


10 


OBEF 


BA 


03D8 


0BF2 


BO 


00 


OBFU 


EE 




0BF5 


SB 


B800 


0BF8 


8E 


DB 


OBFA 


B8 


AA55 


OBFD 


2B 


DB 


OBFF 


89 


07 


OCOl 


EB 


00 


0C03 


8B 


07 


0C05 


30 


AA55 


0C08 


IF 




0C09 


75 


2U 


OCOB 


81 


26 0010 R FFCF 


ocn 


81 


OE 0010 R 0010 


0C17 


BO 


01 


0C19 


2A 


E't 


0C1B 


CD 


10 


0C1D 






0C1D 


58 




0C1E 


Al 


0010 R 


0C21 


2k 


30 


0C23 


30 


30 


0C25 


2A 


CO 


0C27 


7U 


02 


0C29 


FE 


CO 


0C2B 


50 




0C2C 


E9 


0B63 R 


0C2F 






0C2F 


IE 




OC30 


2B 


CO 


0C32 


8E 


D8 


0C34 


BF 


0040 R 


OC37 


C7 


05 0000 E 


0C3B 


IF 




0C3C 


E9 


0B68 R 


0C3F 






0C3F 









SUB 


BX,BX 




MOV 


[ BX ] , AX 




JMP 


SHORT $+2 




MOV 


AX, [BX] 




CMP 


AX,0AA55H 




POP 


OS 




JNZ 


E17 3 




OR 


EQUIP FLAG,30H 




MOV 


AX, EQU 1 P FLAG 




SUB 


AH, AH 




INT 


INT VIDEO 




JMP 


E17_1 




MONO 


FAILED TRY COLOR 


TRY_C0L0R: 






MOV 


AL,01H 




SUB 


AH, AH 




INT 


INT VIDEO 




MOV 


DX, 3D8H 




MOV 


AL,0 




OUT 


DX,AL 




MOV 


BX,0B800H 




MOV 


DS,BX 




MOV 


AX,0AA55H 




SUB 


BX.BX 




MOV 


[ BX ] , AX 




JMP 


SHORT $+2 




MOV 


AX, [BX] 




CMP 


AX,0AA55H 




POP 


OS 




JNZ 


E17 3 




AND 


EQUIP FLAG,OFFCFH 




OR 


EQUI P FLAG, 10H 




MOV 


AL,01H 




SUB 


AH, AH 




INT 


INT_VIDE0 


E17_1: 








POP 


AX 




MOV 


AX, EQUIP FLAG 




AND 


AL,30H 




CMP 


AL.30H 




SUB 


AL,AL 




JZ 


E17 2 




INC 


AL 


E17 2: 


PUSH 


AX 


E17_U: 


JMP 


E18 
IDEO CARDS FAI LED ' 






E17_3: 








PUSH 


DS 




SUB 


AX, AX 




MOV 


DS,AX 




MOV 


Dl , OFFSET VIDEO l^ 




MOV 


WORD PTR [Dl ],0FFi 




POP 


DS 




JMP 


E18 1 


P0ST1 


ENDP 




CODE 


ENDS 
END 





TO THE FIRST LOCATION 

ALLOW BUS TO SETTLE 

READ THE FIRST LOCATION 

IS THE MONO VIDEO CARD THERE? 

RESTORE THE DATA SEGMENT 

GO I F NOT 

TURN ON MONO BITS IN EQUIP FLAG 

ENABLE VIDEO 



SET MODE COLOR 40X25 



DISABLE COLOR 



ALLOW BUS TO SETTLE 

READ THE FIRST LOCATION 

IS THE COLOR VIDEO CARD THERE? 

RESTORE THE DATA SEGMENT 

GO IF NOT 

TURN OFF VIDEO BITS 

SET COLOR U0X24 



SET NEW VIDEO TYPE ON STACK 



ED SET DUMMY RETURN IF RETRACE FALIURE 



; SET OS SEGMENT TO 

; SET INT lOH TO DUMMY 
, OFFSET DUMMY_RETURN ; RETURN IF NO VIDEO CARD 

; BYPASS REST OF VIDEO TEST 



5-50 Test 1 



TITLE 01/03/84 TEST2 POWER ON SELF TEST 


.LIST 




PUBLIC 


C21 


PUBLIC 


SHUT2 


PUBLIC 


SHUT3 


PUBLIC 


SHUTil 


PUBLIC 


SHUT6 


PUBLIC 


SHUT? 


PUBLIC 


POST2 



EXTRN 


H5:NEAR 


EXTRN 


POST? : NEAR 


EXTRN 


SET TOO -.NEAR 


EXTRN 


EO:NEAR 


EXTRN 


EO A: NEAR 


EXTRN 


EO_B:NEAR 


EXTRN 


VI R ERR: NEAR 


EXTRN 


CMU.-NEAR 


EXTRN 


CMU A: NEAR 


EXTRN 


CMU B:NEAR 


EXTRN 


CMU C:NEAR 


EXTRN 


CMU D:NEAR 


EXTRN 


CM! :NEAR 


EXTRN 


CM2:NEAR 


EXTRN 


CM3: NEAR 


EXTRN 


E1_A:NEAR 


EXTRN 


El: NEAR 


EXTRN 


ADERRl :NEAR 


EXTRN 


ADERR:NEAR 



101 ERROR CODE 

102 ERROR CODE 

103 ERROR CODE 



104 


ERROR 


CODE 


lO-i 


ERROR 


CODE 


106 


ERROR 


CODE 


107 


ERROR 


CODE 


108 


ERROR 


CODE 


109 


ERROR 


CODE 


Ifil 


ERROR 


CODE 


16? 


ERROR 


CODE 


163 


ERROR 


CODE 


164 


ERROR 


CODE 


201 


ERROR 


CODE 


202 


ERROR 


CODE 


203 


ERROR 


CODE 



EXTRN F1:NEAR 

EXTRN LOCK: NEAR 

EXTRN n_A:NEAR 

EXTRN F1_B:NEAR 



301 ERROR CODE 

302 ERROR CODE 

303 ERROR CODE 

304 ERROR CODE 



; 601 ERROR CODE 



0000 


F$0 


OA 


0002 


Ffi 


0000 E 


0005 


E8 


0000 E 


0008 


FA 




0009 


BO 


00 


OOOB 


t6 


21 


OOOD 


E6 


A1 


000 F 


EB 


00 


0011 


F4 


21 


0013 


8A 


to 


0015 


E4 


Al 


001? 


OA 


EO 


0019 


75 


2C 


001 B 


BO 


25 


001 D 


L6 


80 


001 F 


BO 


FF 


0021 


L6 


21 



EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 

EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 



E_MSG:NEAR 

XPC_8YTE:NEAR 

VECTOR_TABLE:NEAR 

SLAVE_VECTOR_TABLE: NEAR 

NMI_INT:NEAR 

PRINT_SCREEN:NEAR 

BLINK_INT:NEAR 

PRT_HEX:NEAR 

F3B:NEAR 

PRT_SEG:NEAR 

XPC_BYTE:NEAR 

ROM_CHECK:NEAR 

ROS_CHECKSUM:NEAR 

SEEKrNEAR 

ERR_BEEP:NEAR 

P_MSG:NEAR 

START_1 : NEAR 

F4:NEAR 

F4E:NEAR 

F3A:NEAR 

DISK_BASE:NEAR 

F3D:NEAR 

F3D1 :NEAR 

PROC_SHUTDOWN:NEAR 

SYSINIT1 :NEAR 

PROT_PRT_HEX:NEAR 

DISK_IO:NEAR 

HD_INT:NEAR 

C8042:NEAR 

0BF_42:NEAR 

STGTST_CNT:NEAR 

B00T_STRAP_1 : NEAR 

XMIT_8042:NEAR 

ROM_ERR:NEAR 

DOS: NEAR 

DISK_SETUP:NEAR 

DSKETTE_SETUP:NEAR 



TEST.1? 

8259 INTERRUPT CONTROLLER TEST 

DESCRIPTION 

READ/WRITE THE INTERRUPT MASK REGISTER (IMR) 
WITH ALL ONES AND ZEROES. ENABLE SYSTEM 
INTERRUPTS. MASK DEVICE INTERRUPTS OFF. CHECK 
FOR HOT INTERRUPTS (UNEXPECTED). 



ASSUME 


CS:CODE 


ASSUME 


OS : DATA 


PROC 


NEAR 


MOV 


AL,10 


CALL 


PRT HEX 


CALL 


DDS 


TEST THE 


IMR REG 1 SI 


CLI 




MOV 


AL,0 


OUT 


INTA01,AL 


OUT 


INTB01,AL 


JMP 


SHORT $+2 


IN 


AL, INTA01 


MOV 


AH,AL 


IN 


AL, INTBOl 



LINE FEED ON CRT 
SET DATA SEGMENT 



SEND TO 2ND INT 

READ IMR 
SAVE RESULTS 
READ 2ND IMR 



Test 2 5-51 



0023 


F6 


Al 


0025 


FB 


00 


0027 


FU 


21 


0029 


fiA 


EO 


002B 


EH 


AT 


002D 


05 


0001 


0030 


fb 


15 



0032 


A2 


006B R 


0035 


BO 


26 


0037 


E6 


80 


0039 


FB 




003A 


2B 


C9 


003C 


E2 


FE 


003E 


E2 


FE 


0040 


80 


3E 006B R 00 


00U5 


74 


OD 


00U7 


C6 


06 0015 R 05 


OOUC 


BE 


0000 E 


OOUF 


E8 


0000 E 


0052 


FA 




0053 


F4 




0054 


BO 


27 


0055 


E6 


80 


0058 


B8 


AA55 


005B 


E7 


82 


005D 


E4 


82 


005F 


86 


C4 


0061 


EB 


00 


0063 


E4 


83 


0065 


3D 


55AA 


0068 


74 


05 


006A 


BE 


OOOO E 


006D 


EB 


EO 


006 F 






006F 


2A 


CO 


0071 


E6 


80 


0073 


BO 


OF 


0075 


E6 


70 


0077 


B9 


OOFF 


007A 


E2 


FE 


007C 


BO 


8F 


007E 


E6 


70 


0080 


E4 


80 


0082 


OA 


CO 


008U 


74 


09 


0086 


BO 


28 


0088 


E6 


80 


008A 


BE 


OOOO E 


008D 


EB 


CO 


008F 


BO 


29 


0091 


E6 


80 


0093 


E4 


61 


0095 


8A 


EO 


0097 


EB 


00 


0099 


24 


FC 


009B 


E6 


61 


0090 


BO 


BO 


009F 


E6 


43 


00A1 


EB 


OO 


00A3 


B8 


AA55 


00A6 


E6 


42 


00A8 


EB 


00 


OOAA 


8A 


CU 


OOAC 


E6 


42 


OOAE 


EB 


00 


OOBO 


E4 


42 


00B2 


86 


EO 


OOB'l 


EB 


00 


00B6 


E4 


42 


00B8 


3D 


55AA 


OOBB 


74 


05 


OOBD 


BE 


OOOO E 


OOCO 


EB 


8D 



INTB01,AL 
SHORT $+2 
AL, INTA01 
AH, AL 
AL, 1NTB01 

AX, 1 



CHECK FOR HOT INTERRUPTS 
INTERRUPTS ARE MASKED OFF. 
MOV INTR_FLAG.AL 



SUB 
LOOP 
LOOP 
CMP 



CX,CX 

D4 

D5 

INTR_FLAG,O0H 

D7 

MFG_ERR_FLAG,05H 



HLT 
-CHECK THE CONVERTING LOGIC 



AX,0AA55H 
MFG_P0RT+2, AX 
AL,MFG_P0RT+2 
AL,AH 
SHORT $+2 
AL,MFG_P0RT+3 
AX, 55AAH 
D7_A 



WRITE TO 2ND 
10 DELAY 
READ I MR 
SAVE RESULTS 
READ 2ND I MR 



K THAT NO INTERRUPTS OCCUR. 
; CLEAR INTERRUPT FLAG 

; <><><><><><><><><><><><><><> 

;<><><>CHECKPOINT 26 <><><><> 

; ENABLE EXTERNAL INTERRUPTS 

; WAIT 1 SEC FOR ANY I NTRS THAT 

; MIGHT OCCUR 



<><><><><><><><><> 

ooCHECKPOINT 5<> 
DISPLAY 101 ERROR 



HALT THE SYSTEM 



><><>CHECKPOINT 27 <><><: 



; WRITE A WORD 

; GET THE FIRST BYTE 

; SAVE IT 

; 10 DELAY 

; GET THE SECOND BYTE 

; IS IT OK? 

; GO I F YES 

; DISPLAY 106 ERROR 



CHECK FOR HOT NM I INTERRUPTS WITHOUT lO/RAM PARITY ENABLED 



MOV AL,OFH 

OUT CMOS_PORT,AL 

MOV CX,OOFFH 

LOOP D7_B 

MOV AL,8FH 

OUT CMOS_PORT,AL 

IN AL,MFG_PORT 

OR AL,AL 

JZ D7_C 



TEST THE DATA BUS TO TIMER 2 



AL,29H 

MFG_PORT,AL 

AL, PORT_B 

AH,AL 

SHORT $+2 

AL.OFCH 

PORT_B,AL 



MOV 
JMP 
AND 
OUT 



MOV 
OUT 
JMP 
MOV 
OUT 
JMP 
MOV 
OUT 

JMP 

XCHG 

JMP 
IN 
CMP 
JZ 



AL, 10110000B 
TIMFR+3, Al 
SHORT $+2 
AX,0AA55H 
T IMER+2,AL 
SHORT $+2 
AL,AH 
TIMER+2,AL 

SHORT $+2 

AL,TIMER+2 

AH,AL 

SHORT $+2 
AL,TIMER+2 
AX,055AAH 
D7_D 

SI, OFFSET CM4_C 



TURN ON NMI 

DELAY 

TURN OFF NMI 

ANY NMI? 

CONTINUE I F NOT 

oooCHECKPOINT 28 <><: 

DISPLAY 107 ERROR 



; OOOCHECKPOINT 29 <><><><> 

; GET CURRENT SETTING OF PORT 

; SAVE THAT SETTING 

; 10 DELAY 

; INSURE SPEAKER OFF 



SEL TIM 2, LSB, MSB, BINARY, MODE 
WRITE THE TIMER MODE RFC 

10 DELAY 
WRITE AN AA55 
WRITE TIMER 2 CNT - LSB 

10 DELAY 



WKI 



IMLR 2 CNr - MSB 



10 DELAY 
GET THE LSB 
SAVE IT 

10 DELAY 
GET THE MSB 
BUS OK? 
GO IF OK 

DISPLAY 108 ERROR 



00C2 


RO 


2A 


00C4 


F6 


80 


O0C6 


FA 




00C7 


BO 


FE 


00C9 


F6 


21 


OOCB 


BO 


10 


OOCD 


F6 


43 


OOCF 


B9 


002C 


00D2 


FB 


00 


O0D4 


«A 


CI 


00D6 


E6 


40 


00D8 


KB 




00D9 


F6 


06 



TEST. 18 

8253 TIMER CHECKOUT 
DESCRI PTION 

VERIFY THAT THE SYSTEM TIMER (0) DOESN'T COUNT 

TOO FAST OR TOO SLOW. 



D7 D: 


MOV 


AL,2AH 




OUT 
CLI 


MFG_PORT,AL 




MOV 


AL.OFEH 




OUT 


INTA01,AL 




MOV 


AL, 00010000 




OUT 


TIM CTL,AL 




MOV 


CX, 16H*2 




JMP 


SHORT $+2 




MOV 


AL,CL 




OUT 


TIMER0,AL 



OOOCHECKPOINT 2A oooo 

MASK ALL I NTRS EXCEPT LVL 
WRITE THE 3259 I MR 
SEL TIM 0, LSB. MODE 0, BINARY 
WRITE TIMER CONTROL MODE REG 
SET PGM LOOP CNT 

10 DELAY 

SET TIMER CNT REG 

WRITE TIMER CNT REG 



INTR_FLAG,01H 



5-52 Test 2 



00E2 C6 06 001!> H Oi? 



MFG_ERR_FLAG,02H 



DID TIMER INTERRUPT OCCUR? 

YES - CHECK TIMER OP FOR SLOW TIME 

WAIT FOR INTR FOR SPECIFIED TIME 



;><>TmER CHECKPOINT (2)< 



00E7 


BE 


0000 


E 




OOEA 


E9 


0014 F 


K 




OOED 


BO 


2B 






ODEF 


E6 


80 






00F1 


FA 








0GF2 


B1 


OC 






00Fi4 


BO 


FF 






00F6 


F6 


^0 






OOFS 


06 


06 006B 


R 00 


OOFD 


BO 


FE 






OOFF 


E6 


21 






0101 


FB 








0102 


F6 


06 006B 


R 01 


0107 


/5 


DE 






0109 


E2 


F7 






010B 


28 


09 






OlOD 


BO 


2C 






010F 


E6 


80 






0111 


F6 


06 006B 


R 01 


0116 


75 


08 






0118 


E2 


F7 






OIIA 


BE 


0000 


E 




OIID 


L9 


004F 


K 




0120 


FA 








0121 


BO 


FF 






0123 


F6 


21 






0125 


BO 


36 






0127 


F6 


43 






0129 


FB 


00 






012B 


BO 


00 






012D 


F6 


40 






012F 


FB 


00 






0131 


E6 


40 






0133 


2B 


C9 






0135 


BO 


2D 






0137 


L6 


80 






0139 


m 


64 






013B 


AS 


02 






013D 


/n 


08 






013F 


E2 


F8 






01U1 


BF 


0000 


F 




0144 


t9 


004F 


R 





MOV 


SI .OFFSET EO A 


JMP 


D6A 


MOV 


AL,2BH 


OUT 


MFG_PORT,AL 


CLI 




MOV 


CL, 12 


MOV 


AL.OFFH 


OUT 


TIMERO.AL 


MOV 


INTR FLAG,0 


MOV 


AL,OFEH 


OUT 


INTA01,AL 


STI 




TEST 


INTR FLAG,01H 


JNZ 


D8 A 


LOOP 


D10 



■WAIT FOR INTERRUPT 



TEST INTR_FLAG,01H 
JNZ D12 
LOOP D11 



SETUP TIMER TO MODE 3 



MOV 
OUT 
MOV 
OUT 
JMP 
MOV 
OUT 
JMP 
OUT 



AL,OFFH 
INTA01,AL 
AL,36H 
TIMER+3,AL 
SHORT $+2 
AL,0 
TIMER, AL 
SHORT $+2 
TIMER, AL 



OOCHECKPOINT 2B <><><><: 



DID TIMER INTERRUPT OCCUR? 
YES - TIMER CNTING TOO FAST, ERR 
WAIT FOR INTR FOR SPECIFIED TIME 



oooCHECKPOINT 2C <><><><> 

DID TIMER INTERRUPT OCCUR? 
GO I F YES 
TRY AGA I N 



DISABLE ALL DEVICE INTERRUPTS 

SEL TIM 0, LSB, MSB, MODE 3 
WRITE TIMER MODE REG 
10 DELAY 

WRITE LSB TO TIMER REG 
10 DELAY 
WRITE MSB TO TIMER REG 



CHECK 8042 FOR LAST COMMAND ACCEPTED 

SET WAIT TIME 



SUB 
MOV 
OUT 



CX,CX 

AL,2DH 

MFG_PORT,AL 

AL,STATUS_PORT 

EST AL, INPT_BUF_FULL 

Z E19 

OOP D13 
ERROR EXIT ( MSG 105) 

OV SI , OFFSET CM4 



oooCHECKPOINT 2D <><><><> 
GET THE 8042 STATUS 

HAS THE LAST COMMAND BEEN ACCEPTED? 
GO I F YES 
TRY AGAIN 



TEST. 19 

ADDITIONAL READ/WRITE STORAGE TEST 
++++ MUST RUN IN PROTECTED MODE ++++ 

DESCRI PTION 

WRITE/READ DATA PATTERNS TO ANY READ/WRITE 
STORAGE AFTER THE FIRST 64K. STORAGE 
ADDRESSABILITY IS CHECKED. 



0147 
0147 
014A 
014C 


E8 
BO 
E6 


0000 E 

2F 

80 


014E 
0154 
0156 


81 
75 
E9 


3E 0072 R 1234 

03 

0558 R 


0159 
015B 


BO 
E6 


30 
80 


015D 
015F 
0161 
0163 
0165 


BO 
E6 
BO 
EB 
E6 


8F 
70 
02 
00 

71 


0167 
016A 
016C 


BC 
8E 
BC 


0000 

D4 

8000 


016F 


E8 


0000 E 


0172 
0174 


BO 
E6 


31 
80 


0176 
0179 
017B 
0182 
0188 
018B 
018D 


B8 
8E 
26 
26 
BE 
8E 
BC 


0008 

CO 
C7 06 005A 0000 
C6 06 005C 00 

0058 

06 

FFFD 


0190 
0193 


B8 
8E 


0018 
D8 



ASSUME DS:DATA 

CALL DDS 

MOV AL,2FH 

OUT MFG_PORT,AL 

CMP RESET_FLAG, 1234H 

JNE E19A 

JMP SHUT2 

- SET SHUTDOWN RETURN 2 



MOV 
OUT 
MOV 
JMP 
OUT 



AL, SHUT-DOWN 

CMOS__PORT,AL 

AL,2 

SHORT $+2 

CM0S_P0RT+1,AL 



ENABLE PROTECTED MODE 



MOV 
MOV 
MOV 



SP, POST_SS 

SS,SP 

SP, POST_SP 



SET DATA SEGMENT 

OOOCHECKPOINT 2F <><: 

WARM START? 

GO I F NOT 

GO TO NEXT TEST 



F WARM START 



;<><><>CHFCKPOI NT 30 <><><><> 



ADDR FOR SHUTDOWN BYTE 



SET STACK FOR SYSINIT1 



GO ENABLE PROTECTED MODE 



- SET TEMPORY STACK 

MOV AX,GDT_PTR 

MOV ES,AX 

MOV ES:SS_TEMP.BASE_LO_WORO,0 

MOV BYTE PTR ES: ( SS_TEMP. BASE_I 

MOV SI,SS_TEMP 

MOV SS,SI 

MOV SP,MAX_SEG_LEN-2 

- DATA SEGMENT TO SYSTEM DATA AREA 



AL, PRTY_CHK 



; POINT TO DATA AREA 
; SET CHECK PARITY 



Test 2 5-53 



0197 E6 87 



0199 


B8 


0040 


019C 


50 




019D 


E9 


0347 R 


OlAG 


BO 


8E 


01A2 


E6 


70 


01AU 


EB 


00 


01A6 


E4 


71 


01A8 


50 




01A9 


BO 


Bl 


OlAB 


E6 


70 


01AD 


EB 


00 


01AF 


E4 


71 


01B1 


86 


EO 


01B3 


BO 


BO 


01B5 


E6 


70 


01B7 


EB 


00 


01B9 


E4 


71 


OIBB 


8B 


IE 0013 R 


01BF 


03 


D8 


01C1 


89 


IE 0017 R 


01C5 


58 




01C6 


A8 


CO 


01C8 


74 


03 


01CA 


E9 


026E R 


01CD 






01CD 


BO 


96 


01CF 


E6 


70 


01D1 


E8 


00 


01D3 


E4 


71 


01D5 


86 


EO 


01D7 


BO 


95 


01D9 


E6 


70 


01DB 


EB 


00 


01DD 


E4 


71 


01DF 


39 


06 0013 R 


01E3 


74 


1C 


01E5 


50 




01 E6 


BO 


8E 


01E8 


E6 


70 


01 EA 


EB 


00 


01 EC 


E4 


71 


01EE 


OC 


10 


01 FO 


86 


C4 


01F2 


BO 


8E 


01FU 


E6 


70 


01F6 


86 


C4 


01 F6 


EB 


00 


01 FA 


E6 


71 


01 FC 


58 




01FD 


39 


06 0013 R 


0201 


77 


6B 


0203 


8B 


D8 


0205 


3D 


0201 


0208 


72 


16 


020A 


BO 


B3 


020C 


E6 


70 


020E 


EB 


00 


0210 


E4 


71 


0212 


OC 


80 


021U 


86 


C4 


0216 


BO 


B3 


0218 


E6 


70 


021A 


86 


C4 


021C 


EB 


00 


021 E 


E6 


71 


0220 






0220 


BO 


98 


0222 


E6 


70 


0224 


EB 


00 


0226 


E4 


71 


0228 


86 


EO 


022A 


BO 


97 


022C 


E6 


70 


022E 


EB 


00 


0230 


E4 


71 


0232 


8B 


C8 


023it 


BO 


Bl 


0236 


E6 


70 


0238 


EB 


00 


023A 


E4 


71 


023C 


86 


EO 


023E 


BO 


BO 


0240 


E6 


70 


0242 


EB 


00 


0244 


E4 


71 


0246 


3B 


08 


0248 


74 


18 


024A 


50 




024B 


BO 


8E 


024D 


E6 


70 


024F 


EB 


00 


0251 


E4 


71 


0253 


OC 


10 


0255 


86 


C4 


0257 


BO 


8E 


0259 


E6 


70 


025B 


86 


C4 


025D 


EB 


00 


025F 


E6 


71 


0261 


58 





OUT DMA_PAGE+6,AL 

- PRINT 64 K BYTES OK 

MOV AX, 16*4 

PUSH AX 

JMP PRT_SIZ 



i CMOS GOOD? 

AL,DIAG_STATUS 
CMOS_PORT.AL 
SHORT $+2 
AL,CM0S_P0RT+1 



MOV 
OUT 
JMP 



; SAVE WHICH CHECK TO USE 



STARTING AMT. OF MEMORY OK 
SAVE MEMORY OK SIZE 
POST MESSAGE 



DETERMINE THE CONDITION OF CMOS 



10 DELAY 

GET THE CMOS STATUS 

SAVE CMOS STATUS 



PUSH 
-- GET THE MEMORY SIZE DETERMINED (PREPARE BX FOR BAD CMOS) 



MOV 
OUT 
JMP 
IN 

XCHG 
MOV 
OUT 
JMP 
IN 
MOV 
ADD 
MOV 
POP 



AL,M_SIZE_HI 

CMOS_PORT,AL 

SHORT $+2 

AL,CM0S_P0RT+1 

AH,AL 

AL,M_SIZE_LO 

CMOS_PORT.AL 

SHORT $+2 

AL,CM0S_P0RT+1 

BX,MEMORY_SIZE 

BX,AX 

WORD PTR KB_FLAG,BX 

AX 



TEST AL,OCOH 
JZ E20B0 
JMP E20C 



GET THE HIGH BYTE 

10 DELAY 
HIGH BYTE 
SAVE HIGH BYTE 
GET LOW BYTE 

10 DELAY 

LOW BYTE 

PRE LOAD THE MEMORY SIZE 

SET TOTAL MEMORY SIZE 

SAVE THE TOTAL SIZE 

RESTORE CMOS STATUS 

CMOS OK? 
GO I F YES 
DEFAULT IF NOT 



GET THE BASE 0->640K MEMORY SIZE FROM CONFIG IN CMOS 



MOV 

OUT 

JMP 

IN 

XCHG 

MOV 

OUT 

JMP 



AL,M1_SIZE_HI 

CMOS_PORT,AL 

SHORT $+2 

AL,CM0S_P0RT+1 

AH,AL 

AL,M1_SIZE_L0 

CMOS_PORT,AL 

SHORT $+2 

AL,CM0S_P0RT+1 

MtMOKY_SIZE,AX 

E20B1 



GET THE HIGH BYTE 

10 DELAY 
HIGH BYTE 
SAVE HIGH BYTE 
GET LOW BYTE 

10 DELAY 

LOW BYTE 

IS MEMORY SIZE GREATER THAN CONFIG? 

GO I F EQUAL 



SET MEMERY SIZE DETERMINE NOT EQUAL TO CONFIG 



PUSH 
MOV 
OUT 
JMP 
IN 
OR 

XCHG 
MOV 
OUT 
XCHG 
JMP 
OUT 
POP 
CMP 
JA 



MOV 
OUT 
JMP 
IN 
OR 

XCHG 
MOV 
OUT 
XCHG 
JMP 
OUT 



AX 

AL,DIAG_STATUS 
CMOS_PORT,AL 
SHORT $+2 
AL,CM0S_P0RT+1 
AL.W_MEM_SIZE 
AH 

d:ag_status 
cmos_port,al 

AL.AH 
short $+2 

cmos_port+i,al 

AX 

MEM0RY_SIZE,AX 

E20C 

BX.AX 

AX, 51 3 

NO_640 

AL, INF0_STATUS 

CMOS_PORT,AL 

SHORT $+2 

AL,CM0S_P0RT+1 

AL,M640K 

AL,AH 

AL, INFO_STATUS 

CMOS_PORT,AL 

AL,AH 

SHORT $+2 

CM0S_P0RT+1,AL 



SAVE AX 

ADDRESS THE STATUS BYTE 
10 DELAY 
GET THE STATUS 
SET CMOS FLAG 
SAVE AL 



RESTORE AX 

IS MEMORY SIZE GREATER THAN CONFIG? 

DEFAULT TO MEM SIZE DET IF YES 

SET BASE MEMORY SIZE 

CHECK IF BASE RAM LESS 512K 

GO I F YES 

SET 640K BASE RAM BIT 

10 DELAY 

GET THE CURRENT STATUS 

TURN ON 640K BIT IF NOT ALREADY ON 

SAVE THE CURRENT DIAG STATUS 

ADDR THE STATUS BYTE 
RESTORE THE STATUS 
10 DELAY 



CHECK MEMORY SIZE ABOVE 640K FROM CONFIG 



MOV 

OUT 

JMP 

IN 

XCHG 

MOV 

OUT 

JMP 

IN 

MOV 



GET THE HIGH BYTE 



AL,M2_SIZE_HI 

CMOS_PORT,AL 

SHORT $+2 

AL,CM0S_P0RT+1 

AH.AL 

AL,M2_SIZE_L0 

CM0S_P0RT,AL 

SHORT $+2 

AL,CM0S_P0RT+1 

ex. AX 
ABOVE 640K SIZE FROM MEMORY SIZE DETERMINE 
CX=C0NF1G AX=MEMORY SIZE DETERMINE 



10 DELAY 
HIGH BYTE 
SAVE HIGH BYTE 
GET LOW BYTE 

10 DELAY 
LOW BYTE 
SAVE THE ABOVE 640K RAM SIZE 



GET THE HIGH BYTE 



MOV AL,M_SIZE_HI 

OUT CMOS_PORT,AL 

JMP SHORT $+2 

IN AL,CM0S_P0RT+1 

XCHG AH,AL 

MOV AL,M_SIZE_LO 

OUT CMOS_PORT,AL 

JMP SHORT $+2 

IN AL,CM0S_P0RT+1 

-WHICH IS GREATER 

AX=MEMORY SIZE DETERMINE CX=CONFIG (ABOVE 640) BX=S IZE( BELOW 640) 



10 DELAY 
HIGH BYTE 
SAVE HIGH BYTE 
GET LOW BYTE 



CMP 
JZ 
SET MEMERY SIZE DETERMINE NOT EQUAL TO CONFIG 



GO 



PUSH 
MOV 
OUT 
JMP 
IN 
OR 

XCHG 
MOV 
OUT 
XCHG 
JMP 
OUT 
POP 



AX 

AL,DIAG_STATUS 

CMOS_PORT,AL 

SHORT $+2 

AL,CM0S_P0RT+1 

AL,W_MEM_S1ZE 

AL,AH 

AL,DIAG_STATUS 

CM0S_P0RT,AL 

AL,AH 

SHORT $+2 

CM0S_P0RT+1,AL 

AX 



SAVE AX 

ADDRESS THE STATUS BYTE 
10 DELAY 
GET THE STATUS 
SET CMOS FLAG 
SAVE AL 



RESTORE AX 



5-54 Test 2 



0262 


3B C8 


0264 


77 02 


0266 


SB C8 


0268 




0268 


03 D9 


026A 


89 IE 0017 


026E 




026E 


83 EB HO 


0271 


B1 06 


0273 


D3 EB 


0275 


53 





CMP 




CX.AX 




JA 




SET MEM 




MOV 




CX,AX 


SET MEN 










ADD 




BX,CX 




MOV 




WORD PTR KB FLAG,BX 


E20C: 








E20D: 


SUB 




BX, 16*4 




MOV 




CL,06H 




SHR 




BX,CL 




PUSH 




BX 




-'mod 


FY 


DESCRIPTOR TABLES 





IS CONFIG GREATER THAN DETERMINED? 
GO I F YES 
USE MEMORY SIZE DETERMINE IF NOT 



1ST 6UK ALREADY DONE 



MODIFY THE DESCRIPTER TABLE 



SET TEMP ES DESCRIPTOR 6UK SEGMENT LIMIT 



027B 26: C7 06 0048 FFFF 



0282 26: C6 06 OOUD 93 



MOV ES : ES_TEMP . SEG_L I M I T, MAX_SEG_LEN 

- CPLO, DATA ACCESS RIGHTS 

MOV BYTE PTR ES: ( ES_TEMP. DATA_ACC_R I GHTS) , CPLO_DATA_ACCESS 

- START WITH SEGMENT 010000 (SECOND 6UK) 



SET TEMP DS DESCRIPTOR 6UK SEGMENT LIMIT 



0295 26: C7 06 0060 FFFF 



029C 26: 06 06 0065 93 



02A2 


26 


C6 06 0064 00 


02A8 


26 


07 06 0062 0000 


02AF 


?A 


CO 


02B1 


F6 


85 


02B3 


F6 


86 


02B5 


FF 


CO 


02B7 


E6 


84 


02B9 


B8 


0008 


02BC 


at 


D8 


02BE 


FI- 


06 0064 


02C2 


FE 


06 004C 


02C6 


80 


3E 0064 04 


02CB 


72 


12 


02CD 


U 




02CE 


BR 


0018 


02D1 


8F 


D8 


02D3 


An 


0012 R 


02D6 


IF 




02D7 


AS 


10 


02D9 


7"^ 


04 


02DB 


BO 


40 


02DD 


E6 


87 


02DF 


RO 


B3 


02E1 


Ffi 


70 


02E3 


FB 


00 


02E5 


EU 


71 



MOV ES: DS_TEMP . SEG_L I M I T, MAX_SEG_LEN 

- CPLO, DATA ACCESS RIGHTS 

MOV BYTE PTR ES: ( DS_TE.'-i '' . -\_ACC_R I GHTS ) , CPLO_DATA_ACCESS 

- START WITH SEGMENT 010000 
_BYTE),0 

TEMPORARY SEGMENT SAVE IN DMA PAGE REGISTER 



SUB 
OUT 
OUT 



AL,AL 

DMA__PAGE+4,AL 

DMA_PAGE+5,AL 



OUT DMA_PAGE+3,AL 

- POINT TO NEXT BLOCK OF 32K WORDS 

MOV AX,GDT_PTR 

MOV DS,AX ; 

INC BYTE PTR DS: ( DS_TEMP. BASE_ 

INC BYTE PTR DS: ( ES_TEMP. BASE_ 



HIGH BYTE OF LOW WORD OF SEGMENT 
LOW BYTE OF LOW WORD OF SEGMENT 
SET HIGH BYTE OF SEGMENT WORD 
HIGH BYTE OF SEGMENT 



POINT TO STAKT OF DESCR TABLE 



■ CHECK FOR END OF 256K PLANAR RAM 



PUSH 


DS 


MOV 


AX,RSDA PTR 


MOV 


DS,AX 


MOV 


AL.MFG TST 


POP 


DS 


TEST 


AL,BASE RAM 


JNZ 


E21 


MOV 


AL, 10 CHK 


OUT 


DMA_PAGE+6,AL 


CHECK 


END OF FIRST 51< 


MOV 


AL, INFO STATUS 


OUT 


CMOS PORT,AL 


JMP 


SHORT $+2 


IN 


AL,CMOS PORT+1 



INFO 



GET THE JUMPER 

RESTORE DS 

CHECK I F SECOND 256K ON BASE PLANAR 

GO IF YES 

SET 10 CHANNEL CHECK TEST 



SET 640K BASE RAM BIT 



CHECK FOR END OF 51 2K PLANAR RAM 



02EE 86 C4 

02 FO BO 40 

02F2 E6 87 

D2F4 86 C4 



SET USE TEST 10 CHECK 



XCHG 
MOV 
OUT 
XCHG 



AL,AH 

AL, IO_CHK 

DMA_PAGE+6,AL 

AL,AH 



RESTORE AL 
CHECK FOR 640K BASE RAM (128K 10 CARD) 



02 FA 
02FF 
0301 



80 3E 0064 OA 
75 14 
EB 08 90 



CMP 
JNZ 
JMP 



BYTE PTR DS:(DS_TEMP.BASE_HI_BYTE),OAH 

NEXT1 

E12_C ; CONTINUE 



DO ADDITIONAL STORAGE ABOVE 



031A 80 3E 004C FE 
031F 75 03 
0321 EB 66 90 



SAVE BASE_HI_BYTE IN DMA PAGE REGISTERS 3 

MOV AL.BYTE PTR DS: ( DS_TEMP. BASE__H 1_BYTE ) 

OUT DMA__PAGE+3,AL ; SAVE THE HIGH BYTE OF SEGMENT 

; FOR POSIBLE ERROR 

CHECK FOR TOP OF RAM (FEOOOO) 16MEG 



CMP 
JNZ 
JMP 



BYTE PTR DS:(ES_TEMP.8ASE_HI_BYTE),0FEI 
NEXT ; GO I F NOT 

KB_L00P3 ; GO NEXT TEST 



SET ES AND DS REGISTERS 



TOP OF RAM? 



Test 2 5-55 



032U 


B8 


0060 


0327 


8E 


D8 


0329 


B8 


0048 


032C 


8E 


CO 


032E 


BO 


31 


0330 


E6 


80 


0332 


89 


8000 


0335 


E8 


OOOO E 


0338 


74 


03 


033A 


E9 


047D R 


0330 


59 




033E 


58 




033F 


2B 


FF 


03U1 


AB 




03U2 


05 


0040 


03U5 


50 




03l»6 


51 




03U7 






03U7 


50 




0348 


BB 


OOOA 


0346 


B9 


0005 


03UE 


28 


FF 


0350 






0350 


33 


02 


0352 


F7 


F3 


0354 


80 


CA 30 


0357 


52 




0358 


E2 


F6 


035A 


B9 


0005 


035D 






035D 


58 




035E 


E8 


0000 E 


0361 


47 




0362 


E2 


F9 


036*4 


B9 


0006 


0367 


BE 


0000 E 


036A 






036A 


2E 


8A 04 


036D 


46 




036E 


E8 


0000 E 


0371 


47 




0372 


E2 


F6 


037U 


58 




0375 


3D 


0040 


0378 


75 


03 


037A 


E9 


01 AO R 


037D 






0370 


59 




037E 


58 




037F 


E2 


03 


0381 


EB 


06 90 


0384 






0384 


50 




0385 


51 




0386 


E9 


02B9 R 



NEXT: MOV 


AX,DS TEMP 


MOV 


DS,AX 


MOV 


AX, ES TEMP 


MOV 


ES,AX 


MOV 


AL,31H 


OUT 


MFG_PORT,AL 


MOV 


CX,2000H*4 


CALL 


STGTST CNT 


JZ 


N1 


JMP 


E21A 


N1: POP 


CX 


POP 


AX 


. WRITE 


THE CURRENT Sl^ 


SUB 


DI.DI 


STOSW 




ADD 


AX, 16*4 


PUSH 


AX 


PUSH 


CX 


PRT SIZ: 




PUSH 




MOV 


BX.10 


. CONVERT AND SAVE 


MOV 


CX,5 


SUB 


01, Dl 


DECIMAL LOOP: 




XOR 


DX,DX 


DIV 


BX 


OR 


DL,30H 


PUSH 


DX 


LOOP 


DECIMAL LOOP 


. DISPLAY LAST OK MEMO 


MOV 


CX,5 


PRT DEC LOOP: 




POP 


AX 


CALL 


PROT PRT HEX 


INC 


Dl 


LOOP 


PRT DEC LOOP 


MOV 


CX,6 


MOV 


SI, OFFSET F3B 


KB LOOP: 




MOV 


AL,CS:[SI ] 


INC 


SI 


CALL 


PROT PRT HEX 


INC 


Dl 


LOOP 


KB LOOP 


POP 


AX 


CMP 


AX, 16*4 


JNZ 


KB LOO PI 


JMP 


E20B 


KB L00P1: 




POP 


CX 


POP 


AX 


LOOP 


KB L00P2 


JMP 


KB_L00P3 


KB L00P2: 




PUSH 


AX 


PUSH 


CX 


JMP 


E21 


KB_LO0P3: 





; SET COUNT FOR 32K WORDS 

; CONTINUE I F OK 

; GO PRINT ERROR 

; POP CX TO GET AX 

; RECOVER TESTED MEMORY 

FOR (ADDRESS LINE 23-17 TEST) USED LATER 

; POINT TO BEGIN I NG OR A BLOCK 
; WRITE THE CURRENT SIZE 
; AT THE STARTING ADDRESS 



SET DECIMAL CONVERT 



DIVIDE BY 10 
MAKE INTO ASCI I 
SAVE 



RECOVER A NUMBER 
POINT TO CRT BUFF 

PRINT ' KB OK' 



INCREMENT BUFF PTR 

RECOVER WORK REGS 
FIKST PASS? 
GO I F NOT 



RECOVER 64K BLOCK COUNT 



ADDRESS LINE 16-23 TEST 



0389 
038C 


B8 
50 


0040 


038D 
0390 


B8 
8E 


0018 
08 


0392 


8B 


IE 0017 R 


0396 
0399 
039B 
0390 


83 
B1 
D3 
53 


EB 40 

06 

EB 


039E 
03A1 
03A3 
03A9 


B8 
8E 
26 
26 


0008 
CO 

06 06 0064 00 

07 06 0062 0000 


03B0 
03B2 
03B4 
03B6 
03B8 


2A 
E6 
E6 
BO 
E6 


CO 
85 
86 
01 
84 



■ CALCULATE NUMBER OF 
MOV AX, 64 



64K BLOCKS 



SUB 
MOV 
SHR 
PUSH 



BX.WORD PTR KB_FLAG 

BX,64 
CL,06H 
BX,CL 



INITIALIZE DS DESCRIPTOR 



GET THE MEMORY SIZE 



GET THE TOTAL MEMORY SIZE 
KB_FLAG USED AS TEMP STORAGE 
START AT SECOND 64K BOUNDRY 
DIVIDE BY 64K 



SAVE LOOP COUNT 



MOV AX,GDT_PTR 

MOV ES.AX 

MOV BYTE PTR ES: ( DS_TEMP. BASE_H l_BYTE ) , 

MOV ES:DS_TEMP.BASE_LO_WORD,0 

- TEMPORARY SEGMENT SAVE IN DMA PAGE REGISTER 



SUB 
OUT 
OUT 
MOV 
OUT 



AL,AL 

DMA_PAGE+4,AL 

DMA_PAGE+5,AL 

AL.OIH 

DMA_PAGE+3,AL 



HIGH BYTE OF LOW WORD OF SEGMENT 
LOW BYTE OF LOW WORD OF SEGMENT 
SET HIGH BYTE OF SEGMENT WORD 
HIGH BYTE OF SEGMENT 



POINT TO NEXT BLOCK OF 64K 



03BA 


BO 


3 3 








03BC 


F6 


80 








03BE 


26 


80 


06 


0064 


01 


03C4 


BO 


B3 








03C6 


FA 


70 








03C8 


FB 


on 








03CA 


F4 


71 








03CC 


A8 


80 








03CE 


74 


08 








03D0 


26 


ao 


3E 


0064 


OA 


03D6 


/5 


15 








03D8 


in 


09 90 






03DB 


26 


80 


3E 


0064 


08 


03E1 


/5 


OA 









MOV 
OUT 
ADD 



><><>CHECKPOINT 33 <><><><> 



BYTE PTR ES:(DS_TEMP.BASE_HI_BYTE),01 
CHECK END OF FIRST 516K OR 640K (END OF BASE RAM) 

SET 640K BASE RAM BIT 



MOV AL, INF0_STATUS 

OUT CM0S_P0RT,AL 

JMP SHORT $+2 

IN AL,CM0S_P0RT+1 

TEST AL,M640K 

JZ NEXT_A1 



10 DELAY 

GET THE CURRENT STATUS 
CHECK FOR 640K BASE RAM 
GO ir ONLY 51 2K 



CHECK FOR END OF 512K PLANAR RAM 



CMP BYTE PTR ES: ( DS_TEMP. BASE_H 

JNZ NEXT_A ; GO 

JMP NEXT_A2 ; 

NEXT_A1:CMP BYTE PTR ES: ( DS_TEMP. BASE_H l_l 

JNZ NEXT_A 



5-56 Test 2 



03E3 26: C6 06 006U 10 



. DO ADDITIONAL STORAGE ABOVE 1 MEG 

NEXT_A2:M0V BYTE PTR ES: ( DS_TEMP. BASE_H I. 
. SET USE TEST 10 CHECK 



03ED 26: AG 006U 



03F1 E6 8U 



NEXT_A: MOV AL, BYTE PTR ES: ( DS_TEMP. BASEJ 

. DMA PAGE REGISTERS 3 

OUT DMA_PAGE+3,AL 



CHECK FOR TOP OF RAM (FEOOOO) 16MEG 



03F3 


26: 80 3E 0064 


FE 


03F9 


75 03 




03FB 


EB 79 90 




03FE 


B8 0060 




0^0^ 


8E 08 




01403 


2B FF 




0U05 


8B 05 




0407 


8B DO 




0409 


8B F7 




OUOB 


2B CO 




OUOD 


89 05 




OUOF 


28 C9 




0411 


E2 FE 




0413 


59 




0414 


58 




0415 


50 




0416 


51 




0417 


3B C2 




0419 


8B C2 




041 B 


75 60 




0410 


59 




041E 


58 




04 IF 


05 0040 




0422 


50 




0423 


51 




0424 


50 




0425 


BB OOOA 




0428 


B9 0005 




042B 


2B FF 




042D 






042D 


33 D2 




042F 


F7 F3 




0431 


80 CA 30 




0434 


52 




0435 


E2 F6 




0437 


B9 0005 




043A 






043A 


58 




0438 


E8 0000 E 




04 3 E 


47 




043F 


E2 F9 




0441 


B9 0006 




0444 


BE 0000 E 




0447 






0447 


2E: 8A 04 




044A 


46 




044B 


E8 0000 E 




044 E 


47 




044F 


E2 F6 




0451 


58 




0452 


59 




0453 


58 




0454 


E2 IB 




0456 


E6 89 




0458 


86 C4 




045A 


E6 8A 




045C 


E4 61 




045F 


24 CO 




0460 


86 C4 




0462 


E4 87 




0464 


22 EO 




0466 


E4 8A 




0468 


86 C4 




046A 


E4 89 




046C 


75 OF 




046E 


EB 06 90 




0471 






0471 


50 




0472 


51 




0473 


E9 03BA R 





CMP 
JNZ 
JMP 



BYTE PTR ES: (DS_TEMP.BASE_H 

NEXT_B 

KB_L00P_3 



SET DS REGISTER 



MOV 
MOV 
SUB 
MOV 
MOV 
MOV 
SUB 
MOV 



DI.DI 

AX,DS:[DI 1 
DX,AX 
SI,DI 
AX. AX 
OS:[DI ],AX 



ALLOW CRT TIME TO DISPLAY MSG 



SUB 
LOOP 
POP 
POP 
PUSH 
PUSH 
CMP 
MOV 
JNZ 
POP 
POP 
ADD 
PUSH 
PUSH 



CX,CX 



AX.DX 
AX,DX 
E21A 



CX 



AX 



MOV 
SUB 
DEC_L0OP: 

XOR 
DIV 
OR 



BX,10 
CONVERT AND SAVE 
CX, 5 



DX.DX 

BX 

DL,30H 



DISPLAY LAST OK MEMORY 



LOOP 

MOV 

MOV 



KB_L00P_1 : 



MOV 

INC 

CALL 

INC 

LOOP 

POP 

POP 

POP 

LOOP 



PROT_PRT_HEX 

Dl 

PRT_DEC 

CX,6 

SI, OFFSET F3B 

AL,CS:[SI ] 

SI 

PROT_PRT_HEX 

Dl 

KB_L00P_1 

AX 

CX 

AX 



KB_L00P_2 
CHECK PARITY 



OUT 

XCHG 

OUT 



IN 
AND 
IN 

XCHG 
IN 
JNZ 



JMP 
KB_L00P_2: 

PUSH 
PUSH 



DMA_PAGE+8,AL 

AL,AH 

DMA_PAGE+9,AL 

AL, PORT_B 

AL, PARITY_ERR 

AL, AH 

AL, DMA_PAGE+6 

AH,AL 

AL, DMA_PAGE+9 

AL,AH 

AL, DMA_PAGE+8 

E21A 

KB_L00P_3 



BYTE).0FEH 
IF NOT 
GO NEXT TEST 



TOP OF RAM? 



POINT TO START OF BLOCK 

GET THE VALUE OF THIS BLOCK 

SAVE 

SET SI FOR POSSIBLE ERROR 

CLEAR RAM LOCATION 



GET THE LOOP COUNT 

RECOVER TESTED MEMORY 

SAVE TESTED MEMORY 

SAVE LOOP COUNT 

DOES THE BLOCK ID MATCH 

GET THE BLOCK ID FOR POSSIBLE ERROR 

GO PRINT ERROR 

POP CX TO GET AX 

RECOVER TESTED MEMORY 

64K INCREMENTS 

SAVE TESTED MFMORY 

SAVE LOOP COUNT 



SET DECIMAL CONVERT 



DIVIDE BY 10 
MAKE INTO ASCI I 
SAVE 



RECOVER A NUMBER 
POINT TO CRT BUFF 



INCREMENT BUFF PTR 



LOOP TILL ALL MEM. CHECKED 



CHECK FOR 10 OR PAR CHECK 
STRIP UNWANTED BITS 
SAVE ERROR 
CHECK FOR R/W OR 10 ERR 

RESTORE AX 



GO I F PARITY ERROR 
CONTINUE 

SAVE LOOP COUNT 
CONTINUE TILL DONE 



BACK TO REAL MODE 



04 /A E9 0000 E 



PR0C_SHUTD0WN 



PRINT FAILING ADDRESS AND XOR'ED PATTERN IF DATA COMPARE ERROR 



047F 


BA 


C4 


0481 


FB 


00 


0483 


t6 


83 


0485 


8B 


C6 


0487 


t.6 


86 


0489 


86 


LO 


0488 


KB 


00 


048D 


E6 


85 



OUT 


DMA PAGE+1 


AL 


MOV 


AL.AH 




JMP 


SHORT $+2 




OUT 


DMA PAGE+2 


AL 


MOV 


AX, SI 




OUT 


DMA PAGE+5 


AL 


XCHG 


AH,AL 




JMP 


SHORT $+2 




OUT 


DMA PAGE+4 


AL 



SAVE FAILING BIT PATTERN (LOW BYTE) 
SAVE HIGH BYTE 
10 DELAY 



GET THE FAI 
10 DELAY 



ING OFFSET 



Test! 5-57 



CLEAR 10 CH CHK OR R/W PAR CHK 



0U8F 


?B 


F6 


0491 


AB 




0492 


F4 


61 


0494 


OC 


OC 


0496 


FB 


00 


0498 


f-6 


61 


049A 


?^ 


F3 


049C 


Hi 


00 


049 E 


L6 


61 


04A0 


BR 


0018 


04A3 


BE 


D8 


04A5 


BO 


8E 


04A7 


F6 


70 


04A9 


^B 


00 


04AB 


F4 


71 


04AD 


8A 


D8 


04AF 


BO 


B3 


04B1 


F6 


70 


04B3 


FB 


00 


04B5 


F4 


71 


04B7 


8A 


F8 


04B9 


59 




04BA 


58 




04BB 


8B 


C8 


04BD 


30 


02O0 


04C0 


72 


39 


04C2 


3 


0280 


04C5 


72 


1 1 


04C7 


Ffi 


C7 80 


04CA 


75 


06 


04CC 


?D 


02O0 


04CF 


EB 


OF 90 


04D2 


?n 


0280 


04D5 


LB 


09 90 


04D8 


F6 


C7 80 


04DB 


75 


IE 


04DD 


2D 


O2O0 


04 EG 


SB 


C8 


04E2 


BO 


B1 


04 E4 


K, 


70 


04E6 


«A 


C5 


04E8 


1 B 


00 


04 EA 


r6 


71 


04 EC 


BO 


BO 


04EE 


FB 


00 


04 FO 


F6 


70 


04F2 


RA 


01 


04F4 


hB 


00 


04F6 


F6 


71 


04F8 


EB 


04 90 


04FB 


A3 


0013 R 


04FE 


BO 


8F 


0500 


L6 


70 


0502 


HO 


03 


0504 


FB 


00 


0506 


E6 


71 


0508 


E9 


OOOO E 



SUB 


SI ,SI 


S10SW 




IN 


al.port B 


OR 


AL.RAM PAR OFF 


JMP 


SHORT §+2 


OUT 


PORT B,AL 


AND 


AL,RAM PAR ON 


JMP 


SHORT 5+2 


OUT 


PORT B,AL 


-'set memory size 


MOV 


AX.RSDA PTR ; 


MOV 


OS, AX 


- GET THE D1AG„STATUS FROM CMOS 


MOV 


AL.DIAG STATUS ; 


OUT 


CMOS PORT,AL ; 


JMP 


SHORT $+2 ; 


IN 


AL,CMOS PORT+1 ; 


MOV 


BL,AL ; 


MOV 


AL, INFO STATUS ; 


OUT 


CMOS PORT,AL ; 


JMP 


SHORT $+2 ; 


IN 


AL,CMOS PORT+1 ; 


MOV 


BH,AL ; 


- GET T 


HE LAST OF GOOD MEMORY 


POP 


CX ; 


POP 


AX ; 


MOV 


CX.AX ; 


- BELOW 


512K? 


CMP 


AX, 51 2 ; 


JB 


M3 ; 


BELOW 


640K? 


CMP 


AX, 640 ; 



WRITE TO FAILING BLOCK 



640K UP ERROR 



TEST 


BH,M640K 


JNZ 


MO 


SUB 


AX, 51 2 


JMP 


M2 


SUB 


AX, 640 


JMP 


M2 


512K 


TO 640K ERROR 


TEST 


BH,M640K 


JNZ 


M3 


SUB 


AX,512 


WRITE 


SIZE TO CMOS 


MOV 


CX,AX 


MOV 


AL,M SIZE HI 


OUT 


CMOS PORT,AL 


MOV 


AL,CH 


JMP 


SHORT $+2 


OUT 


CMOS PORT+1,/ 


MOV 


AL,M SIZE LO 


JMP 


SHORT $+2 


OUT 


CMOS PORT,AL 


MOV 


AL.CL 


JMP 


SHORT $+2 


OUT 


CMOS PORT+1,/ 



JMP 



M4 



- SET BASE MEMORY SIZE 

MOV MEMORY_SIZE,AX 
- SET SHUTDOWN 3 



MOV 
OUT 
MOV 
JMP 
OUT 



AL,SHUT_DOWN 

CMOS_PORT,AL 

AL,3 

SHORT $+2 

CM0S_P0RT+1,AL 

SHUTDOWN 

JMP PROC_SHUTDOWN 

ENTRY 3 FROM PROCESSOR SHUTDOWN 



10 DELAY 

SAVE THE STATUS BYTE 



10 DELAY 

SAVE THE STATUS BYTE 



IS BASE RAM 640K 
51 2K BASE RAM 
640 K BASE RAM 



IS BASE RAM 640K? 

GO 1 F YES 

STRIP BASE RAM FROM 10 RAM 



SAVE ADJUSTED MEMORY SIZE 



GET THE HIGH BYTE MEMORY SIZE 
10 DELAY 
WRITE IT 
DO THE LOW BYTE 



GET THE LOW BYTE 
10 DELAY 
WR I 1 E IT 
CONTINUE 



TO INDICATE HOW MUCH MEM WORKING 



ADDR FOR SHUTDOWN RETURN 



MEMORY ERROR REPORTING 

DESCRIPTION FOR ERRORS 201 (CMP ERROR or PARITY) 

or 202(ADDRESS LINE 0-15 ERROR) 
R/W MEMORY ERRORS WILL BE REPORTED AS FOLLOWS 

AABBCC DDEE 201 (or 202) 

AA=HIGH BYTE OF 24 BIT ADDRESS 

BB=MIDDLE BYTE OF 24 BIT ADDRESS 

CC=LOW BYTE OF 24 BIT ADDRESS 

DD=HIGH BYTE OF XOR FAILING BIT PATTERN 

EE=LOW BYTE OF XOR FAILING BIT PATTERN 

DESCRIPTION FOR ERROR 202 (ADDRESS LINE 00-15) 

A WORD OF FFFF IS WRITTEN AT THE FIRST WORD AND LAST WORD 
OF EACH 64K BLOCK WITH ZEROS AT ALL OTHER LOCATIONS OF THE 
BLOCK. A SCAN OF THE BLOCK IS MADE TO INSURE ADDRESS LINE 
0-15 ARE FUNCTIONING. 

DESCRIPTION FOR ERROR 203 (ADDRESS LINE 16-23) 

AT THE LAST PASS OF THE STORAGE TEST, FOR EACH BLOCK OF 
64K, THE CURRENT STORAGE SIZE (ID) IS WRITTEN AT THE FIRST 
WORD OF EACH BLOCK. IT IS USED TO DETERMINE ADDRESSING 
FAILURES. 



5-58 Test 2 



GENERAL DESCRIPTION FOR BLOCK 
DD=HIGH BYTE OF BLOCK IC 
EE-LOW BYTE OF BLOCK ID 



ID (DDEE WILL NOW CONTAINT THE ID) 



BLOCK ID 

0000 

0040 



ADDRESS RANGE 
000000 --> OOFFFF 
010000 --> 01FFFF 



EXAMPLE (e^OK BASE RAM + 512K 10 RAM = n52K TOTAL) 

NOTE: THE CORRECT BLOCK ID FOR THIS FAILURE IS 0280 HEX. 

DUE TO AN ADDRESS FAILUE THE BLOCK ID+128K OVER- 

LAYED THE CORRECT BLOCK ID. 
006U0K OK <-- LAST OK MEMORY 
10000 0300 202 <-- ERROR DUE TO ADDRESS FAILURE 



050B 


B8 





R 


050E 


8E 


D8 




0510 


C6 


06 0016 R 00 


0515 


80 


OE 0016 R 01 


051A 


BO 


OD 




051C 


F8 


0000 


E 


051 F 


BO 


OA 




0521 


t« 


OOOO 


E 


052U 


E4 


84 




0526 


t8 


OOOO 


E 


0529 


EU 


85 




052B 


F8 


OOOO 


E 


052E 


E4 


86 




0530 


FR 


OOOO 


E 


0533 


BO 


20 




0535 


e« 


OOOO 


E 


0538 


FU 


83 




053A 


Eft 


OOOO 


E 


053D 


EU 


82 




053F 


L8 


OOOO 


E 


0542 


FU 


80 




05U4 


3C 


33 




05U6 


BF 


OOOO 


E 


0549 


74 


OA 




054B 


BE 


OOOO 


E 


054E 


3C 


32 




0550 


/4 


03 




0552 


BE 


OOOO 


E 


0555 


E8 


OOOO 


E 



SET REAL MODE DATA SEGMENT 



- IN IT AND SET MFG ERROR 
MOV MFG_ERR_FLAG+1.0 
OR MFG_ERR_FLAG+1,MEM_FAIL 



MOV 


AL,13 


CALL 


PRT HEX 


MOV 


AL, 10 


CALL 


PRT HEX 


IN 


AL,DMA PAGE+3 


CALL 


XPC_BYTE 


IN 


AL,DMA PAGE+4 


CALL 


XPC BYTE 


IN 


AL,DMA PAGE+5 


CALL 


XPC BYTE 


MOV 


AL,"^ ' 


CALL 


PRT HEX 


IN 


AL.DMA PAGE+2 


CALL 


XPC BYTE 


IN 


AL,DMA PAGE+1 


CALL 


XPC_BYTE 


CHECK 


FOR ADDRESS ERRO 


IN 


AL,MFG PORT 


CMP 


AL, 33H 


MOV 


SI. OFFSET ADERR 


JZ 


ERR2 


MOV 


SI. OFFSET ADERR1 


CMP 


AL.32H 


JZ 


ERR2 


MOV 


SI, OFFSET El 


.RR2: CALL 


E_MSG 


ENTRY 


FROM SHUTDOWN 



CLEAR FLAG 

<><><><><><>■ 
';<><> MEMORY FAILED<><><><><><> 

; CARRAGE RETURN 



GET THE HIGH BYTE OF 24 BIT ADDRESS 

CONVERT AND PRINT CODE 

CHECKPOINT 00->FE 

GET THE MIDDLE BYTE OF 24 BIT ADDRESS 

GET THE LOW BYTE OF 24 BIT ADDRESS 

SPACE TO MESSAGE 

GET HIGH BYTE FAILING BIT PATTERN 
CONVERT AND PRINT CODE 
GET LOW BYTE FAILING BIT PATTERN 
CONVERT AND PRINT CODE 



GET THE CHECKPOINT 

IS IT AN ADDRESS FAILURE? 

PRELOAD ADDRESS ERROR 16->23 

GO I F YES 

PRELOAD ADDRESS ERROR 00->15 

GO I F YES 



0558 


E9 


OOOO 


055B 


E8 


OOOO 


055E 


E4 


80 


0560 


3C 


35 


0562 


BE 


OOOO 


0565 


74 


OE 


0567 


BE 


OOOO 



TEST. 20 

ADDITIONAL PROTECTED (VIRTUAL MODE) TEST 

DESCRI PTION 

THE PROCESSOR IS PUT IN PROTECTED MODE AND 
THE FOLLOWING FUNCTIONS ARE VERIFIED 

1. VERIFY PROTECTED MODE 

THE MACHINE STATUS IS CHECK FOR VIRTUAL MODE 

2. PROGRAMMED INTERRUPT TEST 

AN PROGRAMMED INTERRUPT 32 IS ISSUED AND 
AND VERIFIED 

3. EXCEPTION INT 13 TEST 

A DESCRIPTOR SEGMENT LIMIT IS SET TO ZERO 
AND A WRITE TO THAT SEGMENT IS ATTEMPTED 
AN EXCEPTION 13 IS EXPECTED AND VERIFIED 

4. LDT/SDT LTR/STR TEST 

LOAD LDT REGISTER AND VERIFY CORRECT 
LOAD TASK REGISTER AND VERIFY CORRECT 
THEY ARE VERIFIED VIA THE STORE INSTRUCTION 

5. THE CONTROL FLAGS OF THE 286 FOR DIRECTION 
ARE VERIFIED VIA THE STD AND CLD COMMANDS 

IN PROIECTED MODE 

6. BOUND INSTRUCTION TEST ( EXC I NT 5 ) 
CREATE A SIGNED ARRAY INDEX WITHIN AND 
OUTSIDE THE LIMITS. CHECK THAT NO EXC INT 
IF WITHIN LIMIT AND THAT AN EXC INT 5 
OCCURS IF OUTSIDE THE LIMITS. 

7. PUSH ALL POP ALL TEST 

SET ALL GENERAL PURPOSE REGS TO DIFFERENT 
VALUES ISSUE A PUSH ALL, CLEAR THE REGS 
ISSUE A POP ALL AND VERIFY CORRECT. 

8. CHECK THE VERR/VERW INSTRUCTIONS 

THE ACCESS BYTE IS SET TO READ ONLY THEN TO 
A WRITE ONLY AND THE VERR/VERW INST ARE 
VERIFIED. 

9. CAUSE AN INTERRUPT 13 VIA A WRITE TO A 
READ ONLY SEGMENT 

10. VERIFY THE ARPL INSTRUCTION FUNCTIONS 
SET THE RPL FIELD OF A SELECTOR AND 
VERIFY THAT CURRENT SELECTOR RPL IS SET 
CORRECTLY. 

11. VERIFY THE LAR INSTRUCTION FUNCTIONS 

12. VERIFY THE LSL INSTRUCTION FUNCTIONS 

13. LOW MEG CHIP SELECT TEST 



SHUT7: 


CALL 


DOS 




IN 


AL.MFG PORT 




CMP 


AL,35H 




MOV 


SI, OFFSET CMU D 




JZ 


SHUT7B 


SHUT7A 


: MOV 


SI, OFFSET VIR ERR 



GO TEST THE 286 PROTECTED MODE 



PRINT ERROR 109 

GO I F NOT 

PROTECTED MODE FAILED 



056A 80 OE 0016 R 02 



MFG_ERR_FLAG+1 , PRO_FA I L ; <><><><><><><><><><><><><><><> 



Test! 5-59 



056F 
0572 
0575 



E8 0000 E 
EB 09 90 
E8 0000 E 

80 OE 0016 R OH 



CALL E_MSG 

JMP SHUT6 

CALL E_MSG 

OR MFG_ERR_FLAG+1, LMCS_FAI L;- 



<><> VIRTUAL MODE FAILED<><><: 
PRINT MSG 
PRINT MSG 

)W MEG CHI P SELECT <><: 



057D 


E8 0000 


F 


0580 


2B CO 




0582 


A3 0017 


R 


0585 


89 000 E 




0588 


BA 0082 




058B 






058B 


2A CO 




058D 


EC 




058F 


U? 




058F 


E2 FA 





. pROT 

SHUT6: CALL 


ECTED MODE TEST PASSED ENTF 
DDS 


SUB 


AX, AX 


MOV 


WORD PTR KB FU\G,AX 


MOV 


CX.OEH 


MOV 


DX,DMA PAGE+1 


CLR LOOP: 




SUB 


AL.AL 


OUT 


DX,AL 


INC 


DX 


LOOP 


CLR LOOP 



CLEAR PAGE REGS 



TEST. 21 

KEYBOARD TEST 
DESCRI PTION 

RESET THE KEYBOARD AND CHECK THAT SCAN 

CODE -AA' IS RETURNED TO THE CPU. 

CHECK FOR STUCK KEYS. 



0591 


BO 


35 


0593 


E6 


80 


0595 


F6 


06 0012 R 20 


059A 


75 


03 


059C 


E9 


0651 R 


059F 


80 


3E 0072 R 64 


05AU 


75 


03 


05A6 


E9 


0651 R 


05A9 


BO 


36 


05AB 


E6 


80 


05AD 


FA 




05AE 


81 


3E O072 R 1234 


05B^ 


74 


17 


05B6 


80 


3E 0072 R AA 


05BB 


74 


10 


05BD 


BO 


AE 


05BF 


E8 


0000 E 


05C2 


B7 


04 


0504 


E8 


0000 E 


05C7 


75 


04 


05C9 


FE 


OF 


05CB 


75 


F7 


05CD 


BO 


AD 


05CF 


E8 


0000 E 


05D2 


E4 


60 


05Dit 


BO 


EO 


0506 


E8 


0000 E 


0509 


E8 


0000 E 


05DC 


£4 


60 


05DE 


A8 


01 


05E0 


74 


OB 


05E2 


80 


OE 0016 R 08 


05E7 


BE 


0000 E 


05EA 


EB 


62 90 


05ED 


E8 


0000 E 


05F0 


E3 


28 


05F2 


BO 


37 


05F4 


E6 


80 


05F6 


80 


FB AA 


05F9 


75 


1 F 


05FB 


BO 


38 


05FD 


E6 


80 


05FF 


BO 


AE 


0601 


E8 


0000 E 


0604 


2B 


C9 


0606 


E2 


FE 


0608 


E4 


64 


060A 


A8 


01 


060C 


74 


43 


060E 


BO 


39 


0610 


E6 


80 


0612 


E4 


60 


061U 


E8 


0000 E 


0617 


EB 


2D 90 


061A 


FA 




061 B 


BO 


AB 


0610 


E6 


64 


061 F 


28 


C9 


0621 


B7 


05 


0623 


E4 


64 


0625 


A8 


01 


0627 


El 


FA 


0629 


75 


OA 


062B 


FE 


CF 


062D 


75 


F4 


062 F 


BE 


0000 E 


0632 


EB 


lA 90 


0635 


E4 


60 


0637 


3C 


00 


0639 


74 


OB 


063B 


80 


OE 0016 R 10 


0640 


BE 


0000 E 


0643 


EB 


09 90 


0646 


BE 


0000 E 



CMP 

JNZ 

JMP 

MOV 

OUT 

CLI 

CMP 

JZ 

CMP 

JZ 

MOV 

CALL 

MOV 

CALL 

JNZ 

DEC 

JNZ 

MOV 

CALL 

IN 

MOV 

CALL 

CALL 



OR 

MOV 

JMP 

CALL 

JCXZ 

MOV 

OUT 

CMP 

JNE 



MFG_TST,LOOP_POST 



BYTE PTR RESET_FLAG,064H ^ 



RESET_FLAG, 1234H 

GIO 

BYTE PTR RESET_FLAG,OAAH 

GIO 

AL, ENA_KBD 

C8042 

BH,4 



BH 

LOOPl 

AL,DIS_KBD 

C8042 

AL, PORT_A 

AL, KYBD_CLK_DATA 

C8042 

OBF_42 

AL, PORT_A 

AL, KYBD_CLK 

Gl 1 

MFG_ERR_FLAG+1,KYCLK_FAIL 

SI, OFFSET F1_B 



AL,37H 

MFG„PORT,AL 

BL,OAAH 



CHECK FOR STUCK KEYS 



OOOCHECKPOINT 35 <><><><> 

MANUFACTURING BURN IN TEST MODE? 

YES - SKIP KEYBOARD TEST 
; MANUFACUTRING RUN IN MODE? 

YES - SKIP KEYBOARD TEST 

OOOCHECKPOINT 36 • 

SOFT RESET? 

; CHI 
CO 

ENABLE KEYBOARD 

TRY 4 TIMES 

CHECK FOR OUTPUT BUFFER FULL 

GO IF BUFFER FULL 

DISABLE KEYBOARD 

FLUSH 

GET THE CLOCK AND DATA LINES 

WAIT FOR OUTPUT BUFFER FULL 

GET THE RESULTS 

KEYBOARD CLOCK MUST BE LOW 

; <><><><><><><><><><><><><><> 

<><> KEYBOARD CLOCK H I GH<><><> 
DISPLAY 304 ERROR 
REPORT ERROR 
ISSUE RESET TO KEYBRD 
PRINT ERR MSG IF NO INTERRUPT 

OOOCHECKPOINT 37 <><><><> 
SCAN CODE AS EXPECTED? 
NO - DISPLAY ERROR MSG 



><><>CHECKPOINT 38 



MOV 
CALL 
SUB 
LOOP 



AL,ENA_KBD 

C8042 

CX.CX 



AL,PORT_A 
XPC_BYTE 
F6C 



KEYBOARD ERROR TRY TO DFTFRMINE 



MOV 
OUT 
SUB 
MOV 
IN 

TEST 
LOOPZ 
JNZ 
DEC 
JNZ 
MOV 
JMP 
IN 
CMP 



MOV 
JMP 
MOV 



AL, INTR_FACE_CK 

STATUS_PORT,AL 

CX,CX 

BH,05 

AL,STATUS_P0RT 

AL,OUT_BUF_FULL 

F6A 

F6B 

BH 

F6A 

SI, OFFSET F1_A 

F6D 

AL, PORT_A 

AL,0 

F6C 

MFG_ERR_FLAG+1 , KY_SYS_FAI L; <><><><><><>• 

KEYBOARO/SYSTEMO 
SI, OFFSET F1 " " ^ 

F6D 
SI, OFFSET Kl 



DELAY FOR A WHl LE 
CHECK FOR STUCK KEYS 
OUT BUFFER FULL? 
YES - CONTINUE TESTING 



OOOCHECKPOINT 39 <><><><> 

GET THE SCAN CODE 
CONVERT AND PRINT 
CONTINUE 

IF 8042 INTERFACE IS WORKING 

COMMAND TO 8042 

WAIT FOR OUTPUT BUFFER FULL 
8042 Fl N I SHED TEST? 
GO CHECK RESULTS 



TRY AGAIN 

INDICATE PLANAR FAILURE 

(REMOVE KEYBOARD TRY AGAIN) 
GET THE RESULTS OF INTERFACE TEST 
IS THE INTERFACE OK? 



PLANAR FAILURE 
GO I F YES 
GEl MSG ADDR 



0649 80 OE 0016 R 20 



064E E8 0000 E 



PRINT MSG ON SCREEN 



INITIALIZE 8042 TO HONOR KEY LOCK 



5-60 Test 2 



0651 


BO 


3A 


0653 


t:6 


80 


065^ 


Hf) 


FF 


0657 


F6 


21 


0659 


FA 




065A 


RO 


60 


065C 


FR 


0000 E 


065F 


HO 


i+5 


0661 


E6 


60 


0663 


m 


ou 


0665 


E8 


0000 E 


0668 


PB 


CO 


066A 


RF 


CO 


066C 


B9 


0008 


066F 


OF 




0670 


IF 




0671 


BF 


0000 E 


0674 


RF 


0020 R 


0677 






0678 


4/ 




0679 


Hf 




067A 


tz 


FB 


067C 


?R 


CO 


067E 


8F 


CO 


0680 


B9 


0008 


0683 


OF 




068U 


1 F 




0685 


BF 


0000 E 


0688 


BF 


OICO R 


068B 


A5 




G68C 


4/ 




068D 


'1 / 




068E: 


E2 


FB 



0690 2B CO 

0692 8E D8 

069U C7 06 0008 R 0000 E 

069A 07 06 0014 R 0000 E 

06A0 07 06 0062 R F600 



06A6 


RF 


0180 


06A9 


B9 


OOOE 


06AC 


C/ 


05 0000 


06BO 


83 


C7 02 


06B3 


E2 


F7 


06B5 


F6 


06 0412 R 20 


06BA 


75 


OA 


06BC 


C7 


06 0020 R 0000 E 


06C2 


BO 


FE 


0604 


F6 


21 


06C6 


FB 




06C7 


E8 


0000 E 



MOV 


AL,3AH 


OUT 


MFG_PORT,AL 


MOV 


AL.OFFH 


OUT 


INTA01, AL 


CLI 




MOV 


AL,60H 


CALL 


C8042 


MOV 


AL,45H 


OUT 


PORT_A,AL 


DEGATE 


ADDRESS LINE 20 



;<><><>CHECKP0INT 3A • 
; DISABLE INTERRUPTS 



WRITE 8042 RAM COMMAND 
ISSUE THE COMMAND 
SET SYSTEM FLAG - OUTBUF INT - 
SYSTEM FLAG - PC 1 COMPATAB I L I TY 
RESET INHIBIT OVER RIDE 



SETUP HARDWARE INT VECTOR TABLE LVL 0-7 



sun 


AX, AX' 


MOV 


ES.AX 


MOV 


CX,08 


PUSH 


CS 


POP 


OS 


MOV 


SI, OFFSET VECTOR TABLE 


MOV 


Dl .OFFSET INT PTR 


MOVSW 





■ OVER SEGMENT 



SETUP HARDWARE INT VECTOR TABLE LVL 8-15 (VECTORS START AT INT 50H ) 



AX, AX 
ES,AX 
CX,08 



SUB 

MOV 

MOV 

PUSH 

POP 

MOV 

MOV 

MOVSW 

INC 

INC 

LOOP F7A1 

SET UP OTHER INTERRUPTS AS NECESSARY 

ASSUME DS:ABSO 

SUB AX, AX 

MOV DS,AX 

MOV NMI_PTR, OFFSET NMI_INT 

MOV I NT5_PTR, OFFSET PRINT_SCREEN 

MOV BASIC_PTR+2,OF600H 



. I P OVER SEGMENT 



ZERO RESERVED VECTORS 



MOV 
MOV 
MOV 
ADD 
LOOP 

SETUP 
TEST 
JNZ 
MOV 
MOV 
OUT 
ST I 



Dl ,60H*4 

CX, 14 

WORD PTR DS: [Dl 



NMI INTERRUPT 
PRINT SCREEN 
SEGMENT FOR CASSETTE BASIC 



POIWT TO NEXT LOCATION 



TIMFR TO BLINK LED IF MANUFACTURING TEST MODE 

DATA_AREA[MFG_TST-DATA_base],LOOP_POST ; MFG. TEST MODE? 
F9 

I NT^ADDR, OFFSET BLINK_INT 
AL,OFEH 
1NTA01,AL 

; ALLOW INTERRUPTS 



ISSUE A RESET TO THE HARD FILE IF SOFT RESET 



06CA 


81 3E 0072 R 


06DO 


75 OE 


0602 


B9 00 FF 


06D5 


BA 03 F6 


06D8 


BO 04 


06DA 


EE 


06DB 


E2 FE 


06DD 


2A CO 


06DF 


EE 



CMP 

JNZ 

MOV 

MOV 

MOV 

OUT 

LOOP 

SUB 

OUT 



RESET_FLAG, 1234H 

F9A 

CX,OFFH 

DX,03F6H 

AL,04H 

DX,AL 

F9_A 



RESET 

HOLD RESET 
REMOVE RESET 



TEST. 23 

DISKETTE ATTACHMENT TEST 

DESCKI PTION 

CHECK IF IPL DISKETTE DRIVE IS ATTACHED TO SYSTEM. IF 
ATTACHED, VERIFY STATUS OF NEC FDC AFTER A RESET. ISSUE 
A REGAL AND SEEK CMD TO FDC AND CHECK STATUS. COMPLETE 
SYSTEM INITIALIZATION THEN PASS CONTROL TO THE BOOT 
LOADER PROGRAM. 



06E0 


BO 


30 






06E2 


E6 


80 






06E4 


BO 


02 






06E6 


RA 


03F7 




06E9 


FF 








06EA 


Fft 


06 


0010 R 01 


06EF 


74 


4F 






06F1 


F6 


06 


0012 R 20 


06F6 


74 


48 






06F8 










06F8 


F4 


21 






06FA 


FB 


00 






06 FC 


24 


BF 






06FE 


E6 


21 






0700 


B4 


00 






0702 


RA 


D4 






0704 


CI) 


13 






0706 


F6 


C4 


FF 




0709 


75 


24 






070B 


BA 


03F2 




070E 


BO 


10 






0710 


FE 








0711 


?B 


C9 






0713 


82 


OC 






0715 











MOV 
MOV 
OUT 
TEST 



JMP 
AND 
OUT 
MOV 
MOV 



AL,02H 

DX,3F7H 

DX,AL 

BYTE PTR EQUI P_FLAG,01H 

F15 

MFG_TST,LOOP_POST 

F15 

AL, INTAOl 
SHORT $+2 
AL,OBFH 
INTAOl, AL 
AH,0 
DL,AH 
13H 

AH,OFFH 
F13 



TURN DRIVE MOTOR ON 



MOV 
MOV 
OUT 
SUB 
MOV 



DX,03F2H 

AL,1CH 

DX,AL 

CX,CX 

DL,12 



oooCHECKPOlNT 3C <><><><> 
SET DATA RATE TO 250 K BITS / SEC 

; DISKETTE PRESENT? 

MFC JUMPER INSTALLED? 
GO I F YES 
DISK_TEST: 



RESET NEC FDC 

SET FOR DRIVE 

VERIFY STATUS AFTER RESET 

STATUS OK? 

NO - FDC FAILED 



GET AODR OF FDC CARD 
TURN MOTOR ON, EN DMA/ I NT 
WRITE FDC CONTROL REG 



Test 2 5-61 



0715 


E2 


FE 


0717 


FE 


CA 


0719 


75 


FA 


071B 


33 


D2 


0710 


B5 


01 


071 F 


88 


16 003E R 


0723 


E8 


0000 E 


0726 


72 


07 


0728 


B5 


22 


072A 


E8 


0000 E 


072D 


73 


OB 


072F 






072F 


80 


OE 0016 R 40 


073i4 


BE 


0000 E 


0737 


E8 


0000 E 


073A 






073A 


BO 


OC 


073C 


BA 


03 F2 


073F 


EE 




0740 


C6 


06 006B R 00 


0745 


BE 


OOIE R 


0748 


89 


36 001A R 


074C 


89 


36 001C R 


0750 


89 


36 0080 R 


0754 


83 


C6 20 


0757 


89 


36 0082 R 


075B 


BF 


0078 R 


075E 


IE 




075F 


07 




0760 


68 


1414 


0753 


AB 




0764 


AB 




0765 


B8 


0101 


0768 


AB 




0769 


AB 




076A 


E4 


21 


076C 


24 


FE 


076E 


EB 


00 


0770 


E6 


21 


0772 


F6 


06 0012 R 20 


0777 


75 


03 


0779 


E9 


0858 R 


077C 


BO 


8E 


077E 


E6 


70 


0780 


EB 


00 


0782 


E4 


71 


0784 


24 


EO 


0786 


74 


16 


0788 


A8 


80 


078A 


BE 


0000 E 


078D 


74 


06 


078F 


E8 


0000 E 


0792 


EB 


62 90 


0795 






0795 


BE 


0000 E 


0798 


E8 


0000 E 


079B 


EB 


59 90 


079E 


B3 


03 


07A0 


2B 


C9 


07A2 


BO 


8A 


07A4 


E6 


70 


07A6 


EB 


00 


07A8 


E4 


71 


07AA 


A8 


80 


07 AC 


75 


25 


07AE 


E2 


F2 


0780 


FE 


CB 


07B2 


75 


EC 


07B4 


BE 


0000 E 


07B7 


E8 


0000 E 


07 BA 


BO 


8E 


07BC 


E6 


70 


07BE 


86 


C4 


07C0 


EB 


00 


07C2 


E4 


71 


07C4 


OC 


04 


07C6 


86 


C4 


07C8 


E6 


70 


07CA 


86 


04 


07CC 


EB 


00 


07CE 


E6 


71 


0700 


EB 


12 90 


07D3 


B9 


0258 


0706 


BO 


8A 


0708 


E6 


70 


07DA 


EB 


00 


07DC 


E4 


71 


07DE 


A8 


80 


07E0 


EO 


F4 


07E2 


E3 


DO 


07E4 






07E4 


BO 


8E 


07E6 


E6 


70 



B2_0K: 
B_0K: 



C_0K 
D_0K 
E_0K 



LOOP 


FIT 


DEC 


DL 


JNZ 


F11 


XOR 


DX,DX 


MOV 


CH,1 


MOV 


SEEK STATUS. DL 


CALL 


SEEK 


JC 


F13 


MOV 


CH,34 


CALL 


SEEK 


JNC 


F14 



MFG_ERR_FLAG+1,DSK_FAIL 



TURN DRIVE MOTOR OFF 



MOV 
MOV 
OUT 



AL.OCH 

DX,03F2H 

DX.AL 



SETUP KEYBOARD PARAMETERS 



MOV 
MOV 
MOV 
MOV 
MOV 
ADD 
MOV 



INTR_FLAG,OOH 

SI , OFFSET KB_BUFFER 

BUFFER_HEAD,SI 

BUFFER_TAIL,SI 

BUFFER_START,SI 

SI, 32 

BUFFER_END,SI 



RECALIBRATE DISKETTE 

GO TO ERR SUBROUTINE IF ERR 

SELECT TRACK 34 

SEEK TO TRACK 34 

OK, TURN MOTOR OFF 

DSK_ERR: 

; <><><><><><><><><><><><><><><> 

<><> DISKETTE FAILEDooooo 
GET ADDR OF MSG 
GO PRINT ERROR MSG 



DRO_OFF: 

TURN DRIVE MOTOR OFF 

FDC CTL ADDRESS 



; DEFAULT BUFFER OF 32 BYTES 



SET PRINTER TIMEOUT DEFAULT 



MOV 

PUSH 

POP 

MOV 

STOSW 

STOSW 



D I, OFFSET PRINT_TIM_OUT ; SET DEFAULT PRINTER TIMEOUT 

DS 

ES 

AX, 1414H ; DEFAULT=20 



SET 4S232 DEFAULT 



MOV AX,0101H 

STOSW 

STOSW 



;RS232 DEFAULT=01 



ENABLE TIMER INTERRUPTS 



AND 
JMP 
OUT 



AL, INTA01 
AL.OFEH 
SHORT $+2 
INTAOI.AL 



• CHECK CMOS BATTERY/CHECKSUM 



TEST 
JNZ 
JMP 
MOV 
OUT 
JMP 
IN 
AND 



MOV 
CALL 
JMP 



MFG_TST,LOOP_POST 

B1_0K 

F15C 

AL,DIAG_STATUS 

CMOS_PORT,AL 

SHORT $+2 

AL,CM0S_P0RT+1 

AL,OEOH 

C_OK 

AL,80H 

SI, OFFSET CM1 

B2_0K 

E_MSG 

H_0K1A 

SI .OFFSET CM2 

E_MSG 

H_0K1A 



TEST CLOCK UPDATING 



MOV 

SUB 

MOV 

OUT 

JMP 

IN 

TEST 

JNZ 

LOOP 

DEC 

JNZ 

MOV 

CALL 



BL,03H 

CX.CX 

AL,CLK_UP 

CMOS_PORT,AL 

SHORT $+2 

AL.CMOS_PORT+1 

AL,80H 

G_OK 

E_OK 

BL 

D_OK 

SI, OFFSET CM3 

E_MSG 



MFG JUMPER? 
GO IF NOT 
BYPASS I F YES 



10 DELAY 

BAD BATTERY, CHK SUM, OR M I N CONFIG? 

GO I F NOT 

BATTERY BAD? 

PRELOAD BATTERY MSG 

GO I F BATTERY OK 

PRINT BATTERY MSG 

CONT I NUE( BYPASS CLOCK ETC) 

PRE LOAD CKSUM BAD 

PRINT MSG 

BYPASS CLOCK TEST-MEM SIZE 



OUTER LOOP COUNT 
INNER LOOP COUNT 
GET THE CLOCK UPDATE BYTE 



10 DELAY 

CHECK FOR UPDATE 

GO IF YES 

TRY AGAIN 

DEC OUTER LOOP 

TRY AGAIN 

PRINT MSG 



N PROGRESS 



SET CMOS DIAG_STATUS 04 (CLOCK ERROR) 



AL,DIAG_STATUS 

CMOS_PORT,AL 

AL.AH 

SHORT $+2 

AL,CM0S_P0RT+1 

AL,CMOS_CLK_FAII 

AL,AH 

CMOS_PORT,AL 

AL.AH 

SHORT $+2 

CM0S_P0RT+1,AL 

H_OK 



■ CHECK CLOCK UOATE 



MOV 
OUT 
XCHG 
JMP 



XCHG 
OUT 
XCHG 



SET CLOCK ERROR 

SAVE STATUS ADDRESS 

10 DELAY 

GET THE CURRENT STATUS 

SET NEW STATUS 

GET STATUS ADDR AND SAVE NEW STATUS 



10 DELAY 
CONTINUE 



MOV 
MOV 
OUT 
JMP 
IN 

TEST 
LOOPNZ 
JCXZ 



CX,600 

AL,CLK_UP 

CM0S_P0RT,AL 

SHORT $+2 

AL,CM0S_P0RT+1 

AL,80H 

l_OK 

F_OK 



■ CHECK MEMORY SIZE DETERMINED = CONFIG 



GET THE STATUS BYTE 



5-62 Test 2 



07E8 
07EA 
07EC 
07EE 


EB 
Ei4 
A8 
74 


00 
71 
10 
06 




07FO 
07F3 


BE 
E8 


0000 E 
0000 E 




07F6 
07FB 
07FE 


80 
BE 
7U 


3E 0015 
0000 £ 
OA 


R OC 


0800 
0805 
0807 
080A 


80 
7'j 
BE 
E8 


3E 0015 
06 

0000 E 
0000 E 


R OD 



JMP SHORT $+2 

IN AL,CM0S_P0RT+1 

TEST AL,W„MEM_SIZE 

J2 .H_0K1A 

-- MEMORY SIZE ERROR 



CHECK FOR CRT ERROR 



CMP 
JNZ 
MOV 
H_0K1B: CALL 



MFG_ERR_FLAG,OCH 
SI .OFFSET E1_B 
H_0K1B 

MFG_ERR_FLAG.OOH 

J_OK 

SI, OFFSET E1_C 

E_MSG 



CHECK FOR MONO CRT ERROR 
PRELOAD MONO CRT ERROR 
GO IF YES 

CHECK FOR COLOR CRT ERROR 
CONTINUE I F NOT 
CRT ERROR MSG 



CHECK FOR COMBO HARD FILE/DISKETTE CARD 



080D 






080D 


H3 


OF 


080 F 


?B 


C9 


0811 


BA 


01 F7 


08114 


FG 




0815 


An 


80 


0817 


74 


OD 


0819 


F? 


F9 


081 B 


FF 


C8 


081 D 


75 


F5 


081 F 


?U 


OC 


0821 


7U 


1A 


0823 


LB 


33 90 


0826 


BA 


01 F4 


0829 


BO 


55 


082B 


LL 




082C 


EB 


00 


082L 


LC 




082 F 


m: 


55 


0831 


75 


25 


0833 


BO 


AA 


0835 


FE 




0836 


EB 


00 


0838 


EC 




0839 


3C 


AA 


083B 


75 


IB 



MOV 
SUB 
MOV 



LOOP 
DEC 
JNZ 
AND 



MOV 
MOV 
OUT 
JMP 
IN 
CMP 
JNZ 
MOV 
OUT 
JMP 



083D C6 06 008F R 01 



08'42 BO 30 
08U4 E6 80 
08U6 E8 0000 I 



08i49 E8 0000 E 

Omc 80 3E 0091 R 00 

0851 7H 05 

0853 80 OE 0010 R 40 



0858 


BO 


3E 


085A 


E6 


80 


085C 


BO 


8E 


0R5E 


r6 


70 


0860 


FB 


00 


0862 


r4 


71 


086U 


A8 


CO 


0866 


75 


OF 


0868 


BO 


92 


086A 


F6 


70 


086C 


FB 


00 


086E 


F4 


71 


0870 


30 


00 


0872 


74 


03 


0874 


E8 


0000 



BL,0FH 

CX,CX 

DX,01F7H 

Al ,DX 

AL,080H 

J_0K2 

J_0K1 

BL 

J_0K1 

AL.OCH 

J_0K3 

F15C 

DX,1F4H 

AL,055H 

DX.AL 

SHORT $+2 

AL,DX 

AL,055H 

F15C 

AL, OAAH 

DX,AL 

SHORT $+2 

AL,DX 

AL,OAAH 

F15C 

HF_CNTRL,DUAL 



GUTTER LOOP COUNT WAIT FOR BUSY OFF 

HARD FILE STATUS PORT 
GET THE STATUS 
IS THE CONTROLLER BUSY? 
CONTINUE I F NOT 
TRY AGAIN 

DECREMENT GUTTER LOOP 
TRY AGAIN I F NOT ZERO 
BITS2&3=0 IF COMBO CARD 
GO I F YES 
NO COMBO CARD 



DATA READ 



SET THE HF/FLOPPY SWITCH ON 



- INITIALIZE FLOPPY FOR DRIVE TYPE 

MOV AL,3DH 

OUT MFG_PORT,AL 

CALL DSKETTE_SETUP 



cxxxxxxxx: 
OOOCHECKPOINT 3D <><><><; 
INITIALIZE FLOPPY 



-- CHECK FOR 2ND DISKETTE DRIVE 
CALL DOS 
CMP DSK_STATE+1,0 
JZ F15C 
OR BYTE PTR EQU I P_FLAG, 40H 

- INIT lALlZE HARD FILE 



INSURE DATA SEGMENT 

IS THERE A DRIVE 2 ATTACHED? 

GO IF NOT 

SET SECOND DRIVE INSTALLED 



MOV 


AL,3EH 


OUT 


MFG_PORT,AL 


MOV 


AL.DIAG STATUS 


OUT 


CMOS PORT,AL 


JMP 


SHORT $+2 


IN 


AL,CMOS PORT+1 


TEST 


AL,OCOH 


JNZ 


R0M„SCAN1 


MOV 


AL, HD FILE TYPE 


OUT 


CMOS PORT,AL 


JMP 


SHORT $+2 


IN 


AL,CMOS PORT+1 


CMP 


AL,OH 


JZ 


R0M_SCAN1 


CALL 


DISK SETUP 



oooCHECKPOINT 3E <><> 
GET THE CMOS STATUS 



NOT 
INSURE CMOS DEFINES THE TYPE OF HARD FILE 



INITIALIZE HARD FILE 



0877 






0877 


FB 




0878 


BO 


3B 


087A 


F6 


80 


087C 


FR 


0000 E 


087F 


BO 


OA 


0881 


ER 


0000 E 


0884 






0884 


?A 


CO 


0886 


E6 


02 


0888 


FB 


00 


088A 


F6 


D4 


088C 


BA 


C800 


088F 






088F 


RF 


DA 


0891 


?B 


DB 


0893 


8B 


07 


0895 


53 




0896 


5B 




0897 


3D 


AA55 


039A 


/5 


06 


089C 


ER 


0000 E 


089 F 


FB 


05 90 


08A2 






08A2 


HI 


C2 0080 


08A6 






08A6 


81 


FA EOOO 



TEST. 22 

CHECK FOR OPTIONAL ROM FROM C800->EOOO IN 2K BLOCKS 

(A VALID MODULE HAS '55AA' IN THE FIRST 2 LOCATIONS 
LENGTH INDICATOR (LENGTH/512) IN THE 3RD LOCATION 
AND TEST/ INIT. CODE STARTING IN THE 4TH LOCATION) 



ROM SCANl: 




STI 




MOV 


AL,3BH 


OUT 


MFC PORT,AL 


CALL 


DDS 


MOV 


AL, 10 


CALL 


PRT HEX 


ROM_SCAN : 




; SET 


DMA MASK AND R 


SUB 


AL,AL 


OUT 


DMA18+2,AL 


JMP 


SHORT $+2 


OUT 


DMA18+4,AL 


MOV 


DX,0C800H 


ROM SCAN2: 




MOV 


DS,DX 


SUB 


BX,BX 


MOV 


AX, [ BX ] 


PUSH 


BX 


POP 


BX 


CMP 


AX,0AA55H 


JNZ 


NEXT ROM 


CALL 


ROM CHECK 


JMP 


ARE WE DONE 


NEXT ROM: 




ADD 


DX, 0080H 


ARE WE DONE: 




CMP 


DX, OEOOOH 



ALLOW INTERRUPTS 

OOOCHECKPOINT 3B <><><><> 
SET REAL MODE DATA SEGMENT 
LINE FEED ON CRT 



SEND ZERO TO MASK REG 



BUS SETTLING 

= TO ID WORD? 

PROCEED TO NEXT ROM IF NOT 

GO CHECK OUT MODULE 

CHECK FOR END OF ROM SPACE 

POINT TO NEXT 2K ADDRESS 

AT EOOOO YET? 



Test 2 5-63 



08AA 7C E3 



R0M_SCAN2 



; GO CHECK ANOTHER ADD. IF NOT 



08AC 


E8 0000 


08AF 


Ek 64 


08B1 


2^ 10 


08B3 


74 03 


08B5 


EB 00 90 



I OE 0016 R 80 



-- TEST FOR KEYBOARD LOCKED 

CALL DOS ; 

IN AL,STATUS_P0RT ; 

AND AL,KYBD_INH ; 

JZ KEY1 

JMP KEY10 ; 

OR MFG_ERR_FLAG+1. KEY_FAIL ; 



ELSE 






KEY9: 


ASSUME 


DS:DATA 


END IF 


MOV 
CALL 


SI .OFFSET LOCK 
E_MSG 


KEY10: 










PRINTER_BASE 




. -f zl_- 



GO I F OFF 



><> KEYBOARD IS LOCKED <><><> 



; PRINT LOCKED MESSAGE (302) 



08C3 


BF 


0000 E 


08C6 


BF 


0000 


08C9 






05C9 


?t 


8B 15 


08CC 


BO 


AA 


08CE 


FF 




08CF 


EB 


00 


08D1 


IF 




08D2 


FC 




08D3 


IF 




08DU 


30 


AA 


08D6 


75 


06 


08D8 


89 


94 0008 R 


08DC 


46 




08DD 


46 




08DE 






08DE 


47 




08DF 


47 




08E0 


R1 


FF 0000 E 


08E4 


75 


E3 


08E6 


RB 


0000 


08E9 


BA 


03 FA 


08EC 


FC 




08ED 


A8 


F8 


08EF 


75 


08 


08F1 


07 


87 0000 R 03F8 


08F7 


43 




08F8 


43 




08F9 


HA 


02 FA 


08FC 


FC 




08FD 


AS 


F8 


08FF 


75 


08 


0901 


07 


87 0000 R 02 F8 


0907 


43 




0908 


43 




0909 






0909 


«B 


C6 


0908 


B1 


03 


090D 


n? 


08 


090 F 


OA 


C3 


0911 


A2 


0011 R 



MOV 

MOV 

OUT 

JMP 

PUSH 

IN 

POP 

CMP 

JNE 

MOV 



DX,CS:[DI J 
AL,OAAH 
DX.AL 
SHORT $+2 



PRINTER_BASE[SI ],DX 



CMP 


Dl, OFFSET F4E 




JNE 


F16 




- SETUP 


RS232 




MOV 


BX.O 




MOV 


DX, 3 FAH 




IN 


AL, DX 




TEST 


AL,0F8H 




JNZ 


F18 




MOV 


RS232 BASE[BX] 


3F8H 


INC 


BX 




INC 


BX 




MOV 


DX,2FAH 




IN 


AL,DX 




TEST 


AL,0F8H 




JNZ 


F19 




MOV 


RS232_BASE[BX] 


2F8H 



PRT_SRC_TBL 

PRT_BASE: 

GET PRINTER BASE ADDR 

WRITE DATA TO PORT A 

10 DELAY 
BUS SETTLING 
READ PORT A 

DATA PATTERN SAME 
NO - CHECK NEXT PRT CD 
YES - STORE PRT BASE ADDR 
INCREMENT TO NEXT WORD 



POINT TO NEXT BASE ADDR 



POINTER TO RS232 TABLE 
CHECK IF RS232 CD 1 ATTCH? 
READ INTR ID REG 



SETUP RS232 CD #1 ADDR 



BASE_END 

SETUP RS232 CD #2 



SET UP EQUIP_FLAG TO INDICATE NUMBER OF PRINTERS AND RS232 CARDS 



MOV 


AX, SI 




MOV 


CL,3 




ROR 


AL, CL 




OR 


AL,BL 




MOV 


BYTE PTR EQUIP_FLAG+1,AL 


TEST 


FOR ANY ERRORS ( BP NOT ZERO) 



BASE_END: 

HAS 2* NUMBER OF RS232 

SHI FT COUNT 

ROTATE RIGHT 3 POSITIONS 
THE PRINTER COUNT 
; STORE AS SECOND BYTE 



0914 


2B 


CO 


0916 


A3 


0017 R 


0919 


F4 


21 


091B 


24 


FD 


091D 


FB 


00 


091 F 


E6 


21 


0921 


06 


06 0015 R 00 


0926 


83 


FD 00 


0929 


74 


3D 


092B 


80 


3E 0072 R 64 


0930 


75 


08 


0932 


C6 


06 0015 R AA 


0937 


FR 


2F 90 


093A 






093A 


BA 


0002 


093D 


E8 


0000 E 


0940 


F4 


64 


0942 


24 


10 


0944 


BF 


0000 E 


0947 


75 


09 


0949 


BF 


0000 E 


094C 


FR 


0000 E 


094F 


BF 


0000 E 


0952 






0952 


b8 


0000 E 


0955 


B4 


01 


0957 


2B 


D2 


0959 


CD 


17 


095B 






095B 


BO 


3F 


095D 


E6 


80 



CLEAR KEYBOARD STATE FLAGS 



ENABLE KEYBOARD INTERRUPTS 



AND 
JMP 
OUT 



AL, INTA01 
AL,OFDH 
SHORT $+2 
INTA01,AL 



RESET ALL KEYBOARD STATE FLAGS 



CLEAR MFG ERROR FLAG 
CHECK FOR BP= NON-ZERO 
(ERROR HAPPENED) 
CONTINUE IF NO ERROR 



MFG RUN IN MODE -> SET ERROR FLAG 



IN 
AND 
MOV 
JNZ 
MOV 
CALL 
MOV 



AL,STATUS_PORT 

AL, KYBD_INH 

SI, OFFSET F3D 

ERR_WA I T2 

SI , OFFSET F3D1 

P_MSG 

SI, OFFSET F3D 



; 2 SHORT BEEPS (ERROR) 

; CHECK IF RESUME MSG TO BE DISPLAYED 

• RESUME ERROR MSG 

; ERROR MSG FOR KEYBOARD LOCKED 

; RESUME MSG 



CALL P_MSG 

-- I NIT PRINTER (ALT DISPLAY DEVICE) 

MOV AH,1 ; 

SUB DX,DX ; FIRST PRINTER 



><><><><> 



5-64 Test 2 



095F 


BU 


00 


0961 


CO 


16 


0963 


80 


FC 3B 


0966 


7'> 


H3 


0968 






0968 


F6 


06 0012 R 20 


096D 


7'> 


03 


096 F 


F9 


0000 E 


0972 


80 


3E 0072 R 64 


0977 


7U 


06 


0979 


RA 


0001 


097C 


E8 


0000 E 


097F 


?A 


EH 


0981 


AO 


00U9 R 


098U 


CD 


10 


0986 


B9 


01 F4 


0989 


Bh 


DOAO 


098C 


2B 


CO 


098E 


«h 


CO 


0990 


?6 


89 05 


0993 


83 


07 02 


0996 


E2 


F8 



TEST 
JNZ 
JMP 
CMP 



AH, 00 
16H 

AH,3BH 
ERR_WA1T1 

MFG_TST,LOOP_POST 

F15A 

START_1 

BYTE PTR RESET_FLAG,6UH 

F15B 



AH, AH 

AL,CRT_MODE 

10H 



F20: 


MOV 


CX,0500 




MOV 


DI,SYS IDT LOG 




SUB 


AX, AX 




MOV 


ES,AX 


F20 A: 


MOV 


ES:[DI ],AX 




ADD 


Dl,2 




LOOP 


F20_A 




•~ 


TIMF riF r>AV 



WAIT FOR 'F1' KEY 



MFC BURN IN MODE 
GO IF NOT 
GO LOOP POST 
MFG RUN IN? 
BYPASS BEEP IF YES 

1 SHORT BEEP (NO ERRORS) 



CLEAR FLAGS 
CLEAR SCREEN 



CLEAR 

POINT TO NEXT LOCATION 

CONTINUE TILL DONE 



0998 E8 0000 E 



099B B8 R 

099E 8E DO 

09 AO BC 0100 R 



CALL SET_T0D 
■-- SET SYSTEM STACK 



MOV 
MOV 
MOV 



AX, STACK 

SS,AX 

SP, OFFSET TOS 



GET THE STACK SEGMENT 



ENABLE HARDWARE INTERRUPT IF MATH PROCESSOR (X287) 



09A3 


BO 


UO 








09A5 


E6 


80 








09A7 


A1 


0067 R 






09AA 


50 










09AB 


2B 


CO 








09AD 


A3 


0067 R 






09B0 


DB 


L3 








09B2 


33 


CO 








09B4 


D9 


3E 


0067 


R 




09B8 


60 










09B9 


61 










09BA 


81 


26 


0067 


R 


1F3F 


09C0 


81 


3E 


0067 


R 


033F 


09C6 


75 


24 








09C8 


9B 










09C9 


DD 


3E 


0067 


R 




09CD 


60 










09CE 


61 










09CF 


F7 


06 


0067 


R 


B88F 


09D5 


75 


15 








09D7 


EU 


A1 








09D9 


24 


DF 








09DB 


EB 


00 








09DD 


E6 


A1 








09DF 


EU 


21 








09E1 


2U 


F8 








09E3 


EB 


00 








09E5 


E6 


21 








09E7 


80 


OE 


0010 


R 


02 


09EC 












09EC 


58 










09ED 


A3 


0067 R 






O9F0 


80 


3E 


0072 


R 


64 


09F5 


75 


03 








09 F7 


EB 


63 


90 






09 FA 












09 FA 


EU 


A1 








09 FC 


24 


FD 








09FE 


EB 


00 








OAOO 


E6 


A1 









MOV 

OUT 

MOV 

PUSH 

SUB 

MOV 

ESC 

XOR 

ESC 

PUSHA 

DB 

POPA 

DB 

AND 

CMP 

JNZ 

WAIT 
ESC 
PUSHA 



AND 
JMP 
OUT 



AL,40H 

MFG_P0RT,AL 

AX, I 0_ROM_ I N 1 T 

AX 

AX, AX 

I 0_ROM 

28, BX 

AX, AX 

15, IO_ROM_ 

060H 

061H 

IO_R0M_IN 
IO_R0M_IN 
N0_287 



NIT, AX 
NIT 



02FH, 

060H 

061H 

I 0_ROM_ 

N0_287 



AL, INTBOl 
AL.OOFH 
SHORT $+2 
INTBOl.AL 



0_ROM_INIT 



NIT,0B8BFH 



oooCHECKPOlNT 40 <><><><><> 
TEMP STORAGE 

CLEAR 10_R0M_1N1T 



TIME hOR 287 TO RESPOND 



CLEAR UNUSED 287 BITS 
IS THE 287 INSTALLED? 
GO I F MATH PROCESSOR 1 S NOT 



GET THE SLAVE INT MASK 
ENABLE 287 INTERRUPTS 
10 DELAY 



ENSURE THAT MASTER LEVEL 2 ENABLED 

GET THE CURRENT MASK 



IN AL, INTAOl 

AND AL,OFBH 

JMP SHORT $+2 

OUT INTAOl.AL 

OR BYTE PTR EQUIP FL^G,02H 



IV IO_R0M_INIT,AX 
TEST FOR MFG RUN-IN TEST 



10 DELAY 

SET 287 BIT ON 

RESTORE IO_ROM_INIT 



CMP BYTE PTR RESET_FLAG, 64H ; 
JNZ END_287 ; 

JMP SHUT4 



IS THE THE MFG RUN- 
GO I F NOT 
BOOT LOAD I F YES 



UNMASK SLAVE HARDWARE INT 9 (LEVEL 71) 

GET THE CURRENT MASK 



AND 
JMP 
OUT 



AL, INTBOl 
AL,OFDH 
SHORT $+2 
INTB01,AL 



TEST FOR SYSTEM CODE AT SEGMENT E000:0 

FIRST WORD = AA55H 

LAST BYTE = CHECKSUM 

ENTRY POINT = FIRST BYTE + 3 
IF TEST IS SUCCESSFUL A CALL FAR TO THE ENTRY POINT IS EXCUTED 



0A04 


E6 80 


0A06 


BO AD 


0A08 


E6 70 


OAOA 


C6 06 0O72 R 00 


OAOF 


B8 EOOO 


0A12 


8E CO 


0A14 


2B FF 


0A16 


26: 8B 05 


0A19 


53 


0A1A 


5B 


0A1B 


3D AA55 


0A1E 


9C 


0A1F 


26: 89 05 


0A22 


E4 61 


0A24 


OC OC 



MOV 


AL,41H 


OUT 


MFG_PORT,AL 


MOV 


AL.CMOS END 


OUT 


CMOS_PORT,AL 


MOV 


BYTE PTR RESET FLAG,0 


MOV 


AX,0EOOOH 


MOV 


ES,AX 


SUB 


DI,DI 


MOV 


AX, ES:[DI ] 


PUSH 


BX 


POP 


BX 


CMP 


AX, 0AA55H 


PUSHF 




MOV 


ES:[D1 ].AX 


IN 


AL, PORT B 


OR 


AL,RAM PAR OFF 



INSURE NMI OFF 



TOGGLE 10/ PAR CHECK ENABLE 



Test 2 5-65 



0A26 


EB 


00 


0A28 


E6 


61 


0A2A 


24 


F3 


0A2C 


EB 


00 


0A2L 


t6 


61 


0A30 


9D 




0A31 


75 


29 


OA33 


IE 




0A3U 


06 




OA35 


IF 




0A36 


2B 


DB 


0A38 


E8 


QOOO 


0A3B 


IF 




0A3C 


75 


IE 


0A3E 


BO 


20 


OAijO 


E6 


70 


0A42 


EU 


61 


OAUU 


EB 


00 


0A46 


2i4 


F3 


0A48 


E6 


61 



JMP 

OUT 

AND 

JMP 

OUT 

POPF 

JNZ 



SHORT $+2 
P0RT_B,AL 
AL.RAM PAR_ON 
SHORT 5+2 
PORT_B,AL 

SHUT4 



- CHECKSUM SYSTEM CODE 

PUSH OS 

PUSH ES 

POP OS 

SUB BX,BX 

CALL ROS_CHFCKSUM 

POP OS 

JNZ SHUTii 

•-- ENABLE NMI AND lO/PAR CHECKS 



AL, PORT_B 
SHORT $+2 
AL,RAM_PAR_ON 
PORT_B,AL 



SET SEGMENT TO TEST 
STARTING OFFSET 



ENABLE NMI 



ENABLE PARITY 

10 DELAY 

ENABLE RAM PCK AND 10 CH 



0A58 FF IE 0067 R 



OUT MFG_P0RT,AL 
-- EXIT TO SYSTEM CODE 
CALL DWORD PTR DS: I 0_ROM_ I N I T 



OOOCHECKPOINT 42 <><><><> 



ENABLE NMI INTERRUPTS + ENTRY FROM SHUTDOWN WITH BOOT REQUEST 
MOV AL,2DH ; ENABLE NMI 



0A60 
0A62 
0A64 
0A66 



m 61 

EB 00 
24 F3 
L6 61 



AL, PORT_B 
SHORT $+2 
AL,RAM_PAR_ON 
PORT_B,AL 



ENABLE PARITY 

10 DELAY 

ENABLE RAM PCK AND 10 CH 



0A6C CD 19 



ENDI F 
P0$T2 
CODE 



GO TO BOOT LOADER 



ENDP 
ENDS 
END 



5-66 Test 2 



TITLE 09-26-83 TEST3 


POST UTIL 


.LIST 






PUBLIC 


P0ST3 




PUBLIC 


ROS CHECKSUM 




PUBLIC 


BLINK INT 




PUBLIC 


ROM CHECK 




PUBLIC 


XPC BYTE 




PUBLIC 


PRT HEX 




PUBLIC 


XLAT PR 




PUBLIC 


PROT PRT HEX 




PUBLIC 


PROC SHUTDOWN 





0000 






0000 






0000 


2B 


09 


0002 






0002 


?,? 


CO 


OOOU 






OOOU 


02 


0/ 


0006 


H■^ 




0007 


V? 


HB 


0009 


OA 


00 


OOOB 


03 




OOOC 







OOOC 






OOOC 


FB 




OOOD 


■>o 




OOOE 


FU 


80 


0010 


«A 


EO 


0012 


Ff> 


DO 


00T4 


^U 


HO 


0016 


ao 


EU BF 


0019 


OA 


04 


OOIB 


F6 


80 


0010 


RO 


20 


001 F 


F6 


20 


0021 


-^ft 




0022 


Ol- 




0023 







0023 
0023 
0026 
0028 
002A 
002D 
002F 
0031 
0033 
0034 
0037 
0039 
003B 
0030 
003F 
00U1 
00U4 
00U7 
00U7 
00U8 
OOUF 
005U 
0059 
005A 
005A 
005B 



B8 R 

8E CO 

2A EH 

8A 47 02 

Bl 09 

D3 EO 

8B C8 

51 

B9 0004 

D3 E8 

03 DO 

59 

E8 0002 R 

74 06 

E8 0000 E 

EB 14 90 



07 06 0067 R 0003 
8C IE 0069 R 
FF IE 0067 R 



• ROS CHECKSUM SUBROUTINE : 


ASSUME 


CS:C0DE. DS:ABSO 


P0ST3: 




ROS CHECKSUM 


PROC NEAR ; 


SUB 


CX.CX : 


ROS CHECKSUM CNT: ; 


XOR 


AL,AL 


C26: 




ADD 


AL,DS:[BX] 


INC 


BX ; 


LOOP 


C26 ; 


OR 


AL,AL ; 


RET 




ROS CHECKSUM 


ENDP 



NEXT_R0S_M0DULE 

NUMBER OF BYTES TO ADD IS 64K 

ENTRY FOR OPTIONAL ROS TEST 



POINT TO NEXT BYTE 

ADD ALL BYTES IN ROS MODULE 

SUM = 0? 



BLINK_1NT 



ASSUME DS:DATA 



SAVE AX REG CONTENTS 



IN 


AL,MFG PORT 






READ CURRENT VAL OF MFG_PO 


MOV 


AH,AL 








NOT 


AL 






FLIP ALL BITS 


AND 


AL,01000000B 






ISOLATE CONTROL BIT 


AND 


AH, 1011 m IB 






MASK OUT OF ORIGINAL VAL 


OR 


AL,AH 






OR NEW CONTROL BIT IN 


OUT 


MFC PORT.AL 






MOV 


AL,EOI 






OUT 


INTAOO,AL 






POP 


AX 




; RESTORE AX REG 


IRET 








BLINK_INT 


ENDP 






• THIS ROUTINE 


CHECKSUMS OPTI 


ONAL ROM MODULES AND 


; 1 F CHECKSUM 


IS OK, CALLS IN 


T/TEST CODE IN MODULE 


ROM CHECK 


PROC NEAR 






MOV 


AX, DATA 




POINT ES TO DATA AREA 


MOV 


ES,AX 






SUB 


AH, AH 




ZERO OUT AH 


MOV 


AL, [ BX+2 ] 




GET LENGTH INDICATOR 


MOV 


CL,09H 




MULTIPLY BY 512 


SHL 


AX.CL 






MOV 


CX,AX 




SET COUNT 


PUSH 


CX 




SAVE COUNT 


MOV 


CK,4 




ADJUST 


SHR 


AX.CL 






ADD 


DX,AX 




SET POINTER TO NEXT MODULE 


POP 


CX 




RETRIVE COUNT 


CALL 


ROS CHECKSUM 


DNT 


DO CHECKSUM 


J7 


ROM CHECK 1 






CALL 


ROM ERR 




POST CHECKSUM ERROR 


JMP 


ROM_CHECK_END 




AND EXIT 


ROM CHECK 1 : 








PUSH 


DX 




SAVE POINTER 


MOV 


ES: 10 ROM INIT,0003H 




LOAD OFFSET 


MOV 


ES: 10 ROM SEG 


DS 




LOAD SEGMENT 


CALL 


DWORD PTR ES: 


0_ROM_ 1 N 1 T 




CALL INIT./TEST ROUTINE 


POP 


DX 








ROM CHECK END: 








RET 






; RETURN TO CALLER 


ROM_CHECK 


ENDP 







CONVERT AND PRINT ASCII CODE 



005B 






005B 


bO 




005C 


Bl 


04 


005E 


n? 


E8 


0060 


L8 


0066 R 


0063 


b8 




0064 


24 


OF 


0066 






0066 


04 


90 


0068 


27 




0069 


14 


40 


006B 


27 




006C 






0060 


B4 


OE 


006E 


B7 


00 


0070 


CD 


10 


0072 


C3 




0073 






0073 






0073 







XPC BYTE 


PROC 




PUSH 


AX 




MOV 


CL,4 




SHR 


AL,CL 




CALL 


XLAT PR 




POP 


AX 




AND 


AL.OFH 


XLAT PR 


PROC 


NEAR 




ADD 


AL,090H 




DAA 






ADC 


AL,040H 




DAA 




PRT HEX 


PROC 


NEAR 




MOV 


AH, 14 




MOV 


BH,0 




INT 


10H 




RET 




PRT HEX 


ENDP 




XLAT PR 


ENDP 




XPC BYTE 


ENDP 



SAVE FOR LOW NIBBLE DISPLAY 

SHI FT COUNT 

NIBBLE SWAP 

DO THE HIGH NIBBLE DISPLAY 

RECOVER THE NIBBLE 

ISOLATE TO LOW NIBBLE 

FALL INTO LOW NIBBLE CONVERSION 

CONVERT 00-OF TO ASCII CHARACTER 
ADD FIRST CONVERSION FACTOR 
ADJUST FOR NUMERIC AND ALPHA RANGE 
ADD CONVERSION AND ADJUST LOW NIBBLE 
ADJUST HIGH NIBBLE TO ASCH I RANGE 

DISPLAY CHARACTER IN AL 

CALL VIDEO_IO 




0073 

0073 IE 

0074 53 



0075 BB 0020 
0078 8E DB 
007A E8 0098 R 



CHARTER 0l=CRT BUFFER POSITION 
NEAR 



PR0T_PRT_HEX PROC 
PUSH DS 
PUSH BX 

. B/W VIDEO CARD 



MOV BX, C_BWCRT_PTR 
MOV DS, BX 
CALL PROT_PRT 



SAVE CURRENT SEGMENT REGS 



Test 3 5-67 



007D 


BB 


0028 


0080 


8E 


DB 


0082 


E8 


0098 R 


0085 


BB 


0030 


0088 


8E 


DB 


008A 


E8 


0098 R 


008D 


BB 


0038 


0090 


8E 


DB 


0092 


E8 


0098 R 


0095 


5B 




0096 


IF 




0097 


C3 




0098 






0098 


57 




0099 


D1 


C7 


009B 


88 


05 


009D 


5F 




009E 


C3 




009F 






009F 






009 F 


BO 


FE 


00A1 


E6 


6k 


00A3 


F/+ 




OOAit 


EB 


FD 


00A6 






00A6 









MOV 


BX,C CCRT PTR 




MOV 


DS.BX 




CALL 


PROT PRT 




FNHAM'-irr, r-nl no 










MOV 


BX, E CCRT PTR 




MOV 


DS,BX 




CALL 


PROT PRT 




MOV 


BX, E CCRT PTR2 




MOV 


DS,BX 




CALL 


PROT PRT 




POP 


BX 




POP 


DS 




RET 




PROT_ 


PRT: 






PUSH 


Dl ; 




ROL 


Dl,1 ; 




MOV 


DS:(DI],AL ; 




POP 


Dl ; 




RET 




PROT_ 


.PRT_HEX 


ENDP 


PROC_ 


SHUTDOWN 


PROC 




MOV 


AL,SHUT CMD ; 




OUT 


STATUS_P0RT,AL ; 


PROC_ 


S: HLT 






JMP 


PROC S • 


PROC 


SHUTDOWN 


ENDP 


CODE 


ENDS 
END 





SET DS TO COMPATIBLE COLOR RAM 



ENHANCED COLOR 

ENHANCED COLOR PTR HI 64K 



SAVE DISPLACEMENT 
MULT *2 

WRITE TO CRT BUFFER 
RESTORE DISPLACEMENT 



SHUTDOWN COMMAND 



INSURE HALT 



5-68 Test 3 



TITLE 1 


0/05/83 TESTU 


.LIST 




PUBLIC 


POSTI+ 


PUBLIC 


E MSG 


PUBLIC 


KBD RESET 


PUBLIC 


BEEP 


PUBLIC 


ERR BEEP 


PUBLIC 


E MSG 


PUBLIC 


DDS 


PUBLIC 


P MSG 


PUBLIC 


PRT SEG 


PUBLIC 


DUMMY RETURN 1 


PUBLIC 


on 


PUBLIC 


INT 287 


PUBLIC 


RE DIRECT 



0000 








0000 


8B 


EE 




0002 


F8 


0019 


R 


0005 


IE 






0006 


Ffi 


OOAA 


R 


0009 


AO 


0010 


R 


OOOC 


?U 


01 




OOOE 


75 


07 




0010 








0010 


t-A 






00 n 


AO 


0015 


R 


00 14 


L6 


80 




0016 


1-4 






0017 








0017 


1 1- 






0018 


03 






0019 








0019 








0019 


?e 


8A 04 


001C 


46 






001D 


50 






001 E 


E8 


0000 


E 


0021 


58 






0022 


3C 


OA 




0024 


75 


F3 




0026 


C3 






0027 









0027 






0027 


9(; 




0028 


hA 




0029 


IF 




002A 


F8 


OOAA R 


002D 


OA 


F6 


002F 


74 


14 


0031 






0031 


B3 


06 


0033 


F8 


0057 R 


0036 


F? 


FE 


0038 


FF 


CE 


003A 


75 


F5 


003C 


80 


3E 0012 R 01 


0041 


75 


02 


0043 


FB 


CB 


0045 






0045 


B3 


01 


0047 


F8 


0057 R 


004A 


F? 


FE 


004C 


FF 


CA 


004 E 


75 


F5 


0050 


F? 


FE 


0052 


E2 


FE 


0054 


11- 




0055 


90 




0056 


C3 




0057 






0057 






0057 


BO 


B6 


0059 


F6 


43 


005B 


FB 


00 


005D 


B8 


0533 


0060 


F6 


42 


0062 


EB 


00 


0064 


8A 


C4 


0066 


F6 


42 


0068 


E4 


61 


006A 


8A 


EO 


006C 


FB 


00 


006E 


OC 


03 


0070 


F6 


61 


0072 


?B 


09 


0074 


F? 


FE 


0076 


FE 


CB 


0078 


75 


FA 



EXTRN 

EXTRN 

EXTRN 

EXTRN 

ASSUME 

PC ST 4: 



PRT_HEX:NEAR 

XPC_BYTE:NEAR 

XM1T_8042:NEAR 

0BF32:NEAR 

CS:CODE,DS:ABSO 



THIS SUBROUTINE WILL PRINT A MESSAGE ON THE DISPLAY 

ENTRY REQUIREMENTS: 

SI = OFFSET(ADDRESS) OF MESSAGE BUFFER 

CX = MESSAGE BYTE COUNT 

MAXIMUM MESSAGE LENGTH IS 36 CHARACTERS 



E MSG 


PROC 


NEAR 




MOV 


BP,S1 




CALL 


P MSG 




PUSH 


DS 


ASSUME 


DS:DATA 






CALL 


DDS 




MOV 


AL,BYT£ PTR FQU 1 P FLAG 




AND 


AL,01H 




JNZ 


NOT ON 


MFC HALT: 






CLI 






MOV 


AL.MFG ERR FLAG 




OUT 


MEG PORT.AL 




HLT 




NOT ON: 








POP 
RET 


DS 


E MSG 


ENDP 




P MSG 


PROC 


NEAR 


G12A: 


MOV 


AL,CS:[S1 ] 




INC 


SI 




PUSH 


AX 




CALL 


PRT HEX 




POP 


AX 




CMP 


AL, 10 




JNE 


G12A 




RET 




P MSG 


ENDP 





; LOOP/HALT ON ERROR 

; SWITCH ON? 

; NO - RETURN 

; YES - HALT SYSTEM 

; RECOVER ERROR INDICATOR 

; SET INTO MFG PORT 

; HALT SYS 

; WRITE_MSG: 



PUT CHAR IN AL 

POINT TO NEXT CHAR 

SAVE PRINT CHAR 

CALL VIDEO_IO 

RECOVER PRINT CHAR 

WAS IT LINE FEED? 

NO, KEEP PRINTING STRING 



INITIAL RELIABILITY TEST -- SUBROUTINES 



ASSUME CS: CODE, DS: DATA 



SUBROUTINES FOR POWER ON DIAGNOSTICS 



THIS PROCEDURE WILL ISSUE ONE LONG TONE (3 SECS) AND ONE OR 
MORE SHORT TONES (1 SEC) TO INDICATE A FAILURE ON THE PLANAR 
BOARD, A BAD RAM MODULE, OR A PROBLEM WITH THE CRT. 
ENTRY PARAMETERS: 

DH = NUMBER OF LONG TONES TO BEEP 
DL = NUMBER OF SHORT TONES TO BEEP. 



ERR 


BEEP PROC 


NEAR 




PUSHF 
CLI 






PUSH 


DS 




CALL 


DDS 




OR 


DH,DH 




JZ 


G3 


G1 : 








MOV 


BL,6 




CALL 


BEEP 


G2: 


LOOP 


G2 




DEC 


DH 




JNZ 


G1 




CMP 


MFG TST. 1 




JNE 


G3 




JMP 


MFG HALT 


G3 : 








MOV 


BL, 1 




CALL 


BEEP 


G4: 


LOOP 


G4 




DEC 


DL 




JNZ 


G3 


G5: 


LOOP 


G5 


06: 


LOOP 


G6 




POP 


DS 




POPF 






RET 




ERR_ 


BEEP 


ENDP 




ROUTINE 


TO SOUND B 


BEEP PROC 


NEAR 




MOV 


AL, 10110111 




OUT 


TIMER+3,AL 




JMP 


SHORT $+2 




MOV 


AX,533H 




OUT 


TIMER+2,AL 




JMP 


SHORT $+2 




MOV 


AL,AH 




OUT 


TIMER+?,AI 






AL, PORT B 




MOV 


AH,AL 




JMP 


SHORT $+2 




OR 


AL,03 




OUT 


PORT B,AL 




SUB 


CX.CX 


G7: 


LOOP 


G7 




DEC 


BL 




JNZ 


G7 



SAVE FLAGS 

DISABLE SYSTEM INTERRUPTS 

SAVE DS REG CONTENTS 



ANY LONG ONES TO BEEP 

NO, DO THE SHORT ONES 

LONG_BEEP: 

COUNTER FOR BEEPS 

DO THE BEEP 

DELAY BETWEEN BEEPS 

ANY MORE TO DO 

DO IT 

MFG TEST MODE? 

YES - CONTINUE BEEPING SPEAKER 

STOP BLINKING LED 

SHORT_BEEP: 

COUNTER FOR A SHORT BEEP 

DO THE SOUND 

DELAY BETWEEN BEEPS 

DONE WITH SHORTS 

DO SOME MORE 

LONG DELAY BEFORE RETURN 

RESTORE ORIG CONTENTS OF DS 
RESTORE FLAGS TO ORIG SETTINGS 
RETURN TO CALLER 



SEL TIM 2, LSB, MSB, BINARY 
WRITE THE TIMER MODE REG 
10 DELAY 

DIVISOR FOR 896 HZ 
WRITE TIMER 2 CNT - LSB 
10 DELAY 

WRITE TIMER 2 CNT - MSB 

GET CURRENT SETTING OF PORT 

SAVE THAT SETTING 

10 DELAY 

TURN SPEAKER ON 

SET CNT TO WAIT 500 MS 
DELAY BEFORE TURNING OFF 
DELAY CNT EXPIRED? 
NO - CONTINUE BEEPING SPK 



Test 4 5-69 



007A 8A C4 

007C E6 61 

007E C3 
007F 



MOV 

OUT 

RET 

BEEP ENDP 



; RECOVER VALUE OF PORT 
; RETURN TO CALLER 



007F 






007F 


RO 


FF 


0081 


FR 


OOOO E 


0084 


E3 


23 


0086 


30 


FA 


0088 


lb 


IF 


008A 


BO 


FD 


008C 


FA 


21 


008E 


C6 


06 006B R 00 


0093 


FB 




009i) 


83 


OA 


0096 


?B 


C9 


0098 


Ffi 


06 006B R 02 


0090 


7'j 


06 


009F 


F? 


F7 


00A1 


FF 


CB 


00A3 


75 


F3 


O0A5 


Fi| 


60 


00A7 


SA 


D8 


00A9 


C3 




OOAA 






OOAA 






OOAA 


M) 




OOAB 


B8 




OOAE 


8E 


D8 


OOBO 


'j8 




00B1 


C3 




O0B2 







THIS PROCEDURE WILL SEND A SOFTWARE RESET TO THE KEYBOARD. 
SCAN CODE 'AA' SHOULD BE RETURNED TO THE CPU. 
SCAN CODE -65' IS DEFINED FOR MANUFACTURING TEST 



SET KEYBOARD RESET COMMAND 
GO ISSUE THE COMMAND 
GO IF ERROR 



ENABLE KEYBOARD INTERRUPTS 
WRITE 8259 I MR 
RESET INTERRUPT INDICATOR 
ENABLE INTERRUPTS 

TRY FOR 400 MSEC 
SETUP INTERRUPT TIMEOUT CNT 
DID A KEYBOARD I NTR OCCUR? 
YES - READ SCAN CODE RETURNED 
NO - LOOP TILL TIMEOUT 

TRY AGAIN 



KBD 


RESET 


PROC NEAR 




MOV 


AL.OFFH 




CALL 


XMIT 8042 




JCXZ 


G13 




CMP 


AL.KB ACK 




JNZ 


G13 




MOV 


AL,OFDH 




OUT 


INTA01,AL 




MOV 


INTR FLAG,0 




STI 






MOV 


BL, 10 




SUB 


CX.CX 


Gil 


TEST 


INTR FLAG,02H 




JNZ 


G12 




LOOP 


Gil 




DEC 


BL 




JNZ 


Gil 


G1?: 


IN 


AL, PORT A 




MOV 


BL,AL 


G13: 


RET 




KBD_ 


RESET 


ENDP 


DOS 


PROC 


NEAR 




PUSH 


AX 




MOV 


AX, DATA 




MOV 


DS.AX 




POP 


AX 




RET 




DOS 


ENDP 





READ KEYBOARD SCAN CODE 
SAVE SCAN CODE JUST READ 
RETURN TO CALLER 



O0B2 


IF 




O0B3 


52 




00B4 


50 




O0B5 


53 




00B6 


L8 


OOAA R 


00B9 


BO 


OB 


OOBB 


K6 


20 


OOBD 


FB 


00 


OOBF 


90 




OOCO 


F4 


20 


00C2 


HA 


EO 


0004 


OA 


C4 


00C6 


/5 


04 


00C8 


B4 


FF 


OOCA 


FB 


2A 


OOCC 






OOCC 


BO 


OB 


OOCE 


F6 


AO 


OODO 


FB 


00 


00D2 


F4 


AO 


O0D4 


8A 


F8 


00D6 


OA 


FF 


00D8 


74 


OE 


OODA 


E4 


A1 


OODC 


OA 


C7 


OODE 


FB 


00 


OOEO 


F6 


Al 


O0E2 


BO 


20 


00E4 


FB 


00 


00E6 


F6 


AO 


00E8 


F4 


21 


OOEA 


FB 


00 


OOEC 


OA 


C4 


OOEE 


Ffi 


21 


ODFO 


FB 


00 


00 F2 


RO 


20 


00 F4 


Ffi 


20 


00F6 






00F6 


88 


26 006B 


00 FA 


5B 




OOFB 


58 




00 FC 


5A 




OOFD 


IF 




OOFE 






OOFE 


CF 




OOFF 







TEMPORARY INTERRUPT SERVICE ROUTINE 

1. THIS ROUTINE IS ALSO LEFT IN PLACE AFTER THE 
POWER ON DIAGNOSTICS TO SERVICE UNUSED 
INTERRUPT VECTORS, LOCATION 'INTR_FLAG' WILL 
CONTAIN EITHER: 1. LEVEL OF HARDWARE INT. THAT 
CAUSED CODE TO BE EXEC. 

2. 'FF' FOR NON-HARDWARE INTERUPTS THAT WAS 
EXECUTED ACCIDENTLY. 



D1 1 PROC 


NEAR 




ASSUME 


DS:DATA 




PUSH 


DS 




PUSH 


DX 




PUSH 


AX 




PUSH 


BX 




CALL 


DDS 




MOV 


AL.OBH 




OUT 


INTAOO.AL 




JMP 


SHORT $+2 




NOP 






IN 


AL, INTAOO 




MOV 


AH,AL 




OR 


AL,AH 




JNZ 


HW INT 




MOV 


AH,OFFH 




JMP 


SHORT SET_INTR_ 


FLAG 


HW INT: 






MOV 


AL,OBH 




OUT 


INTBOO,AL 




JMP 


SHORT $+2 




IN 


AL, INTBOO 




MOV 


BH,AL 




OR 


BH,BH 




JZ 


NOT SEC 




IN 


AL, INTB01 




OR 


AL,BH 




JMP 


SHORT $+2 




OUT 


INTB01,AL 




MOV 


AL.EOI 




JMP 


SHORT $+2 




OUT 


INTBOO, AL 




NOT SEC: IN 


AL, INTA01 




JMP 


SHORT $+2 




OR 


AL,AH 




OUT 


INTA01,AL 




JMP 


SHORT $+2 




MOV 


AL, EOl 




OUT 


INTAOO.AL 




SET INTR FLAG: 






MOV 


INTR FLAG. AH 




POP 


BX 




POP 


AX 




POP 


DX 




POP 


DS 




DUMMY RETURN 1: 






~ IRET~ 






D11 ENDP 







SAVE REG AX CONTENTS 

SET DATA SEGMENT 

READ IN-SERVICE REG 

(FIND OUT WHAT LEVEL BEING 

10 DELAY 

SERVICED) 

GET LEVEL 

SAVE IT 

00? (NO HARDWARE I SR ACTIVE) 



SET FLAG TO FF IF NON-HDWARE 



READ IN-SERVICE REG INT CHIP 2 
10 DELAY 

CHECK THE SECOND INT CHIP 
SAVE IT 

CONTINUE IF NOT 

GET SECOND INT MASK 

MASK OFF LVL BEING SERVICED 

10 DELAY 



GET MASK VALUE 

10 DELAY 

MASK OFF LVL BEING SERVICED 



SET FLAG 

RESTORE REG AX CONTENTS 

; NEED I RET FOR VECTOR TABLE 



OOFF 
OOFF 
0100 
0102 


50 
32 
E6 


CO 
FO 


0104 
0106 
0108 


BO 
E6 
E6 


20 
AO 
20 


010A 
010B 


58 
CD 


02 



■-HARDWARE INT 13 (LEVEL 75H) 

SERVICE X287 INTERRUPTS 

THIS ROUTINE FIELDS X287 INTERRUPTS AND CONTROL 
IS PASSED TO THE NMI INTERRUPT HANDLER FOR 
COMPATABILITY. 



INT_287 PROC NEAR 

PUSH AX 

XOR AL,AL 

OUT X287.AL 



MOV 
OUT 
OUT 



AL, EOl 

INTBOO,AL 

INTAOO.AL 



SAVE AX 

REMOVE THE INT REQUEST 

ENABLE THE INTERRUPT 
THE SLAVE 
THE MASTER 



5-70 Test 4 



--HARDWAKE INT 9 (LEVEL 71H) - 

REDIRECT SLAVE INTERRUPT 9 TO INTERRUPT LEVEL 2 
THIS ROUTINE FIELDS LEVEL 9 INTERRUPTS AND 
CONTROL IS PASSED TO MASTER INTERRUPT LEVEL : 



OTOE 






GIGE 


SO 




G10F 


BO 


?0 


om 


F6 


AO 


0113 


■)8 




OllU 


CD 


OA 


0116 


CF 




0117 







RE_DIRECT PROC NEAR 

PUSH AX 

MOV AL,EO 

OUT INTBO( 

POP AX 



EOl TO SLAVE INT CONTROLLER 

RESTORE AX 

GIVE CONTROL TO HARDWARE LEVEL 2 



0117 


8A C6 


0119 


E8 0000 


01 IC 


8A C2 


OllE 


E8 0000 


0121 


BO 30 


G123 


E8 0000 


0126 


BO 20 


0128 


E8 0000 


012B 


03 


012C 




012C 





PRT_SEG PROC 
MOV 
CALL 
MOV 
CALL 
MOV 
CALL 
MOV 
CALL 
RET 
PRT__SEG ENDP 
CODE ENDS 
END 



NEAR 
AL,DH 
XPC_BYTE 
AL, DL 
XPC BYTE 
'^.L,"^0' 
PRT HEX 



GET MSB 
LSB 

PRINT A ' 
SPACE 



Test 4 5-71 



5-72 Test 4 



TITLE 12/16/83 TEST5 


EXCEPTION 


.LIST 






PUBLIC 


POSTS 




PUBLIC 


EXC 00 




PUBLIC 


EXC 01 




PUBLIC 


EXC 02 




PUBLIC 


EXC 03 




PUBLIC 


EXC Ok 




PUBLIC 


EXC 05 




PUBLIC 


EXC 06 




PUBLIC 


EXC 07 




PUBLIC 


EXC 08 




PUBLIC 


EXC 09 




PUBLIC 


EXC 10 




PUBLIC 


EXC 11 




PUBLIC 


EXC 12 




PUBLIC 


EXC 13 




PUBLIC 


EXC 14 




PUBLIC 


EXC_15 




PUBLIC 


EXC_16 




PUBLIC 


EXC 17 




PUBLIC 


EXC_18 




PUBLIC 


EXC_19 




PUBLIC 


EXC 20 




PUBLIC 


EXC 21 




PUBLIC 


EXC 22 




PUBLIC 


EXC_23 




PUBLIC 


EXC 21 




PUBLIC 


EXC 25 




PUBLIC 


EXC 26 




PUBLIC 


EXC 27 




PUBLIC 


EXC 28 




PUBLIC 


EXC 29 




PUBLIC 


EXC 30 




PUBLIC 


EXC_31 




PUBLIC 


SYS 32 




PUBLIC 


SYS 33 




PUBLIC 


SYS 34 




PUBLIC 


SYS_35 




PUBLIC 


SYS_36 




PUBLIC 


SYS_37 




PUBLIC 


SYS_38 





INTERRUPT HANDLER 



EXCEPTION INTERRUPT ROUTINE 



ASSUME CS:CODE, DS:ABSO 



0000 






0000 






0000 


BO 90 




0002 


E9 0007 R 




0005 






0005 


BO 91 




0007 


E9 O0D7 R 




OOOA 






OOOA 


BO 92 




OOOC 


E9 00D7 R 




000 F 






OOOF 


BO 93 




0011 


E9 00D7 R 




001U 






0014 


BO 94 




0016 


E9 O0D7 R 




0019 






0019 


06 




001A 


B8 0048 




001D 


8E CO 




001 F 


28 FF 




0021 


26: C7 05 


0000 


0026 


26: C7 45 


02 7 


002C 


07 




002D 


BO 95 




002F 


E9 O0D7 R 




0032 






0032 


BO 96 




0034 


E9 O0D7 R 




0037 






0037 


BO 97 




0039 


E9 O0D7 R 




003C 






003C 


BO 98 




003E 


E9 00D7 R 




0041 






0041 


BO 99 




0043 


E9 O0D7 R 




0046 






0046 


BO 9A 




0048 


E9 00D7 R 




004B 






004B 


BO 9B 




004D 


E9 0007 R 




0050 






0050 


BO 9C 




0052 


E9 0007 R 




0055 






0055 


BO 9D 




0057 


EB 7E 90 




005A 






005A 


BO 9E 




005C 


EB 79 90 




005F 






005F 


BO 9F 




0061 


EB 74 90 




0064 






0064 


BO AG 




0066 


EB 6F 90 




0069 






0069 


BO A1 




006B 


EB 6A 90 




006E 






006E 


BO A2 





P0ST5: 








EXC_00 : 










MOV 


AL,90H 






JMP 


TEST_EXC 




EXC_01: 










MOV 


AL,91H 






JMP 


TEST_EXC 




EXC_02 : 










MOV 


AL,92H 






JMP 


TEST_EXC 




EXC_03: 










MOV 


AL,93H 






JMP 


TEST_EXC 




EXC_04 : 










MOV 


AL,94H 






JMP 


TEST_EXC 




EXC_05 : 










PUSH 


ES 






MOV 


AX, ES TEMP 






MOV 


ES,AX 








BOUND PARAMETERS 
DI,DI 




' ' 


SUB 






MOV 


WORD PTR ES:[D 


],o 




MOV 


WORD PTR ES:[D 


+2] 




POP 


ES 






MOV 


AL,95H 






JMP 


TEST_EXC 




EXC_06: 










MOV 


AL,96H 






JMP 


TEST_EXC 




EXC_07 : 










MOV 


AL,97H 






JMP 


TEST_EXC 




EXC_08 : 










MOV 


AL,98H 






JMP 


TEST_EXC 




EXC_09 : 










MOV 


AL,99H 






JMP 


TEST_EXC 




EXC_10: 










MOV 


AL,9AH 






JMP 


TEST_EXC 




EXC_1 1 : 










MOV 


AL, 9BH 






JMP 


TEST_EXC 




EXC_12: 










MOV 


AL,9CH 






JMP 


TEST_EXC 




EXC_13: 










MOV 


AL,90H 






JMP 


TEST_EXC 




EXC_14: 










MOV 


AL,9EH 






JMP 


TEST_EXC 




EXC_15: 










MOV 


AL,9FH 






JMP 


TEST_EXC 




EXC_1 6 : 










MOV 


AL.OAOH 






JMP 


TEST_EXC 




EXC_1 7 : 










MOV 


AL.0A1H 






JMP 


TEST_EXC 




EXC_18: 










MOV 


AL,0A2H 





LOAD ES REGISTER 



07FFFH ; SET SECOND TO 07FFFH 



;<><><>SET CHECKPOINTOooo 



Test 5 5-73 



0070 


EB 


65 


90 


0073 








0073 


BO 


A2 




0075 


EB 


60 


90 


0078 








0078 


BO 


A3 




007A 


EB 


5B 


90 


007D 








007D 


BO 


AH 




007 F 


EB 


56 


90 


0082 








0082 


BO 


A5 




008U 


EB 


51 


90 


0087 








0087 


BO 


A6 




0089 


EB 


UC 


90 


008C 








008C 


BO 


AT 




008E 


EB 


U7 


90 


0091 








0091 


BO 


A8 




0093 


EB 


42 


90 


0096 








0096 


BO 


A9 




0098 


EB 


3D 


90 


009B 








009B 


BO 


AA 




009D 


EB 


38 


90 


OOAO 








OOAO 


BO 


AB 




00A2 


EB 


33 


90 


00A5 








00A5 


BO 


AC 




00A7 


EB 


2E 


90 


OOAA 








OOAA 


BO 


AD 




OOAC 


EB 


29 


90 


OOAF 








OOAF 


BO 


AE 




00B1 


EB 


24 


90 


00B4 








0064 


BO 


AF 




00 B6 


EB 


IF 


90 


00B9 








00B9 


BO 


BO 




OOBB 


EB 


lA 


90 


OOBE 








OOBE 


BO 


Bl 




OOCO 


EB 


15 


90 


0OC3 








0OC3 


BO 


B2 




00C5 


EB 


10 


90 


00C8 








00C8 


BO 


B3 




OOCA 


EB 


OB 


90 


OOCD 








OOCD 


BO 


B4 




OOCF 


EB 


06 


90 


00 D2 








00D2 


BO 


B5 




00D4 


EB 


01 


90 


00D7 








0OD7 


E6 


80 




0OD9 


3C 


AE 




OODB 


77 


22 




OODD 


IE 






CODE 


50 






OODF 


B8 


0008 


00E2 


8E 


08 




OOE/l 


C7 


06 


0048 FFFF 


OOEA 


C6 


06 


004D 93 


OOEF 


B8 


0048 


00F2 


8E 


CO 




OOF^ 


58 






00F5 


IF 






00F6 


5A 






0OF7 


59 






OOFS 


51 






0OF9 


83 


F9 


40 


OOFC 


75 


01 




OOFE 


52 






OOFF 








OOFF 


86 


EO 




0101 


EH 


8B 




0103 


3A 


C4 




0105 


74 


OE 




0107 








0107 


Ek 


80 




0109 


3C 


3B 




010B 


72 


01 




0100 


CF 






010E 








010E 


86 


EO 




0110 


E6 


80 




0112 


Fi* 






0113 


EB 


F9 




0115 








0115 


2A 


CO 




0117 


E6 


88 




0119 


B8 


0100 


one 


CF 






011D 











JMP 


TEST_EXC 




EXC_19: 










MOV 


AL,0A2H 






JMP 


TEST_EXC 




EXC_20: 










MOV 


AL,0A3H 






JMP 


TEST_EXC 




EXC_21 : 










MOV 


Al ,0A4H 






JMP 


TEST_EXC 




EXC_22: 










MOV 


AL,0A5H 






JMP 


TEST_EXC 




EXC_23: 










MOV 


AL,0A6H 






JMP 


TEST_EXC 




EXC_24: 










MOV 


AL,0A7H 






JMP 


TEST_EXC 




EXC_25 : 










MOV 


AL,0A8H 






JMP 


TEST_EXC 




EXC_26 : 










MOV 


AL,0A9H 






JMP 


TEST_EXC 




EXC_27: 










MOV 


AL.OAAH 






JMP 


TEST_EXC 




EXC_28 : 










MOV 


AL.OABH 






JMP 


TEST_EXC 




EXC_29: 










MOV 


AL,OACH 






JMP 


TEST_EXC 




EXC_30: 










MOV 


AL,OADH 






JMP 


TEST_EXC 




EXC_3 1 : 










MOV 


AL.OAEH 






JMP 


TEST_EXC 




SYS_32: 










MOV 


AL.OAFH 






JMP 


TEST_EXC 




SYS_33: 










MOV 


AL.OBOH 






JMP 


TEST_EXC 




SYS_34: 










MOV 


AL,0B1H 






JMP 


TEST_EXC 




SYS_35: 










MOV 


AL,0B2H 






JMP 


TEST_EXC 




SYS_36: 










MOV 


AL,0B3H 






JMP 


TEST_EXC 




SYS 37: 










MOV 


AL,0B4H 






JMP 


TEST_EXC 




SYS_38: 










MOV 


AL,0B5H 






JMP 


TEST_EXC 




TEST_eXC: 








CUT 


MFC PORT.AL 






CMP 


AL.OAEH 






JA 


TEST_EXCO 






PUSH 


DS 






PUSH 








MOV 


AX,GDT PTR 






MOV 


DS,AX 






MOV 


DS:ES TEMP.SEG LIMIT 




MOV 


BYTE PTR DS:(ES TEMP 




MOV 


AX, ES TEMP 






MOV 


ES,AX 






POP 


AX 






POP 


DS 






POP 


DX 






POP 


CX 






PUSH 


CX 






CMP 


CX,SYS ROM CS 






JNZ 


TEST EXCO 






PUSH 


DX 




TEST_EXC0: 








XCHG 


AH,AL 








AL,DMA PAGE+OAH 






CMP 


AL.AH 






JZ 


TEST_EXC3 




TEST_EXC1 : 










AL,MFG PORT 






CMP 


AL,03BH 






JB 


TEST_EXC2 






IRET 






TEST_EXC2: 








XCHG 


AH,AL 






OUT 


MFG_P0RT,AL 






HLT 








JMP 


TEST_EXC2 




TEST_EXC3: 








SUB 


AL,AL 






OUT 


DMA PAGE+OAH, AL 






MOV 


AX,0100H 






IRET 






CODE 


ENDS 
END 







GO TEST IF EXCEPTION WAS EXPECTED 



; EXPECTED 



. EXPECTED 

. EXPECTED 

. EXPECTED 

• EXPECTED 

. EXPECTED 

. EXPECTED 

- EXPECTED 



OUTPUT THE CHECKPOINT 
CHECK FOR EXCEPTION 
GO I F A SYSTEM I NT 

SAVE THE CURRENT DATA SEGMENT 



; RESTORE REGS 

; CHECK I F CODE SEG SECOND ON STACK 



SAVE THE CHECKPOINT 



INSURE SYSTEM HALT 
CLEAR DMA PAGE 

INSTR EXPECTED I NT5 



5-74 Tests 



TITLE 01/03/84 TEST6 POWER ON SELF TEST 
.LIST 

STGTST_CNT 

ROM_ERR 

B00T_STRAP_1 

XMIT_80U2 

P0ST6 



PUBLIC 
PUBLIC 
PUBLIC 
PUBLIC 
PUBLIC 
PUBLIC 



H5 



EXTRN 


EO:NEAR 


EXTRN 


E MSG:NEAR 


EXTRN 


KBD RESET: NEAR 


EXTRN 


XPC BYTE: NEAR 


EXTRN 


FliNEAR 


EXTRN 


VECTOR TABLE: NEAR 


EXTRN 


NMI INT: NEAR 


EXTRN 


PRINT SCREEN 1 :NEAR 


EXTRN 


BLINK INT:NEAR 


EXTRN 


PRT HEX: NEAR 


EXTRN 


F3B:NEAR 


EXTRN 


PRT SEG:NEAR 


EXTRN 


XPC BYTE: NEAR 


EXTRN 


El: NEAR 


EXTRN 


ROM CHECK: NEAR 


EXTRN 


ROS CHECKSUM: NEAR 


EXTRN 


SEEK: NEAR 


EXTRN 


F3:NEAR 


EXTRN 


ERR BEEP: NEAR 


EXTRN 


P MSG:NEAR 


EXTRN 


START 1:NEAR 


EXTRN 


F4:NEAR 


EXTRN 


Fl*E:NEAR 


EXTRN 


DOS: NEAR 


EXTRN 


F3A:NEAR 


EXTRN 


DISK BASE: NEAR 


EXTRN 


F3D:NEAR 


EXTRN 


PROC SHUTDOWN: NEAR 


EXTRN 


SYSINIT1:NEAR 


EXTRN 


PROT PRT HEX: NEAR 


EXTRN 


DISK IO:NEAR 


EXTRN 


HD INT: NEAR 


EXTRN 


C8042:NEAR 


EXTRN 


BOOT_INVA:NEAR 


PAGE 






ASSUME CS:CODE 




ASSUME DS:DATA 



0000 






0000 


8B 


D9 


0002 


E4 


61 


0004 


EB 


00 


0006 


OC 


OC 


0008 


E6 


61 


OOOA 


EB 


00 


OOOC 


24 


F3 


OOOE 


E6 


61 


0010 


BA 


0001 


0013 


B9 


0010 


0016 


2B 


FF 


0018 


2B 


F6 


OOIA 


8B 


C2 


OOIC 


AB 




OOID 


2B 


F6 


001 F 


AD 




0020 


33 


C2 


0022 


74 


03 


0024 


E9 


00C5 R 


0027 


Dl 


E2 


0029 


E2 


EB 


002B 


2B 


FF 


002D 


2B 


F6 


002F 


2B 


CO 


0031 


BA 


FFOO 


0034 


AB 




0035 


BF 


0001 


0038 


C6 


05 FF 


003B 


2B 


FF 


003D 


8B 


05 


003 F 


33 


C2 


0041 


74 


03 


0043 


E9 


00C5 R 


0046 


2B 


FF 


0048 


2B 


CO 


004A 


BA 


OOFF 


004D 


AB 




004 E 


2B 


FF 


0050 


C6 


05 FF 


0053 


2B 


FF 


0055 


8B 


05 


0057 


33 


C2 


0059 


75 


6A 


005B 


E6 


89 


0050 


86 


C4 


005F 


EB 


00 


0061 


E6 


8A 



THIS SUBROUTINE PERFORMS A READ/WRITE STORAGE TEST ON A BLOCK 
OF STORAGE. 

ENTRY REQUIREMENTS: 

ES = ADDRESS OF STORAGE SEGMENT BEING TESTED 
DS = ADDRESS OF STORAGE SEGMENT BEING TESTED 
CX = WORD COUNT OF STORAGE BLOCK TO BE TESTED 

EXIT PARAMETERS: 

ZERO FLAG = I F STORAGE ERROR ( DATA COMPARE OR PAR I TY 
CHECK). AL=0 DENOTES A PARITY CHECK. ELSE AL=XOR'ED 
BIT PATTERN OF THE EXPECTED DATA PATTERN VS THE ACTUAL 
DATA READ. 

AX, BX,CX, DX,DI, AND 31 ARE ALL DESTROYED. 



OUT 
JMP 
AND 
OUT 



PROC NEAR 

BX,CX 

AL, PORT_B 

SHORT $+2 

Al , RAM_PAR_OFF 

PORT_B,AL 

SHORT $+2 

AL,RAM_PAR_ON 

PORT_B,AL 





MOV 


DX.OOOIH 




MOV 


CX,16 


:^■. 


SUB 


DI,OI 




SUB 


SI ,SI 




MOV 


AX,DX 




STOSW 






SUB 


SI ,SI 




LODSW 






XOR 


AX,DX 




JZ 


CI A 




JMP 


C13 


n_A: 


SHL 


DX, 1 




LOOP 


CI 






CAS LINES FOR HIGH 
DI,DI 




SUB 




SUB 


SI, SI 




SUB 


AX, AX 




MOV 


DX,OFFOOH 




STOSW 






MOV 


Dl,l 




MOV 


BYTE PTR [Dl ].OFFH 




SUB 


DI,DI 




MOV 


AX, WORD PTR (Dl ] 




XOR 


AX,DX 




JZ 


CI B 




JMP 


C13 


>1_B: 


SUB 


DI,DI 




SUB 


AX, AX 




MOV 


DX,OOOFFH 




STOSW 






SUB 


DI,DI 




MOV 


BYTE PTR [Dl ],OFFH 




SUB 


DI,DI 




MOV 


AX, WORD PTR [Dl ] 




XOR 


AX,DX 




JNZ 


C13 



SAVE WORD COUNT OF BLOCK TO TEST 



WRITE THE IN IT DATA PATTERN 
ROLL 16 BIT POSITIONS 
START AT BEGIN ING OF BLOCK 
INITIALIZE DESTINATION POINTER 
GET THE PATTERN 
STORE DATA PATTERN 
START AT BEGINNING 
GET THE FIRST WRITTEN 
INSURE DATA AS EXPECTED 



EXIT IF NOT 

SHI FT BIT TO NEXT 

LOOP TILL DONE 



BIT POSITION 



START AT BEG IN ING OF BLOCK 
INITIALIZE DESTINATION POINTER 
WRITE 

STORE DATA PATTERN 

AT THE FIRST ODD LOCATION 

WRITE A BYTE OF FF 



EXIT IF NOT 



STORE DATA PATTERN 

AT THE FIRST EVEN LOCATION 

WRITE A BYTE OF FF 

BUS SETTLE 

GET THE DATA 

CHECK THE FIRST WRITTEN 

EXIT IF NOT 



OUT DMA_PAGE+8,AL 

XCHG AL,AH 

JMP SHORT $+2 

OUT DMA_PAGE+9,AL 



Test 6 5-75 



■ CHECK 10 OR BASE RAM 



0063 


F4 


61 


006b> 


?14 


CO 


0067 


86 


Ci( 


0069 


F't 


87 


006B 


22 


EO 


006D 


F4 


8A 


006 F 


86 


CU 


0071 


LU 


89 


0073 


75 


50 


0075 


BA 


AA55 


0078 


2B 


FF 


007A 


?B 


F6 


007C 


8B 


CB 


007E 


8B 


C2 


0080 


F3/ AB 


0082 


8B 


CB 


008*1 


2B 


F6 


0086 


AD 




0087 


33 


C2 


0089 


/5 


3A 


008B 


t2 


F9 


008D 


F6 


89 


008F 


86 


Cit 


0091 


FB 


00 


0093 


E6 


8A 


0095 


EH 


61 


0097 


?H 


CO 


0099 


86 


C4 


009B 


FM 


87 


009D 


22 


EO 


009F 


E4 


8A 


00A1 


86 


C4 


00A3 


EU 


89 



00A5 75 IE 



00A7 


23 


D2 


00A9 


74 


1A 


OOAB 


81 


FA 55AA 


OOAF 


7*+ 


OF 


0081 


81 


FA 0101 


00B5 


74 


OF 


00B7 


BA 


55AA 


OOBA 


LB 


BC 


OOBC 


2B 


D2 


OOBE 


EB 


B8 


OOCO 


BA 


0101 


00C3 


LB 


B3 


00C5 






00C5 


03 




00C6 


?B 


FF 


00C8 


8B 


CB 


OOCA 


01 


E9 


OOCC 


B8 


5555 


OOCF 


AB 




0000 


B8 


AAAA 


00D3 


AB 




00D4 


h2 


F6 


00D6 


?B 


F6 


00D8 


8B 


CB 


OODA 


D1 


E9 


OODC 


AO 




OODD 


3 5 


5555 


OOEO 


75 


E3 


00E2 


AO 




00E3 


35 


AAAA 


00E6 


75 


DD 


00E8 


E2 


F2 


OOEA 


F6 


89 


OOEC 


86 


CU 



IN 


AL, PORT B 


AND 


AL, PARITY ERR 


XCHG 


AL,AH 




AL.DMA PAGE+6 


AND 


AH,AL 


RESTORE AX 


IN 


AL.DMA PAGE+9 


XCHG 


AL.AH 


IN 


AL,DMA_PAGE+8 


- PAR 


TY ERROR EXIT 


JNZ 


C13 


MOV 


DX,0AA55H 


SUB 


DI.DI 


SUB 


SI, SI 


MOV 


CX,BX 


MOV 


AX,DX 


REP 


STOSW 


MOV 


CX,BX 


SUB 


SI. SI 


LODSW 




XOR 


AX,DX 


JNZ 


C13 


LOOP 


C6 



CHECK FOR 10/PAR CHECK 
STRI P UNWANTED BITS 
SAVE ERROR 
CHECK FOR R/W OR 10 ERR 



GO IF YES 

WRITE THE I NIT DATA PATTERN 

START AT BEGIN I NG OF BLOCK 

INITIALIZE DESTINATION POINTER 

SETUP BYTE COUNT FOR LOOP 

GET THE PATTERN 

STORE 64K BYTES ( 32K WORDS) 

SET COUNT 

START AT BEGINNING 

GET THE FIRST WRITTEN 

INSURE DATA AS EXPECTED 

EXIT IF NOT 

LOOP TILL DONE 



- TEMP SAVE FOR AX (PUSH NOT ALLOWED) 

OUT DMA_PAGE+8.AL ; SAV 

XCHG AL.AH ; 

JMP SHORT $+2 ; 

OUT DMA_PAGE+9,AL ; 



■ CHECK 10 OR BASE RAM 

N AL, PORT_B 

^ND AL.PARITY_ERR 

CCHG AL,AH 

N AL,DMA_PAGE+6 

kND AH,AL 



•- RESTORE AX 

I N AL, DMA_PAGE+9 
XCHG AL.AH 
I N AL. DMA_PAGE+8 

■-- PARITY ERROR EXIT 

JNZ 013 

■- CHECK FOR END OF 6UK BLOCK 

AND DX.DX 

JZ C1U 

■- SETUP NEXT PATTERN 
CMP DX,055AAH 



JZ 
CMP 



C9 

DX.OIOIH 
CIO 
DX,055AAH 



LAST PATTERN = 0000 



CHECK FOR 10/PAR CHECK 
STRI P UNWANTED BITS 
SAVE ERROR 
CHECK FOR R/W OR 10 ERR 



GET AH 
GET AL 



CHECK IF LAST PATTERN = 

GO I F NOT 

LAST PATTERN 0101? 

GO IF YES 

WRITE 55AA TO STORAGE 



WRITE 0000 TO STORAGE 



INSURE PARITY B 
V DX.OIOIH 



TS ARE NOT STUCK ON 

; WRITE 0101 TO STORAGE 



CHECKER BOARD TEST 



SUB 

MOV 

SHR 

MOV 

STOSW 

MOV 

STOSW 

LOOP 

SUB 

MOV 

SHR 

LODSW 

XOR 

JNZ 

LODSW 

XOR 

JNZ 

LOOP 



CX,1 
AX.0101010101010101B 

AX,1010101010101010B 

on 



POINT TO START OF BLOCK 

GET THE BLOCK COUNT 

DIVIDE BY 2 

FIRST CHECKER PATTERN 

WRITE IT 

SECOND CHECKER PATTERN 

WRITE IT 

DO IT FOR CX COUNT 

POINT TO START OF BLOCK 

GET THE BLOCK COUNT 

DIVIDE BY 2 

GET THE DATA 

CHECK CORRECT 

EXIT IF NOT 

GET NEXT DATA 



TEMP SAVE FOR AX (PUSH NOT ALLOWED) 

; SAVE AX 



5-76 Test 6 



TITLE 12/28/83 TEST? EXCEPTION INTERRUPT TEST 

TEST. 20 

ADDITIONAL PROTECTED (VIRTUAL MODE) TEST 

DESCRI PTION 

THE PROCESSOR IS PUT IN PROTECTED MODE AND 
THE FOLLOWING FUNCTIONS ARE VERIFIED 

1. VERIFY PROTECTED MODE 

THE MACHINE STATUS IS CHECK FOR VIRTUAL MODE 

2. PROGRAMMED INTERRUPT TEST 

AN PROGRAMMED INTERRUPT 32 IS ISSUED AND 
AND VERI FIED 

3. EXCEPT ION INT 13 TEST 

A DESCRIPTOR SEGMENT LIMIT IS SET TO ZERO 
AND A WRITE TO THAT SEGMENT IS ATTEMPTED 
AN EXCEPTION 13 IS EXPECTED AND VERIFIED 
U. LDT/SDT LTR/STR TEST 

1 OAD LDT REGISTER AND VERIFY CORRECT 

LOAD TASK REGISTER AND VERIFY CORRECT 

THEY ARE VERIFIED VIA THE STORE INSTRUCTION 

5. THE CONTROL FLAGS OF THE 286 FOR DIRECTION 
ARE VERIFIED VIA THE STD AND OLD COMMANDS 

IN PROTECTED MODE 

6. BOUND INSTRUCTION TEST ( EXC I NT 5 ) 
CREATE A SIGNED ARRAY INDEX WITHIN AND 
OUTSIDE THE LIMITS. CHECK THAT NO EXC INT 
IF WITHIN LIMIT AND THAT AN EXC INT 5 
OCCURS IF OUTSIDE THE LIMITS. 

7. PUSH ALL POP ALL TEST 

SET ALL GENERAL PURPOSE REGS TO DIFFERENT 
VALUES ISSUE A PUSH ALL, CLEAR THE REGS 
ISSUE A POP ALL AND VERIFY CORRECT. 

8. CHECK THE VERR/VERW INSTRUCTIONS 

THE ACCESS BYTE IS SET TO READ ONLY THEN TO 
A WRITE ONLY AND THE VERR/VERW INST ARE 
VERIFIED. 

9. CAUSE AN INTERRUPT 13 VIA A WRITE TO A 
READ ONLY SEGMENT 

10. VERIFY THE ARPL INSTRUCTION FUNCTIONS 
SET THE RPL FIELD OF A SELECTOR AND 
VERIFY THAT CURRENT SELECTOR RPL IS SET 
CORRECTLY. 

11. VERIFY THE LAR INSTRUCTION FUNCTIONS 

12. VERIFY THE LSL INSTRUCTION FUNCTIONS 

13. LOW MEG CHIP SELECT TEST 



PUBLIC POST? 



EXTRN E_MSG:NEAR 

EXTRN XPC_BYTE:NEAR 

EXTRN F1:NEAR 

EXTRN VECTOR_TABLE:NEAR 

EXTRN PRINT_SCREEN:NEAR 

EXTRN BLINK_INT:NEAR 

EXTRN PRT_HEX:NEAR 

EXTRN F3B:NEAR 

EXTRN PRT_SEG:NEAR 

EXTRN XPC BYTE: NEAR 

EXTRN El: NEAR 

EXTRN F3:NEAR 

EXTRN ERR_BEEP:NEAR 

EXTRN P_MSG:NEAR 

EXTRN START„1:NEAR 

EXTRN FU:NEAR 

EXTRN FilE:NEAR 

EXTRN F3A:NEAR 

EXTRN DISK__BASE:NEAR 

EXTRN F3D:NEAR 

EXTRN F3D1:NEAR 

EXTRN PROC_SHUTDOWN:NEAR 

EXTRN SYSINI T1 :NFAR 

EXTRN PROT_PRT„HEX:NEAR 

EXTRN DISK_IO:NEAR 

EXTRN HD_INT:NEAR 

EXTRN C80U2:NEAR 

EXTRN 0BF_n2:NEAR 

EXTRN STGIS1_CNI :NEAR 

EXTRN B00T_STRAP_1:NEAR 

EXTRN XMIT_80'42:NEAR 

EXTRN R0M_ERR:NEAR 

EXTRN DDS:NEAR 

EXTRN CM1:NEAR 

EXTRN CM2:NEAR 

EXTRN CM3N-NEAR 

EXTRN LOCK ^ NEAR 

EXTRN DISK2SETUP:NEAR 

EXTRN ADERR:NEAR 

EXTRN ADERR1:NEAR 

ASSUME CS:CODE, DSiDATA 



GOOD 






'0ST7 PROC 




0000 


E8 0000 E 




CALL 


DDS 


0003 


BO FO 




MOV 


AL, OFOH 


0005 


E6 80 




OUT 
SET 


MFG_PORT,AL 
SHUTDOWN RETURN 7 


0007 


BO 8F 




MOV 


AL.SHUT DOWN 


0009 


C6 70 




OUT 


CMOS PORT,AL 


OOOB 


BO 07 




MOV 


AL,7 


OOOD 


EB 00 




JMP 


SHORT $+2 


000 F 


E6 71 
BC OOOO 




OUT 


CMOS P0RT+1,AL 




-'enable PROTECTED MODE 


001 1 


MOV 


SP,POST SS 


0014 


8E D4 




MOV 


SS,SP 


0016 


BC 8000 




MOV 


SP,POST_SP 


0019 


E8 0000 E 




CALL 
SET 


SYSINIT1 
TEMPORY STACK 


001C 


B8 0008 




MOV 


AX,GDT PTR 


001 F 


8E CO 




MOV 


ES,AX 


0021 


8E D8 




MOV 


DS,AX 


0023 


26: C7 06 


005A 0000 


MOV 


ESrSS TEMP. BASE LO WORD,0 


002A 


26: C6 06 


005C 00 


MOV 


BYTE PTR ES:(SS TEMP. BASE 


0030 


BE 0058 




MOV 


SI,SS TEMP 


0033 


8E D6 




MOV 


SS,SI 



; SET DATA SEGMENT 
;<><><>CHECKPOINT FO <><><: 



ADDR FOR SHUTDOWN BYTE 



SET STACK FOR SYSINIT1 



GO ENABLE PROTECTED MODE 




Test? 5-77 



0035 BC FFFD 



mov sp,max_seg_len-2 
-'verify protected mode 



0038 


OF 




0039 






0039 


01 


EO 


003B 






0039 






0039 


01 




003B 






003B 


A9 


O0O1 


003E 


Ih 


03 


OOUO 


ty 


02 EA R 


0043 


BO 


F1 


0045 


E6 


80 



LABEL 

SHL 

LABEL 

ORG 

DB 

ORG 

TEST 

JNZ 

JMP 



AX 

OOFH 

BYTE 

AX, 1 

BYTE 

OFFSET CS:??0000 

OOIH 

OFFSET CS:??0001 

AX,VIRTUAL_ENABLE 

T7_1 

ERR0R_EXIT 



GET THE MACHINE STATUS WORD 



ARE WE IN PROTECTED MODE 
ERROR IF NOT 



0047 


BO AF 


0049 


E6 88 


004B 


CD 20 


004D 


2B 09 


004F 


E4 8B 


0051 


22 CO 


0053 


EO FA 


0055 


74 03 


0057 


E9 02EA R 



INTERRUPT TEST (PROGRAMMED INTERRUPT 32) 



32 

CX, CX 

AL,DMA_PAGE+OAH 

AL,AL 

LOOPl 

T7_2 

ERROR_EXIT 



SET EXCEPTION FLAG 

FOR INT 10 
INTERRUPT 
WAIT FOR INT 

DID THE INTERRUPT OCCUR? 



MISSING INTERRUPT 



■ CAUSE AN EXCEPTION INTERRUPT (GENERAL PROTECTION INT 13D) 



0062 C7 06 0048 0000 



0068 C6 06 004D 93 
006D C6 06 004C 01 
0072 C7 06 004A 0000 



0070 


2B FF 


007 F 


26: 88 05 


0082 


2B C9 


0084 


E4 8B 


0086 


22 CO 


0088 


EO FA 


008A 


74 03 


008C 


E9 02EA R 



T7_2: MOV AL,0F2H ;<><><><><><><><><><><><><><> 

OUT MFG_P0RT,AL ; oooCHECKPOl NT F2 <><><><> 

MOV AL,9DH ; SET I NT 1 3 FLAG 

OUT DMA_PAGE+OAH,AL ; FOR THE INT HANDLER 

. MODIFY DESCRIPTOR TABLES 

; 'set TEMP ES DESCRIPTOR TO SEGMENT LIMIT 

MOV DS:ES_TEMP.SEG_LIMIT,0 ; SET SEGMENT TO 

. CPLO, DATA ACCESS RIGHTS 

MOV BYTE PTR DS: ( ES_TEMP. DATA_ACC_R I GHTS), CPLO_DATA_ACCESS 

MOV BYTE PTR DS: ( ES_TEMP. BASE_H l_BYTE ), 01 ; DO ALL TESTS ON 2ND 64K 

MOV WORD PTR DS: ( ES_TEMP. BASE_LO_WORD) , 

. SET ES REGISTER 

MOV AX,ES_TEMP ; LOAD ES 

MOV ES,AX ; 

. CAUSE AN EXCEPTION 13 INTERRUPT 

SUB D1,DI ; 

MOV AX. ES:[DI] ; TH I S SHOULD CAUSE AND EXCEPTION 



WAIT FOR INT 

DID THE INTERRUPT OCCUR? 



SUB 


CX.CX 


IN 


AL.DMA PAGE+OAH 


AND 


AL,AL 


LOOPNZ 


L00P2 


JZ 


T7 3 


JMP 


ERROR EXIT 



008F 


BO 


F3 


0091 


1-6 


80 


0093 


BF 


O078 


0096 


OF 




0097 






0097 


«B 


D7 


0099 






0097 






0097 


DO 




0099 







0099 2B CO 



009B 


OF 




009C 






009C 


03 


CO 


009E 






009C 






009C 


00 




009E 






009E 


?^ 


OOFS 


OOAl 


3D 


O078 


0OA4 


lb 


IB 


00A6 


BF 


O068 


00A9 


OF 




OOAA 






OOAA 


8H 


DF 


OOAC 






OOAA 






OOAA 


00 





VERIFY 286 LDT/SDT LTR/STR 
INSTRUCTIONS 
DESCRIPTION 

LOAD LOT REGISTERS WITH A DESCRIPTOR 
VERIFY CORRECT 



■ WRITE TO 286 LOT REGISTER 



MOV 

OUT 

MOV 

LLDT 

DB 

LABEL 

MOV 

LABEL 

ORG 



AL,0F3H 

MFG_PORT,AL 

DI,POST_LDTR 

Dl 

OOFH 

BYTE 

DX,DI 

BYTE 

OFFSET CS:??0002 

nOOH 

OFFSET CS:??0003 



REGISTER FROM THIS AREA 



■ READ AND VERIFY 286 LOT SELECTOR 
SUB AX, AX 



LABEL 

ADD 

LABEL 

ORG 

DB 

ORG 

AND 

CMP 

JNZ 



AX 

OOFH 

BYTE 

AX, AX 

BYTE 

OFFSET CS: 770004 

OOOH 

OFFSET CS: 770005 

AX,0F8H 

AX, POST_LDTR 

ERROR 



■ WRITE TO 286 TR 
10V D I , POST_TR 



LABEL 
MOV 
LABEL 
ORG 



Dl 

OOFH 

BYTE 

BX,DI 

BYTE 

OFFSET CS:' 

OOOH 

OFFSET CS:' 



STRI P TI/RPL 
CORRECT SELECTOR? 
GO I F NOT 



REGISTER FROM THIS AREA 



?0006 
?0007 
VERIFY 286 TR REGISTERS 



5-78 Test? 



OOAC 2B CO 



OOAE 


OF 




OOAF 






OOAF 


8B 


C8 


00B1 






OOAF 






OOAF 


00 




0OB1 






OOBl 


?.b 


OOFS 


OOBU 


3D 


0068 


0OB7 


fb 


08 


0OB9 


FD 




OOBA 


9C 




OOBB 


■^H 




OOBC 


M 


0200 


OOBF 


ih 


03 


OOCl 


F9 


02EA R 


OOCU 






ooc^ 


A9 


0'400 


00C7 


lb 


03 


00C9 


F9 


02EA R 


OOCC 


FC 




OOCD 


9C 




OOCE 


■78 




OOCF 


A9 


0*400 


00D2 


7I4 


03 


ooon 


F9 


02EA R 


00D7 







LABEL 

MOV 

LABEL 

ORG 

DB 

ORG 

AND 

CMP 

JNZ 



AX 

OOFH 

BYTE 

CX.AX 

BYTE 

OFFSET OS:?' 

OOOH 

OFFSET OS:?' 

AX,0F8H 

AX, POST_TR 

ERROR 



GET THE TR REG 



CORRECT SELECTOR? 



T7_6: 
DESCR 



TEST 286 CONTROL FLAGS 



JMP ERROR_EXIT 

TEST AX,01|OOH 

JNZ T7_5 

JMP ERR0R_EXIT 

CLD 

PUSHF 

POP AX 

TEST AX,0400H 

JZ T7_6 

JMP ERR0R_EX1T 



INTERRUPT FLAG SHOULD BE OFF 
CONTINUE IF OFF 
GO I F NOT 

CHECK DIRECTION FLAG 



INSURE DIRECTION FLAG IS RESET 



GO I F NOT 



00D7 


BO 


F4 




00D9 


F6 


80 




OODB 


(58 


0048 




CODE 


8L 


CO 




OOEO 


?R 


FF 




00E2 


26 


C7 05 


0000 


00E7 


26 


C7 45 


02 7 


OOED 


BO 


95 




OOEF 


L6 


8B 




00F1 


B8 


1000 




C0F4 


26 






00 F5 








00F5 


8B 


05 




00F7 








00F5 








00F5 


62 






00F7 








00F7 


?B 


C9 




00F9 


F? 


FE 




OOFB 


F4 


8B 




OOFD 


3C 


00 




00 FF 


C) 


03 




0101 


f-9 


02EA R 




010U 








0104 


?B 


FF 




0106 


26 


C7 05 


3FF0 



??000B 
??000C 



010F 






010F 


8B 


05 


on 1 






010F 






010F 


62 




0111 






0111 


2B 


C9 


0113 






0113 


EU 


8B 


0115 


3C 


00 


0117 


EO 


FA 


0119 


74 


03 


011B 


E9 


02EA R 


onE 


BO 


95 


0120 


E6 


8B 


0122 


2B 


FF 


012U 


26 


C7 05 0000 


0129 


26 


C7 45 02 OFFF 


012F 


B8 


1000 


0132 


26 




0133 






0133 


8B 


05 


0135 






0133 






0133 


62 




0135 






0135 


2B 


C9 


0137 






0137 


E4 


8B 


0139 


3C 


00 


013B 


EO 


FA 


013D 


74 


03 


013F 


E9 


02 EA R 



•?000E 
■?000F 



■ ??0011 
??0012 



VERIFY 286 BOUND INSTRUCTION 

PTION 

CREATE A SIGNED ARRAY INDEX WITHIN AND 

OUTSIDE THE LIMITS (EXPECT 1 NT 5 ) 



MOV 
OUT 
MOV 
MOV 



AL,0F4H 
MFG_PORT,AL 
AX,ES_TEMP 
ES,AX 



■ CHECK BOUND FUNCTIONS CORRECTL 

SUB DI,D1 

MOV WORD PTR ES: [Dl ],0 

MOV WORD PTR ES: [ D I +2 ] , 07FFFH ; SET SECOND TO 07FFFH 

; SET INTERRUPT 5 FLAG 
3AH,AL ; 

AX.IOOOH 



DB 

BOUND 

LABEL 

MOV 

LABEL 

ORG 

DB 

ORG 

SUB 

LOOP 

IN 

CMP 

JNZ 

JMP 



ES 

026H 

AX,[DI ] 

BYTE 

AX, [ D I ] 

BYTE 

OFFSET CS:??OOOB 

062H 

OFFSET CS:??OOOC 

CX,CX 

LOO PA 

AL,OMA_PAGE+OAH 

AL,0 



DB 

BOUND 

LABEL 

MOV 

LABEL 

ORG 

DB 

ORG 



JZ 



"'"7_7 
ERROR_EXIT 

I LOW BOUND WORD CAUSES INT 5 

Dl ,DI 

WORD PTR ES: [Dl ],03 

AX, 1000H 

ES 

026H 

AX, [01 ] 

BYTE 

AX, [Dl ] 

BYTE 

OFFSET CS:??000E 

062H 

OFFSET CS:??O0OF 

CX,CX 



WAIT FOR POSSIBLE INTERRUPT 

GET THE RESULTS 

DID AN INTERRUPT OCCUR? 

CONTINUE IF NOT 



AL,DMA_PAGE+OAH 

AL,OH 

LOOPS 

T73 

ERROR_EXIT 



JMP 

CHECK HIGH BOUND WORD CAUSES INT 5 

SET FLAG FOR 



WAIT FOR POSSIBLE INTERRUPT 

GET THE RESULTS 

DID AN INTERRUPT OCCUR? 

TRY AGAIN 

CONTINUE IF INTERRUPT 

CO I F NO INTERRUPT 



SUB 

MOV 

MOV 

MOV 

SEGOV 

DB 

BOUND 

LABEL 

MOV 

LABEL 

ORG 



WORD PTR ES:[DI ],0 ; 

WORD PTR ES:[DI+2],0FFFH 

AX.IOOOH ; 

ES ; 

026H 

AX, [Dl] ; 

BYTE 

AX, [Dl ] 

BYTE 

OFFSET CS:??0011 

062H 

OFFSET CS:??0012 

CX,CX 

AL, DMA_PAGE+OAH 

AL,OH 

LOO PC 

T7_9 

ERROR_EXIT 



POINT BEGINING OF THE BLOCK 
SET FIRST WORD TO 
; SET SECOND TO OFFFH 
SET AX OUT OF BOUNDS 
USE THE ES REG 



WAIT FOR POSSIBLE INTERRUPT 

GET THE RESULTS 

DID AN INTERRUPT OCCUR? 

TRY AGAIN 



GO IF NO INTERRUPT 



Test 7 5-79 



SET REGISTERS TO A KNOWN VALUE AND 
PUSH ALL. RESET THE REGISTERS POPALL 
AND VERI FY 



0142 






0142 


BO 


F5 


0144 


L6 


80 


0146 


B8 


0001 


0149 


8B 


08 


014B 


43 




014C 


«« 


CB 


014E 


41 




014K 


8B 


01 


0151 


42 




0152 


«B 


FA 


0154 


47 




0155 


fiB 


F7 


0157 


46 




0158 


55 




0159 


RB 


EE 


015B 


45 




015C 


60 




015D 


2B 


CO 


015F 


8B 


D8 


0161 


8B 


C8 


0163 


RB 


DO 


0165 


8B 


F8 


0167 


RB 


FO 


0169 


8B 


E8 


016B 


61 




016C 


R3 


FD 07 


016F 


5D 




0170 


75 


21 


0172 


3D 


0001 


0175 


/5 


1C 


0177 


R3 


FB 02 


017A 


75 


17 


017C 


R3 


F9 03 


017F 


75 


12 


0181 


R3 


FA 04 


0184 


75 


OD 


0186 


R3 


FF 05 


0189 


75 


08 


018B 


83 


FE 06 


018E 


75 


03 


0190 


EB 


04 90 


0193 






0193 


E9 


02 EA R 



MOV 


AL.0F5H 


OUT 


MFG PORT.AL 


MOV 


AX, 01 


MOV 


BX.AX 


INC 


8X 


MOV 


CX.BX 


INC 


CX 


MOV 


DX.CX 



PUSH 


BP 


MOV 


BP,SI 


INC 


BP 


PUSHA 




DB 


060H 


SUB 


AX, AX 


MOV 


BX,AX 


MOV 


CX,AX 


MOV 


DX,AX 


MOV 


DI,AX 


MOV 


SI, AX 


MOV 


BP,AX 


POPA 




08 


061H 


CMP 


BP,07 


POP 


BP 


JNZ 


ERROR EXIT1 


CMP 


AX, 01 


JNZ 


ERROR EXIT! 


CMP 


BX,02 


JNZ 


ERROR EXIT! 


CMP 


CX,03 


JNZ 


ERROR EXIT1 


CMP 


OX, 04 


JNZ 


ERROR EXIT1 


CMP 


Dl,05 


JNZ 


ERROR EXIT1 


CMP 


SI, 06 


JNZ 


ERROR EXIT! 


JMP 


T7 10 


. ERp 






ERROR EXIT1 : 




JMP 


ERROR_EXIT 



;<><><>CHECKPOINT F5 <><><><> 



SET DX=4 

SET Dl=5 

SET SI =6 

SAVE THE BP REGISTER 

SET BP=7 

ISSUE THE PUSH ALL COMMAND 

CLEAR ALL REGS 



GET THE REGISTERS BACK 

BP SHOULD BE 7 

RESTORE BP 

GO I F NOT 

AX SHOULD BE 1 

GO IF NOT 

BX SHOULD BE 2 

GO I F NOT 

CX SHOULD BE 3 

GO I F NOT 

DX SHOULD BE 4 

GO I F NOT 

Dl SHOULD BE 5 

GO IF NOT 

SI SHOULD BE 6 

GO I F NOT 



VERIFY ACCESS RIGHTS FUNCTION CORRECTLY 
DESCRI PTION 

SET ACCESS RIGHTS OF DESCRIPTER TO 
READ ONLY. VERIFY THE VERW/VERR INSTR 
ACCESS A READ ONLY WITH A WRITE AND 
VERIFY AN EXCEPTION I NT 1 3 



0196 


BO F6 




0198 


E6 80 




019A 


C7 05 0048 


FFFF 


01AO 


C6 06 004C 


00 


01A5 


C7 06 004A 


FOOD 


01AB 


B8 0048 




01AE 


8E CO 





MOV AL,0F6H 

OUT MFG_PORT.AL ; oooCHECKPO I NT F6 <><><><> 

MOV DS:ES_TEMP,SEG_LIMIT,MAX_SEG_LEN ; SET SEGMENT TO OFFFFH 

MOV BYTE PTR DS: ( ES_TEMP. BASE_H l_BYTE) ,0 ; SET THE ADDRESS 

MOV DS:ES_TEMP.BASE_LO_WORD,OFOOOH 



INSURE ACCESS RIGHTS MAY BE WRITTEN 



0182 

01 B2 8B E8 

0184 

01B2 

01 B2 00 

0184 

01 84 75 DD 



0186 C6 06 004D 91 



??0014 
770015 



SEGOV 

DB 

VERW 

DB 

LABEL 

MOV 

LABEL 

ORG 

DB 

ORG 

JNZ 



03EH 

AX 

OOFH 

BYTE 

BP,AX 

BYTE 

OFFSET CS:??0014 

OOOH 

OFFSET CS:??0015 

ERR0R_EXIT1 



SET SEGMENT OVER IDE TO START OF TABLE 
CHECK THE ACCESS RIGHTS OF ES_TEMP 



ERROR IF SEGMENT CAN NOT WRITE 



SET ACCESS RIGHTS TO READ ONLY 
MOV BYTE PTR DS: ( ES_TEMP. DATA_ACC_R IGHTS) , 91 H 



01C1 


OF 




01C2 






0102 


8B 


E8 


01 C4 






01C2 






01C2 


00 




01C4 






01C4 


74 


CD 


01 C6 


B8 


0048 


01C9 


3E 




01CA 


OF 




01CB 






OICB 


fiB 


EO 


OICD 






OICB 






OICB 


00 




OICD 







70017 
■70018 



SEGOV 

DB 

VERW 

DB 

LABEL 

MOV 

LABEL 

ORG 



7001A 
'7001B 



OICD 75 C4 



01 D3 2B F6 



LABEL 

MOV 

LABEL 

ORG 

DB 

ORG 

JNZ 



03EH 

AX 

OOFH 

BYTE 

BP,AX 

BYTE 

OFFSET CS:' 

OOOH 

OFFSET CS:' 

ERR0R_EXIT1 

AX, ES_TEMP 

DS 

03EH 

AX 

OOFH 

BYTE 

SP,AX 

BYTE 

OFFSET CS:' 

OOOH 

OFFSET CS:' 

ERR0R_EXIT1 



70017 
70018 



7001A 
7001B 



LOAD ES REGISTER 

SET SEGMENT OVER IDE TO START OF TABLE 
CHECK THE ACCESS RIGHTS OF ES_TEMP 



ERROR IF SEGMENT IS WRITEABLE 
INSURE THAT SEGMENT IS READABLE 



GO IF SEGMENT NOT READABLE 



CAUSE AN EXCEPTION 13 INTERRUPT 



5-80 Test 7 



01D5 


26: C6 0*4 00 


01D9 


2B C9 


01DB 


EU 8B 


01DD 


22 CO 


01DF 


EO FA 


01E1 


75 BO 



MOV 
SUB 



BYTE PTR ES:[S1 



CX,CX 

AL.DMA PAGE+OAH 
AND AL,AL 
LOOPNZ LOOPD 
JNZ ERR0R_EXIT1 



WRITE A BYTE THAT SHOULD 

CAUSE AN EXCEPTION 
WAIT FOR INT 



DID THE 
MISSING 



NTERRUPT OCCUR? 
NTERRUPT 



01 E3 C6 06 OOUO 93 



-- RESTORE THE ACCESS RIGHTS BYTE 
MOV BYTE PTR DS: ( ES_TEMP. DATA_ACC_R I GHTS ) , CPLO_DATA_ACCESS 



01E8 
01 EA 
01 EC 
01EF 



BO F7 
E6 80 
B8 0048 
BB 0060 



01 F2 OD 0003 



01 F5 






01 F5 


8B 


C3 


01 FT 






01F5 






01 F5 


63 




01 F7 






01 F7 


7-> 


9A 


01 F9 


80 


E3 03 


01 FC 


80 


FB 03 


01FF 


75 


92 


0201 


BB 


0060 


020U 


B8 


00U8 


0207 


80 


CB 03 



020A 




020A 


8B C3 


020C 




020A 




020A 


63 


020C 




020C 


71 85 


020E 


80 E3 03 


0211 


80 FB 03 


021U 


75 2F 



VERIFY ADJUST RPL FIELD OF SELECTOR 
INSTRUCTION (ARPL) FUNCTIONS 
DESCRIPTION 

SET THE RPL FIELD OF A SELECTOR 
AND VERIFY THAT THE ZERO FLAG IS SET 
CORRECTLY AND THAT THE SELECTOR RPL 
FIELD IS SET CORRECTLY 



MOV 
OUT 
MOV 
MOV 



AL,0F7H 
MFG_PORT,AL 
AX,CS_TEMP 
BX,DS_TEMP 



;<><><>CHECKPOINT F7 <><><><> 
PUT A SELECTOR IN AX 
PUT A SELECTOR IN BX 

MAKE ACCESS OF AX < BX 



FIRST OPERAND AX = SECOND OPERAND 



ARPL 

LABEL 

MOV 

LABEL 

ORG 

DB 

ORG 

JNZ 

AND 



AX,BX 

BYTE 

AX, BX 

BYTE 

OFFSET CS:??001C 

063H 

OFFSET CS:??001D 

ERR0R_EXIT1 

BL,03H 

BL,03H 

ERR0R_EXIT1 



; ISSUE THE RPL COMMAND 

; NOTE: SOURCE / TARGET REGS ARE REVERSED 

DUE TO OPCODE BIT 1 



GO IF RPL WAS NOT CHANGED 
STRIP UNWANTED BITS 
AS EXPECTED? 
GO IF NOT 



■ CHECK THAT ACCESS RIGHTS DO NOT CHANGE 



BX,DS„TEMP 
AX, ES_TEMP 
BL,03H 



PUT A SELECTOR IN BX 
PUT A SELECTOR IN AX 
MAKE ACCESS OF BX < AX 



FIRST OPERAND AX = SECOND OPERAND 



ARPL 

LABEL 

MOV 

LABEL 

ORG 

DB 

ORG 

JZ 

AND 

CMP 

JNZ 



AX,BX 

BYTE 

AX.BX ; 

BYTE 

OFFSET CS:??001E 

053H 

OFFSET CS:??001F 

ERR0R_EXIT1 

BL,03H 

BL,03H 

ERR0R_EXIT2 



; ISSUE THE RPL COMMAND 

; NOTE: SOURCE / TARGET REGS ARE REVERSED 

DUE TO OPCODE SIT 1 



GO IF RPL WAS NOT CHANGED 
STRIP UNWANTED BITS 
AS EXPECTED? 
GO IF NOT 



CHECK THE LAR INSTRUCT 10 



021A C6 06 OOUD F3 



- SET THE DESCRIPTOR TO LEVEL 3 
MOV BYTE PTR DS: ( ES_TEMP. DATA_ACC_R IGHTS) , CPL3_DATA_ACCESS 



022t 
0225 
0225 
0227 
0225 
0225 
0227 



0227 75 1C 





LAR 


AX.BX 






DB 


OOFH 




?0020 


LABEL 


BYTE 






MOV 


AX, BX 




70021 


LABEL 


BYTE 






ORG 


OFFSET CS: 


??0O2O 




DB 


002H 






ORG 


OFFSET CS: 


??0021 



ISSUE THE LAR COMMAND 



-- INSURE THE DESCRIPTOR WAS VI SABLE 

JNZ ERR0R_EXIT2 ; GO I F LAR WAS NOT CHANGED 

-- THE DISCRIPT0R"S ACCESS RIGHTS MUST BE 3 



CHECK THE LSL (LOAD SEGMENT LIMITS) 



022E BO F9 
0230 E6 80 
0232 C7 06 0048 AAAA 



HOV 
OUT 
MOV 



AL,0F9H 

MFG_P0RT,AL 

DS: ES_TEMP.SEG_LIMIT,OAAAAH 



0238 


C6 


06 004D 


93 


023D 


B8 


0048 




0240 


OF 






0241 








0241 


8B 


D8 




0243 








0241 








0241 


03 






0243 








0243 


/4 


03 




0245 








0245 


t9 


02EA R 





??0022 
??0023 



MOV 

MOV 

LSL 

DB 

LABEL 

MOV 

LABEL 

ORG 



BYTE PTR DS: ( ES_TEMP. DATA_ACC_RIGHTS) ,CPLO_DATA_ACCESS 



AX, ES_TEMP 

BX,AX 

OOFH 

BYTE 

BX,AX 

BYTE 

OFFSET CS:??0022 

003H 

OFFSET CS:??0023 

R07 



ERROR_EXIT 



LOAD ES REGISTER 

GET THE DESCRIPTOR SEGMENT LIMIT 



GO I F NOT SUCCESSFUL 



Test? 5-81 



0248 


81 


FB AAAA 


024C 


C7 


06 0048 5555 


0252 


B8 


0048 


0255 


OF 




0256 






0256 


8B 


08 


0258 






0256 






0256 


(n 




0258 






0258 


/5 


EB 


025A 


81 


FB 5555 


025E 


75 


E5 



7: 


CMP 


BX.OAAAAH 




MOV 


DS:ES_TEMP.SEG_L 




MOV 


AX, ES TEMP 




LSL 


BX,AX 




DB 


OOFH 


0024 


LABEL 


BYTE 




MOV 


BX.AX 


0025 


LABEL 


BYTE 




ORG 


OFFSET CS:??0024 




DB 


003H 




ORG 


OFFSET CS:??0025 




JNZ 


ERR0R_EXIT2 




CMP 


BX,05555H 




JNZ 


ERROR EXIT2 



INSURE CORRECT SEGMENT LIMIT 
i5H ;SET THE SETMENT LIMIT TO 05555H 

GET THE DESCRIPTOR SEGMENT LIMIT 



GO I F NOT SUCCESSFUL 



0260 


BO 


FA 


0262 


r6 


80 


0264 


Bfi 


0008 


0267 


8E 


08 



LOW MEG CHIP SELECT TEST 
TLSr IHAI A WKIIt TO ADDRESS 1 BOOOO DOES NOT WRITE TO 
B000:0, OR 1B8000 DOES NOT WRITE TO B800:0 



MOV 
OUT 
MOV 
MOV 



AL,0FAH 
MFG_P0RT,AL 
AX,GDT_PTR 
DS,AX 



SET TEMP ES DESCRIPTOR 64K SEGMENT LIMIT/CPLO DATA ACCESS 



0269 
026F 


C7 
C6 


06 0048 FFFF 
06 004D 93 


0274 
0279 


06 
C7 


06 004C IB 
06 004A 0000 


027F 
0282 


38 
8E 


0048 
CO 


0284 
0286 


2B 
26 


FF 
C7 05 AA55 



START WITH SEGMENT 1 BOOOO 



WORD PTR ES: [Dl ],0AA55H 



_BYTE), 1BH 

; LOAD ES REG 



028B C7 06 004A 8000 



0291 


B8 


0048 


0294 


8E 


CO 


0296 


26 


07 05 AA55 


029B 


C6 


06 004C 1A 


02AO 


C7 


06 004A 000 


02A6 


B« 


0048 


02A9 


8E 


CO 


02AB 


26 


07 05 AA55 


02BO 


SB 


0020 


02B3 


8L 


DB 


02B5 


8B 


05 


02B7 


BB 


0028 


02BA 


Ht 


DB 


02BC 


8B 


ID 


02BE 


B9 


0030 


0201 


8L 


D9 


02C3 


8B 


OD 


02C5 


50 




0206 


BO 


35 


02C8 


E6 


80 


02CA 


58 




02CB 


3D 


AA55 


02CE 


/k 


1A 


O2D0 


HI 


FB AA55 


02D4 


74 


14 


02D6 


HI 


F9 AA55 


02DA 


/4 


OE 


02DC 


BO 


34 


02DE 


E6 


80 



- DO FOR SEGMENT 1 B8000 
MOV DS:ES_TEMP.BASE_ 



MOV WORD PTR ES:[DI 
-- DO FOR SEGMENT 1A0000 



.LO_W0RD,8000H 

; LOAD ES REG 

,0AA55H ; WRITE A ZERO 



MOV 
MOV 
MOV 



AX, ES_TEMP 

ES,AX 

WORD PTR ES: [Dl ] 



O2E0 


BO 


8F 


02E2 


F6 


70 


02E4 


BO 


06 


02E6 


FH 


00 


02E8 


F6 


71 


02EA 






02EA 


E9 


0000 


02ED 






02ED 







B/W VIDEO CARD 



MOV 
MOV 
MOV 



BX,C_BWCRT_PTR 

DS,BX 

AX,DS: [Dl ] 



COMPATIBLE COLOR 



MOV 
MOV 
MOV 



BX,C_CCRT_PTR 

DS,BX 

BX, DS:[DI ] 



AGC COLOR 



MOV 
MOV 
MOV 



CX, E_CCRT__PTR 
DS,CX 
CX,DS: [Dl ] 



TEST FOR ERROR 



PUSH 
MOV 
OUT 



AX 

AX, 0AA55H 

ERROR_EXIT 

BX,0AA55H 

ERROR_EXIT 

CX,0AA55H 

ERROR_EXIT 

AL,34H 

MFG_PORT,AL 



. SHUTDOWN 

NORMAL_EXIT: 



MOV 
OUT 
MOV 
•IMP 
OUT 
ERROR_EXIT: 
JMP 



AL, SHUT_DOWN 

CMOS_PORT,AL 

AL,6 

SHORT $+2 

CM0S_P0RT+1,AL 

PROC_SHUTDOWN 



P0ST7 ENDP 

CODE ENDS 

END 



LOAD ES REG 
WRITE A ZERO 



SET OS TO COMPATIBLE COLOR RAM 
GET THE WORD FROM COLOR RAM 



AGC COLOR CRT PTR LOW 64K 



SAVE RESULTS 
ooCHECKPOINT 35<><><; 



ADDR FOR SHUTDOWN BYTE 



5-82 Test? 



ITLE SYSINIT1 - 09/26/83 
SYSINIT1 include fi 



INITIALIZE FOR PROTECTED MODE (POST TEST) 



INCLUDE SYSDATA. INC 
INCLUDE ACCESS. INC 
INCLUDE SYSDATA. MAC 
INCLUDE IAPX286.MAC 
INCLUDE POSTEQU.SRC 

PUBLIC SYSINIT1 



EXTRN 
EXTRN 
INCLUDE SEGMENT. SRC 
CODE SEGMENT BYTE PUBLIC 





ASSUME 


CS:CODE 




ASSUME 


SS: NOTHING 




ASSUME 


DS: NOTHING 




ASSUME 


ES: NOTHING 


PAGE 






SYSINIT1 


PROC 


NEAR 



0000 


FA 


0001 


55 


0002 


BO 81 


0004 


E6 80 


0006 


E8 0000 E 


0009 


8B EF 


OOOB 


B8 0800 


OOOE 


AB 


OOOF 


B8 DOAO 


0012 


AB 



0019 




0019 


8B 5E 00 


001C 




0019 




0019 


01 


OOIC 




001C 


8B FD 



PUSH 


BP 


MOV 


AL,81H 


OUT 


MFG PORT,AL 


CALL 


SIDT BLD 


MOV 


BP,DI 


MOV 


AX,SYS_IDT_LEN 


STOSW 




MOV 


AX,SYS_IDT_LOC 


STOSW 




MOV 


AX, 


STOSW 




SEGOV 


ES 


DB 


026H 


LIDT 


[BP] 


DB 


OOFH 


LABEL 


BYTE 


MOV 


BX,WORD PTR [BP] 


LABEL 


BYTE 


ORG 


OFFSET CS:??0001 


DB 


001H 


ORG 


OFFSET CS:??0002 


MOV 


DI,BP 



NO INTERRUPTS ALLOWED 
SAVE BP 

OOOCHECKPOINT 81 <><><> 

SAVE THE POINTER TO JUST PAST THE IDT 

SINCE WE HAVE NO SDA, USE THE SIX BYTES 
HERE TO LOAD THE IDTR. WE WILL SIDT 
WHEN WE GET TO SDA INITIALIZATION. 

SEGMENT LIMIT = LENGTH OF IDT 

STORE THAT AS IDT LIMIT 

IDT ADDRESS 

AND ACCESS RIGHTS BYTE (UNDEFINED) 



LOAD THE IDT 

REGISTER FROM THIS AREA 



ES:DI NOW --> END OF IDT AGAIN 



BUILD THE GDT. 



001 E 


BF 


D8A0 


0021 


FB 


0000 


002U 


«B 


EF 


0026 


B8 


O088 


0029 


AB 




002A 


B8 


D8A0 


002D 


AB 




002E 


B8 


oooo 


0031 


AB 




0032 


26 




0033 


OF 




0034 






003i4 


«B 


56 00 


0037 






003t» 






003*4 


01 




0037 






0037 


m 


FD 


0039 


AB 




003A 


AB 




003B 


8B 


FD 



MOV 


DI,GDT LOG 


CALL 


GDT BLD 


MOV 


BP,D1 


MOV 


AX,GDT_LEN 


STOSW 




MOV 


AX,GDT_LOC 


STOSW 




MOV 


AX,0 


STOSW 




SEGOV 


ES 


DB 


026H 


LGDT 


[BP] 


DB 


OOFH 


LABEL 


BYTE 


MOV 


DX.WORD PTR [BP] 


LABEL 


BYTE 


ORG 


OFFSET CS:??000'+ 


DB 


001H 


ORG 


OFFSET CS:??0005 


MOV 


DI,BP 


STOSW 




STOSW 




MOV 


DI.BP 



SAVE THE ES:DI POINTER 

AX = LENUTH OF THE GDT 

PUT THAT IN THE LIMIT FIELD 

AX = LOW WORD OF GDT ADDRESS 

PUT THAT IN BASE FIELD - LOW 

AX = HIGH BYTE OF ADDRESS, AND 

ACCESS RIGHTS BYTE IS UNDEFINED 
LOAD THE GDTR 

FROM THIS AREA 



RESTORE THE ES:DI POINTER 



SWITCH TO VIRTUAL MODE 



003 D 


5D 


003E 


B8 0001 


00U1 


OF 


0042 




0042 


8B FO 


0044 




0042 




0042 


01 


0044 




0044 


EA 


0045 


0049 R 


0047 


0040 


0049 




0049 


BO 85 


004B 


E6 80 


004D 


C3 


004E 




004E 







POP 


BP 




MOV 


AX,VIRTUAL_ENABL 




LMSW 


AX 




DB 


OOFH 


??0006 


LABEL 


BYTE 




MOV 


SI ,AX 


??0007 


LABEL 


BYTE 




ORG 


OFFSET CS:??0006 




DB 


001H 




ORG 


OFFSET CS:??0007 




JUMPFAR DONE, SYS ROM CS 




DB 


OEAH 




OW 


(OFFSET DONE) 




DW 


SYS_ROM_CS 


DONE: 








MOV 


AL.85H 




OUT 


MFG PORT,AL 




RET 





SYSINIT1 


ENDP 


CODE 




ENDS 
END 



RESTORE BP 

MACHINE STATUS WORD NEEDED TO 
SWITCH TO VIRTUAL MODE 



; MUST PURGE PRE-FETCH QUEUE 
Jump far d i rect 
to this offset 
in this segment 



OOOCHECKPOINT 82 • 
SYSTEM INITIALIZATION 



Syslnit 5-83 



5-84 Sys Init 



TITLE GDT_BLD - 09/26/83 BUILD THE GOT 



ASSUME 
ASSUME 
ASSUME 
ASSUME 



CS:CODE 
SS: NOTHING 
DS:CODE 
ES: NOTHING 



PUBLIC GDT_BLD 



THE FOLLOWING DATA DEFINES THE PRE- I N I T I AL IZED GDT. 

THESE MUST BE INITIALIZED IN THE ORDER IN WHICH THEY APPEAR 

IN THE GDT__DEF STRUCTURE DEFINITION AS IT IS IN SYSOATA. INC. 



GDT_DATA_START LABEL 



FIRST ENTRY UNUSABLE 



0000 0000 

0002 0000 

OOOU 00 

0005 00 

0006 0000 



0008 
OOOA 
OOOC 
GOOD 
OOOE 



DESCR_DEF 



SEG, 0, 0, 0, 

; Segment I im 

; Segment basi 

; Segment bas- 

; Access righ 

; Reserved 



address - I ow word 
address - high byte 
i byte 



THE GDT ITSELF 



:_DEF SEG, GDT_LEN, GDT_L0C, 0, CPLO_DATA_ACCESS 

GDT_LEN ; Segment limit 

GDTLOC ; Segment base address - low word 

; Segment base address - high byte 

CPLO_DATA_ACCESS ; Access rights byte 

; Reserved 



0010 


0800 


0012 


DOAO 


0014 


00 


0015 


93 


0016 


0000 



0018 


0300 


001A 


OUOO 


001C 


00 


001D 


93 


001 E 


0000 



0, CPLO_DATA_ACCESS 
Idress - low word 



THE SYSTEM IDT DESCRIPTOR 

;_DEF SEG, SYS_IDT_LEN, SYS_IDT_LOC, 
SYS_IDT_LEN ; Segment limit 

SYS_IDT_LOC ; Segment base a 

; Segment base address - high byte 

CPLO„DATA_ACCESS : Access rights byte 

; Reserved 

THE SYSTEM DATA AREA DESCRIPTOR 

!_DEF SEG, SDA___LEN, SDA_LOC, 0, CPLO_OATA_ACCESS 
SDA_LEN ; Segment limit 

SDA_LOC ; Segment base address - low word 

; Segment base address - high byte 

CPLO_DATA_ACCESS ; Access rights byte 

; Reserved 



0020 


1000 


0022 


0000 


0024 


OB 


0025 


93 


0026 


0000 



0028 UOOO 

002A 8000 

002C OB 

002D 93 

002E 0000 



0030 FFFF 

0032 0000 

0034 OA 

0035 93 

0036 0000 



0038 FFFF 

003A 0000 

003C OC 

003D 93 

003E 0000 



0040 FFFF 

0042 0000 

0044 OF 

0045 9B 

0046 0000 



0048 


FFFF 


004A 


0000 


004C 


00 


004D 


93 


004E 


0000 


0050 


FFFF 


0052 


0000 


0054 


00 


0055 


93 


0056 


0000 



COMPATIBLE MONOCHROME CRT 

!_DEF SEG, MCRT_SI2E, MCRT@_LO, MCRT@_H I , CPLO_DATA_ACCESS 
MCRT_SI7E ; Segment limit 

MCRT@_LO ; Segment base address - low word 

MCRT@_H I ; Segment base address - high byte 

CPLO_DATA_ACCESS ; Access rights byte 

; Reserved 

COMPAI IBLt COLOR CRI 

!_DEF SEG, CCRT_SIZE, CCRT@_LO, CCRT@_H I , CPLO_DATA_ACCESS 
CCRT_SIZE ; Segment limit 

CCRT@_LO ; Segment base address - low word 

CCRT@_H I ; Segment base address - high byte 

CPLO_DATA_ACCESS ; Access rights byte 

; Reserved 

ENHANCED COLOR CRT - ONE ENTRY FOR EACH 64K 

!_DEF SEG, ECCRT_SI2E, ECCRT@_LO_LO, ECCRT@_LO_H I , CPLO_DATA_ACCESS 
ECCRT_SIZE ; Segment limit 

ECCRT@_L0_LO ; Segment base address - low word 

ECCRT@_LO_H I ; Segment base address - high byte 

CPLO_DATA_ACCESS ; Access rights byte 

; Reserved 

SECOND PART OF CRT 

:_DEF SEG, ECCRT_SIZE, ECCRT@_H l_L0, ECCRT@_H 
ECCRTSIZE ; Segment limit 

ECCRT@_HI_LO ; Segment base address - low word 

ECCRT@_HI_HI ; Segment base address - high byte 

CPLO_DATA_ACCESS ; Access rights byte 

; Reserved 



CPLO_DATA_ACCESS 



CODE SEGMENT FOR POST CODE, SYSTEM IDT 



;_DEF SEG, 

MAX_SEG_LEN 
CSEG@_LO 
CSEG@_ 



CPLO_CODE_ACCESS 



MAX_SEG_LEN, CSEG@_LO, CSEG@_H I , CPLO_CODE_ACCESS 
; Segment I i mi t 

; Segment base address - low word 
Segment base address - high byte 



Access rights byte 



TEMPORARY DESCRIPTORS FOR ES, CS, SS, AND DS 

DESCR_DEF SEG, MAX_SEG_LEN, NSEG@_LO, NSEG@_HI, CPLO_DATA_ ACCESS 

DW MAX_SEG_LEN ; Segment limit 

DW NSEG@_LO ; Segment base address - low word 

DI3 NStG@_Hl ; Segment base address - high byte 

DB CPLO_DATA_ACCESS ; Access rights byte 

DW ; Reserved 



DESCR_DEF SEG, 
DW MAX_SEC_LEN 
DW NSEG@_LO 
NSEG@_HI 



CPLO_DATA_ACCESS 



MAX_SEG_LEN, NSEG@_LO, NSEG@_H I , CPLO_DATA_ACCESS 
; Segment limit 

; Segment base address - low word 
Segment base address - high byte 



Access rights byte 



GDT.BLD 5-85 



0058 


FFFF 


005A 


0000 


005C 


00 


005D 


93 


005E 


0000 


0060 


FFFF 


0062 


0000 


006U 


00 


0065 


93 


0066 


0000 



0068 0800 



006A 


COOO 


006C 


00 


006D 


81 


006E 


0000 


0070 


0800 


0072 


0068 R 


0074 


00 


0075 


93 


0076 


0000 


0078 




0078 


0088 


007A 


DOOO 


007C 


00 


007D 


E2 


007E 


0000 


0080 


0088 


0082 


0078 R 


0084 


00 


0085 


93 


0086 


0000 



DESCR_DEF SEG, MAX_SEG_LEN. NSEG@_LO, NSEG@_H I , CPLO_DATA_ACCESS 

DW MAX_SEG_LEN ; Segment limit 

DW NSEG@_LO ; Segment base address - low word 

DB NSEG@_HI ; Segment base address - high byte 

DB CPLO_DATA_ACCESS ; Access rights byte 

DW ; Reserved 

DESCR_DEF SEG. MAX_SEG_LEN, NSEG@_LO, NSEG@_HI, CPLO_DATA_ACCESS 

DW MAX_SEG LEN ; Segment limit 

DW NSEG@_LO ; Segment base address - low word 

DB NSEG@_HI ; Segment base address - high byte 

DB CPLO_DATA_ACCESS ; Access rights byte 

DW ; Reserved 

; POST_TR 
TR_LOC: 

DESCR_DEF 

DW 8O0H 

OCOOOH 



DB 
DB 



POST_TSS_PTR 

DESCR_DEF 
DW 800H 



SEG, 800H, OCOOOH, 0, FREE_TSS 

; Segment I imit 

; Segment base address - low word 

; Segment base address - high byte 
J ; Access rights byte 

; Reserved 

CPLO_DATA_ACCESS 



DB 
DW 



LDT_LOC: 

; POST_LDTR 

DESCR_DEF SEG, 
DW GDT_LEN 
DW ODOOOH 



SEG, 800H, TR_LOC, 

; Segment I imi t 
TR_LOC ; Segment base address - low word 

; Segment base address - high byte 

CPLO_DATA_ACCESS ; Access rights byte 

~ ; Reserved 



CPLO_DATA_ACCESS 



GDT_LEN, ODOOOH, 0, LOT_DESC 
Segment limit 

Segment base address - low word 
Segment base address - high byte 
OB LDT_OESC ; Access rights byte 

DW ; Reserved 

; POST_LDT_PTR 

DESCR_DEF SEG, GDT_LEN, LDT_LOC, 

DW GDT_LEN ; Segment limit 

DW LDT_LOG ; Segment base address - low word 

DB ; Segment base address - high byte 

DB CPLO_DATA_ACCESS ; Access rights byte 

DW ; Reserved 

PAGE 

GDT_DATA_END LABEL WORD 

• END OF PRE-ALLOCATED GDT 



0088 BE 0000 R 
0088 B9 0044 
008E F3/ A5 



MOV 
MOV 
REP 



SI, OFFSET GDT_DATA_START ; DS:S1 — > GDT 

CX, (GDT_DATA_END-GDT_DATA_START)/2 ; NUMBER OF WORDS TO COPY 

MOVSW ; COPY GDT INTO RAM 



0091 
0091 



GDT_BLD 
CODE 



5-86 GDT_BLD 



TITLE SIDT_BLD 6/10/83 PROTECTED MODE INTERRUPT TABLE 
SIDT_BLD Include files 



ASSUME 
ASSUME 
ASSUME 
ASSUME 



CSrCODE 
SS: NOTHING 
DS; NOTHING 
ES: NOTHING 



0000 


BE 0066 R 


0003 


8C C8 


0005 


8E D8 


0007 


BF DOAO 


OOOA 


2B CO 


0000 


8E CO 


OOOE 


BE 00*40 


oon 


B6 87 


0013 


B2 00 


0015 


B9 0020 



0019 


8B 03 


001B 


AB 


OOIC 


8B 02 


001 E 


AB 


001 F 


B8 0000 


0022 


AB 


0023 


E2 F3 


0025 


B9 OOEO 


0028 


BD 00A6 R 



002B 8B F5 

002D A5 

002E A5 

002F A5 

0030 AB 

0031 E2 F8 



0033 26: C7 06 D1A0 0000 E 

003A 26: 07 06 D1A8 0000 E 

0041 26: C7 06 D1B0 0000 E 

0048 26: C7 06 D1B8 0000 E 

OOUF 26: 07 06 D1C0 0000 E 

0056 26: 07 06 D1C8 0000 E 

005D 26: C7 06 DIDO 0000 E 



MOV 
MOV 
MOV 
MOV 
SUB 
MOV 

MOV 
MOV 
MOV 



MOVSW 

MOV 

STOSW 

MOV 

STOSW 

MOV 

STOSW 

LOOP 



PAGE 

HIGH_IDT: 

MOV 

MOVSW 
MOVSW 
MOVSW 
STOSW 
LOOP 



SI, OFFSET SYS_IDT_OFFSETS 

AX, OS 

DS,AX 

Dl ,SYS_IDT_LOC 



BX,SYS_ROM_CS 
DH,TRAP_GATE 
DL,0 



AX,BX 
AX,DX 
AX,0 
L0W_ I DT 



H I GH_ I DT 



POINT TO SYS_IDT_L0C 

WHERE THE IDT WILL BE. 

CS IS THE SAME FOR ALL INTERRUPTS 
ACCESS RIGHTS BYTE FOR THE GATE 
THE WORD COUNT FIELD IS UNUSED 

THERE ARE 32 RFSFRVFD INTERRUPTS 

THIS LOOP BUILDS 32 DESCRIPTORS IN THE 

IDT FOR THE RESERVED INTERRUPTS 
GET A ROUTINE ENTRY POINT 

AND PUT IT IN THE OFFSET FIELD 
GET THE SYSTEM CODE SEGMENT SELECTOR 

AND PUT IT IN THE SELECTOR FIELD 
GET THE INTERRUPT GATE BYTE 

AND PUT IT IN THE ACCESS RIGHTS FIELD 
ZERO OUT 

THE RESERVED POST IT IONS 
AND REPEAT AS DIRECTED 

256 TOTAL - 32 DONE = WHATEVER IS LEFT 
THERE IS A COPY OF AN UNINITIALIZED 
INTERRUPT DESCRIPTOR AT FREE_1NTS 



DS:SI --> FREE DESCRIPTOR 

(ES:DI LEFT OFF AT INT 32) 

MOVE THE OFFSET OF THE I RET INSTRUCTION 

MOVE THE CS SELECTOR 

MOVE THE ACCESS RIGHTS BYTE 

ZERO OUT THE RESERVED WORD 

FILL THE REMAINDER OF THE TABLE 



INITIALIZE THE ENTRY POINTS FOR POST TEST 

MOV WORD PTR ES: ( SYS_I DT_LOC+( 032*DESC_LEN ) . ENTRY_PO I NT) , OFFSET SYS_32 

MOV WORD PTR ES: ( SYS_I DT_LOC+( 033*DESC_LEN ) . ENTRY_PO I NT ) , OFFSET SYS_33 

MOV WORD PTR ES: ( SYS_I DT_LOC+( 034*DESC_LEN ) . ENTRY_PO I NT ) , OFFSET SYS_34 

MOV WORD PTR ES: ( SYS_I DT_LOC+( 035*DESC_LEN ). ENTRY_POI NT ), OFFSET SYS_35 

MOV WORD PTR ES: ( SYS_ I DT_LOC+( 036*DESC_LEN ) . ENTRY_PO I NT ) , OFFSET SYS_36 

MOV WORD PTR ES: ( SYS_ I DT_LOC+( 037*DESC_LEN ) . ENTRY_PO I NT ) , OFFSET SYS_37 

MOV WORD PTR ES: ( SYS_ I DT_LOC+( 038*DESC_LEN ) . ENTRY_PO I NT ) , OFFSET SYS_38 



0064 C3 



0065 
0065 CF 



RET 
PAGE 
I RET_ADDR 



LABEL 
I RET 



FOR UNINITIALIZED INTERRUPTS 



EXTRNS FOR THE FIRST 32 SYSTEM INTERRUPTS 



EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 



EXC_00:NEAR 
EXC_01:NEAR 
EXC_02:NEAR 
EXC_03:NEAR 
EXC_04:NEAR 
EXC_05:NEAR 
EXC_06:NEAR 
EXC_07:NEAR 
EXC_08:NEAR 
EXC_09:NEAR 
EXC_10:NEAR 
EXC_n:NEAR 
EXC_12:NEAR 
EXC_13:NEAR 
EXC_14:NEAR 
EXC_15:NEAR 
EXC_16:NEAR 
EXC_17:NEAR 
EXC_18:NEAR 
EXC_19:NEAR 
EXC_20:NEAR 
EXC_21:NEAR 
EXC_22:NEAR 
EXC_23:NEAR 
EXC_24:NEAR 
EXC_25:NEAR 
EXC_26:NEAR 
EXC_27:NEAR 



SIDT_BLD 5-87 



EXTRN EXC_28:NEAR 

EXTRN EXC_29:NEAR 

EXTRN EXC_30:NEAR 

EXTRN EXC_31:NEAR 



0066 


0000 




0068 


0000 




006A 


0000 




006C 


0000 




006E 


0000 




0070 


0000 




0072 


0000 




007U 


0000 




0076 


0000 




0078 


0000 




007A 


0000 




007C 


0000 




007E 


0000 




0080 


0000 




0082 


0000 




0084 


0000 




0086 


0000 




0088 


0000 




008A 


0000 




008C 


0000 




008E 


0000 




0090 


0000 




0092 


0000 




009U 


0000 




0096 


0000 




0098 


0000 




009A 


0000 




009C 


0000 




009E 


0000 




OOAO 


0000 




00A2 


0000 




00A4 


0000 


E 



00A6 
00A8 
OOAA 
00 AC 
OOAC 



0065 R 
OOUO 
00 86 





EXTRN 


SYS 32 


NEAR 




EXTRN 


SYS 33 


NEAR 




EXTRN 


SYS 34 


NEAR 




EXTRN 


SYS 35 


NEAR 




EXTRN 


SYS 36 


NEAR 




EXTRN 


SYS 37 


NEAR 




EXTRN 


SYS 38 


NEAR 


PAGE 










Entry points for the first 32 sy 


SYS_ 


DT_OFFSETS 




LABEL WORD 




DW 


OFFSET 


EXC 00 




DW 


OFFSET 


EXC 01 




DW 


OFFSET 


EXC 02 




DW 


OFFSET 


EXC 03 




DW 


OFFSET 


EXC OU 




DW 


OFFSET 


EXC 05 




DW 


OFFSET 


EXC 06 




DW 


OFFSET 


EXC 07 




DW 


OFFSET 


EXC 08 




DW 


OFFSET 


EXC 09 




DW 


OFFSET 


EXC 10 




DW 


OFFSET 


EXC 11 




DW 


OFFSET 


EXC 12 




DW 


OFFSET 


EXC 13 




DW 


OFFSET 


EXC 14 




DW 


OFFSET 


EXC_15 




DW 


OFFSET 


EXC 16 




DW 


OFFSET 


EXC 17 




DW 


OFFSET 


EXC 18 




DW 


OFFSET 


EXC 19 




DW 


OFFSET 


EXC 20 




DW 


OFFSET 


EXC 21 




DW 


OFFSET 


EXC 22 




DW 


OFFSET 


EXC 23 




DW 


OFFSET 


EXC 24 




DW 


OFFSET 


EXC 25 




DW 


OFFSET 


EXC 26 




OW 


OFFSET 


EXC 27 




DW 


OFFSET 


EXC 28 




DW 


OFFSET 


EXC 29 




DW 


OFFSET 


EXC 30 




DW 


OFFSET 


EXC 31 


PAGE 










FORMAT 


INTERRUPT DESCRIPTORS ( GA 


FREE_ 


.INTS 


DW 


OFFSET IRET ADDR 






DW 


SYS ROM CS 






OB 


0, INT GATE 


SIDT 


.BLD 


ENDP 




CODE 




ENDS 





INTERRUPTS AS DEFINED 

EXCPT 00 - DIVIDE ERROR 

EXCPT 01 - SINGLE STEP 

EXCPT 02 - NMI, SYS REQ FOR Dl 

EXCPT 03 - BREAKPOINT 

EXCPT 04 - INTO DETECT 

EXCPT 05 - BOUND 

EXCPT 06 - INVALID OPCODE 

EXCPT 07 - PROCESSOR EXT NOT AVAIL 

EXCPT 08 - DOUBLE EXCEPTION 

EXCPT 09 - PROCESSOR EXT SEGMENT ERR 

EXCPT 10 - STK PL BAD IN GATE TRANSFER 

EXCPT 11 - SEGMENT NOT PRESENT 

EXCPT 12 - STACK SEGMENT NOT PRESENT 

EXCPT 13 - GENERAL PROTECTION 



; EXCPT 16 - PROCESSOR EXTENSION ERROR 



DESTINATION OFFSET 
DESTINATION SEGMENT 
UNUSED BYTE, ACCESS RIGHTS BYTE 



5-88 SIDT.BLD 



TITLE DSKETTE DATE 01-12-84 DISKETTE BIOS 

.LIST 

INCLUDE SEGMENT. SRC 

CODE SEGMENT BYTE PUBLIC 



PUBLIC 
PUBLIC 
PUBLIC 
EXTRN 



DISK_INT_1 
SEEK 

DSKETTE_SETUP 
DOS; NEAR 



-- INT 13 

DISKETTE I/O 

THIS INTERFACE PROVIDES ACCESS TO THE 5 1/4" DISKETTE DRIVES 
320/360K DISKETTE DRIVES AND 1 . 2M DISKETTE DRIVES SUPPORTED 
INPUT 

(AH)=0 RESET DISKETTE SYSTEM 

HARD RESET TO NEC, PREPARE COMMAND, RECAL REQD ON ALL DRIVES 
(AH)=1 READ THE STATUS OF THE SYSTEM INTO (AH) 

DISKETTE_STATUS FROM LAST OP' N IS USED 
REGISTERS FOR REAU/WR I TE/VER I FY/ FORMAT 



DRIVE NUMBER (0-1 ALLOWED, VALUE CHECKED) 
HEAD NUMBER (0-1 ALLOWED, NOT VALUE CHECKED) 
TRACK NUMBER (NOT VALUE CHECKED) 

MEDIA DRIVE TRACK NUMBER 
320/360 320/360 0-39 

320/360 1.2M 0-39 

1.2M 1.2M 0-79 

(CL) - SECTOR NUMBER (NOT VALUE CHECKED, NOT USED FOR FORMAT) 
MEDIA DRIVE SECTOR NUMBER 
320/360 320/360 1-8/9 

320/360 1.2M 1-8/9 

1.2M 1.2M 1-15 

NUMBER OF SECTORS (NOT VALUE CHECKED) 

MEDIA DRIVE MAX NUMBER OF SECTORS 
320/360 320/360 8/9 

320/360 1.2M 8/9 



(DL) 
(DH) 
(CH) 



(AL) 



1.2M 



1 .2M 



15 



(ES:BX) - ADDRESS OF BUFFER ( REQUIRED FOR VERIFY) 

(AH)=2 READ THE DESIRED SECTORS INTO MEMORY 

(AH)=3 WRITE THE DESIRED SECTORS FROM MEMORY 

(AH)='+ VERIFY THE DESIRED SECTORS 

(AH)=5 FORMAT THE DESIRED TRACK 

FOR THE FORMAT OPERATION, THE BUFFER POINTER (ES,BX) MUST 

POINT TO THE COLLECTION OF DESIRED ADDRESS FIELDS FOR THE 

TRACK. EACH FIELD IS COMPOSED OF U BYTES, (C,H.R,N), WHERE 

C = TRACK NUMBER, H=HEAD NUMBER, R = SECTOR NUMBER, N= NUMBER 

OF BYTES PER SECTOR (00=128, 01=256, 02=512, 03=1024,) 

THERE MUST BE ONE ENTRY FOR EVERY SECTOR ON THE TRACK. 

THIS INFORMATION IS USED TO FIND THE REQUESTED SECTOR DURING 

READ/WRITE ACCESS. 

PRIOR TO FORMATTING A DISKETTE, FUNCTION CALL 17 OF THIS 

ROUTINE MUST BE INVOKED TO SET THE DISKETTE TYPE THAT IS TO 

BE FORMATTED. 

IN ORDER TO FORMAT 320/360K MEDIA IN EITHER A 320/360K OR 

1.2M DISKETTE DRIVE THE GAP LENGTH FOR FORMAT PARAMETER 

OF DISK_BASE MUST BE CHANGE TO 050H. ALSO THE EOT 

PARAMETER (LAST SECTOR ON TRACK) MUST BE SET TO THE 

DESIRED NUMBER OF SECTORS/TRACK - 8 FOR 320K, 9 FOR 360K. 

DISK_BASE IS POINTED TO BY DISK POINTER LOCATED AT 

ABSOLUTE ADDRESS 0:78. 

WHEN 320/360K FORMAT OPERATIONS ARE COMPLETE, THE PARAMETERS 

SHOULD BE RESTORED TO THEIR RESPECTIVE INITIAL VALUES. 

(AH)=15 READ DASD TYPE 

REGISTERS 

(AH) - ON RETURN IF CARRY FLAG NOT SET, OTHERWISE ERROR 

00 - DRIVE NOT PRESENT 

01 - DISKETTE, NO CHANGE LINE AVAILABLE 

02 - DISKETTE, CHANGE LINE AVAILABLE 

03 - FIXED DISK 

(DL) - DRIVE NUMBER (0-1 ALLOWED, VALUE CHECKED) 

(AH)=16 DISK CHANGE LINE STATUS 

REGISTERS 

(AH)=00 - DISK CHANGE LINE NOT ACTIVE 

06 - DISK CHANGE LINE ACTIVE & CARRY B I T ON 
(DL) - DRIVE NUMBER (0-1 ALLOWED, VALUE CHECKED) 

(AH)=17 SET DASD TYPE FOR FORMAT 

REGISTERS 

(AL) - 00 - NOT USED 

01 - DISKETTE 320/360K IN 320/360K DRIVE 

02 - DISKETTE 320/360K IN 1 . 2M DRIVE 

03 - DISKETTE 1 . 2M IN 1.2M DRIVE 

(DL) - DRIVE NUMBER (0-1 ALLOWED, VALUE CHECKED; 

DO NOT USE WHEN DISKETTE ATTACH CARD USED) 
DISK CHANGE STATUS IS ONLY CHECKED WHEN A 1 . 2M BYTE DISKETTE 
DRIVE IS SPECIFIED. IF THE DISK CHANGE LINE IS FOUND TO BE 
ACTIVE THE FOLLOWING ACTIONS TAKE PLACE: 

ATTEMPT TO RESET DISK CHANGE LINE TO INACTIVE STATE. 

IF ATTEMPT SUCCEEDS SET DASD TYPE FOR FORMAT AND RETURN DISK 

CHANGE ERROR CODE 

IF ATTEMPT FAILS RETURN TIMEOUT ERROR CODE AND SET DASD TYPE 

TO A PREDETERMINED STATE INDICATING MEDIA TYPE UNKNOWN. 
IF THE DISK CHANGE LINE IN INACTIVE PERFORM SET DASD TYPE FOR FORMAT. 

DATA VARIABLE -- DISK_POINTER 

DOUBLE WORD POINTER TO THE CURRENT SET OF DISKETTE PARAMETERS 
OUTPUT 

AH = STATUS OF OPERATION 

STATUS BITS ARE DEFINED IN THE EQUATES FOR D 1 SKETTE_STATUS 

VARIABLE IN THE DATA SEGMENT OF THIS MODULE 
CY = SUCCESSFUL OPERATION (AH=0 ON RETURN, EXCEPT FOR READ DASD 

TYPE AH=(15)). 
CY = 1 FAILED OPERATION (AH HAS ERROR REASON) 
FOR READ/WRITE/VERIFY 

DS, BX, DX,CH,CL PRESERVED 
NOTE: IF AN ERROR IS REPORTED BY THE DISKETTE CODE, THE APPROPRIATE 

ACTION IS TO RESET THE DISKETTE, THEN RETRY THE OPERATION. 

ON READ ACCESSES, NO MOTOR START DELAY IS TAKEN, SO THAT 

THREE RETRIES ARE REQUIRED ON READS TO ENSURE THAT THE 

PROBLEM IS NOT DUE TO MOTOR START-UP. 

DISKETTE STATE MACHINE - 

(DRIVE - 90, DRIVE 1 
BITS 



1 7 

1 


6 


5 


1 
k 1 

1 


1 1 

J 1 2 1 

1 1 


1 1 
1 1 

1 1 



Diskette 5-89 



1 RESERVED 




1 000: 


360K 


1 001: 


360K 


1 002: 


1 .2M 


1 003: 


360K 


1 OOU: 


360K 


1 005: 
> MEDIA 


1 .2M 
/DRIV 



--PRESENT STATE 

IN 360K DRIVE UNESTABLI SHED 
IN 1.2M DRIVE UNESTABLISHED 
IN 1.2M DRIVE UNESTABLISHED 
IN 360K DRIVE ESTABLISHED 
IN 1.2M DRIVE ESTABLISHED 



media/drive: established 



■ DATA TRANSFER RATE FOR THIS DRIVE: 



STATE OPERATION STARTED • 
(DRIVE - 92, DRIVE 1 ■ 

PRESENT CYLINDER NUMBER ■ 
(DRIVE - 9U, DRIVE 1 ■ 



00: 500 KBS 

01: 300 KBS 

10: 250 KBS 

1 1 : KESLRVLD 

ABSOLUTE ADDRESS 40:92 & 93 

93) 

ABSOLUTE ADDRESS 40:9'+ & 95 

95) 



ASSUME CS:CODE,DS:DATA,ES:DATA 



PUBLIC DISKETTE_I0_1 



0000 








0000 


FB 






0001 


53 






0002 


51 






0003 


IE 






ooou 


56 






0005 


57 






0006 


55 






0007 


52 






0008 


8B 


EC 




OOOA 


BE 




-- R 


OOOD 


8E 


DE 




OOOF 


80 


FC 


01 


0012 


76 


OF 




OOIU 


80 


FA 


01 


0017 


76 


OA 




0019 


C6 


06 


0041 R 01 


OOIE 


BE 


0000 


0021 


EB 


49 




0023 


50 






0024 


t8 


OlOC R 


0027 


5E 






0028 


8B 


D6 




002A 


80 


FE 


01 


002D 


76 


3D 




002F 


F6 


06 


008F R 01 


0034 


74 


36 




0036 


80 


FE 


15 


0039 


73 


31 




003B 


8B 


56 


00 


003E 


32 


FF 




0040 


8A 


DA 




0042 


8A 


26 


0041 R 


0046 


OA 


E4 




0048 


75 


4C 




004A 


8A 


A7 


0090 R 


004E 


F6 


C4 


10 


0051 


75 


14 




0053 


8A 


CC 




0055 


80 


El 


07 


0058 


80 


CI 


03 


005B 


80 


E4 


F8 


005E 


OA 


El 




0060 


80 


CC 


10 


0063 


88 


A7 


0090 R 


0067 


C6 


87 


0092 R 00 


006C 


BB 


0004 


006F 


8B 


D6 




0071 


50 






0072 


E8 


0382 R 


0075 


88 


26 


0040 R 


0079 


58 






007A 


80 


FF 


15 


007D 


75 


05 




007F 


86 


EO 




0081 


F8 






0082 


EB 


08 




0084 


8A 


26 


0041 R 


0088 


80 


FC 


01 


008B 


F5 






008C 


5A 






008D 


5D 






008E 


5F 






008F 


5E 






0090 


F 






0091 


59 






0092 


5B 






0093 


CA 


0002 


0096 


80 


3E 


0041 R 06 


009B 


74 


54 




009D 


8A 


A7 


0090 R 


OOAl 


80 


E4 


07 


00A4 


80 


FC 


03 


O0A7 


73 


BE 




00A9 


FE 


C4 




OOAB 


80 


FC 


03 


OOAE 


75 


02 




OOBO 


84 


00 




00B2 


8A 


AF 


0092 R 


00B6 


80 


E5 


07 


00B9 


3A 


EC 





R20: 
R19: 



PUSH 


BX 




PUSH 


CX 




PUSH 


DS 




PUSH 


SI 




PUSH 


Dl 




PUSH 


BP 




PUSH 


DX 




MOV 


HP 


SP 


MOV 


SI 


DATA 


MOV 


DS 


SI 


CMP 


AH 


1 


JBE 


R4 





»> ENTRY POINT FOR ORG 0EC59H 
INTERRUPTS BACK ON 
SAVE ADDRESS 



; SET UP POINTER TO HEAD PARM 

; SET DATA REGION 

; CHECK FOR RESET AND STATUS OPERATIONS 

; BYPASS DRIVE CHECK IF YES 



MOV DISKETTE_STATUS,BAD_CMD ; INVALID DRIVE ADDRESS, TERMINATE 

MOV Sl,0 ; INSURE THAT RETURN STATUS GETS SETUP 

JMP SHORT OK ; GO TERMINATE COMMAND 

PUSH AX ; SAVE ORIGINAL OPERATION FOR RETRY L7VTER ON 

CALL J1 ; CALL THE REST TO ENSURE DS RESTORED 

POP SI ; RESTORE ORIGINAL OPERATION FOR RETRY 

MOV DX, SI ; GET ORIGINAL OPERATION FOR TESTING 

CMP DH,1 ; SEE IF IT IS A RESET OR STATUS OPERATION 

JBE OK ; BYPASS STATE UPDATE 



TEST HF_CNTRL, DUAL 



MOV DX, [BP] 

XOR BH,BH 

MOV BL,DL 

MOV AH,DISKETTE_STATUS ; GET STATUS OF OPERATION 

OR AH, AH ; SEE IF ANY ERRORS 

JNZ RETRY ; JUMP TO CHECK FOR MEDIA CHANGE 

MOV AH,OSK_STATE[BX] ; GET MEDIA STATE OF DRIVE 

TEST AH, DETERMINED ; SEE IF MEDIA STATE SET ALREADY 

JNi' OK? ; IF SET, DONT CHANGE STATE 



MOV 

AND 

ADD 

AND 

OR 

OR 

MOV 

MOV 

MOV 

MOV 

PUSH 

CALL 

MOV 

POP 



XCHG AH,AL 
JMP SHORT R19 



MOV 
CMP 
CMC 
POP 
POP 
POP 
POP 
POP 
POP 
POP 
RET 



MOV 
AND 
CMP 
JAE 



CL,AH 

CL,STATE_MSK 

CL,3 

AH,REV_STATE 

AH,CL 

AH, DETERMINED 

DSK_STATE[BX],AH 

DSK_STATE(BX+2],0 

BX.4 

DX,SI 



AH,DISKETTE_STATUS 



HANDLE STATES 0, 1 & 2 



GET PRESENT STATE 
ISOLATE STATE NUMBER 
ELEVATE STATE TO SET ALREADY 
CLEAR OUT STATE NUMBER 
SET NEW STATE NUMBER 
MAKE MEDIA STATE SET 
; SAVE IN DRIVE STATE INDICATOR 
; CLEAR ORIGINAL STATE OPERATION STARTED IN 
GET THE MOTOR WAIT PARAMETER 
GET ORIGINAL OP AGAIN 
SAVE RETURN VALUE 

SET THE TIMER COUNT FOR THE MOTOR 

RESTORE RETURN VALUE 

SEE IF READ DASD OPERATION 

IF NOT BYPASS 

PUT RESULT IN AH 

SET SUCCESSFUL OPERATION 

GO LEAVE 

GET STATUS OF OPERATION 
SET THE CARRY FLAG TO INDICATE 

SUCCESS OR FAI LURE 
RESTORE ALL REGISTERS 



GET MEDIA STATE Of DRIVE 
ISOLATE STATE 
SEE IF IN STATE 3 
IF ESTABLISHED STATE THEN TRUE ERROR 



TRY NEXT STATE 

SEE IF OVERFLOW IN NON-ESTABLISHED STATES 

SKIP RESET TO BEGINNING IF YES 



MOV AH,0 ; NEXT STATE TO TRY Af- TEK OVERFLOW 

MOV CH,DSK_STATE[BX+21 ; GET START RETRY STATE 

AND CH,STATE_MSK ; ISOLATE STATE BITS 

CMP CH,AH ; ALL STATES TRIED 



5-90 Diskette 



OOBB 


74 


U7 




OOBD 


8A 


AF 


0090 R 


00C1 


DO 


C5 




00C3 


DO 


C5 




OOC^ 


80 


E5 


03 


00C8 


FE 


CD 




OOCA 


80 


FD 


FF 


OOCD 


75 


02 




OOCF 


B5 


02 




0OD1 


DO 


CD 




00D3 


DO 


CD 




00D5 


80 


FC 


01 


0008 


75 


03 




OODA 


80 


CD 


20 


OODD 


OA 


E5 




OODF 


88 


A7 


0090 R 



00E3 8B 55 00 

00E6 8B UE OA 

00E9 8B 5E OC 

OOEC 8B C6 

OOEE E9 0023 R 

OOFl 8B 56 00 

OOFU E8 060U R 

00F7 75 03 

00F9 E9 0067 R 



JE 


0K3 


SETUP 


STATE INDICATOR FC 


MOV 


CH.DSK STATE[BX 


ROL 


CH, 1 


ROL 


CH,1 


AND 


CH.TRAN MSK 


DEC 


CH 


CMP 


CH.OFFH 


JNE 


R3 


MOV 


CH,XRATE 


ROR 


CH,1 


ROR 


CH,1 


CMP 


AH, 1 


JNE 


R9 



CH,DOUBLE_STEP 

AH,CH 

DSK_STATE[BX].AH 



IF YES, THEN TRUE ERROR 



ISOLATE TRANSFER RATE BITS 
CONVERT TO NEXT RATE 
SEE IF OVERFLOW OCCURRED 
JUMP I F NO OVERFLOW 



MOV 

SETUP FOR ACTUAL RETRY OPERATION 



; WHERE THEY BELONG 



TURN ON DOUBLE STEP REQUIRED 
COMBINE WITH STATE TO MAKE NEW INDICATOR 
SAVE AS NEW INDICATOR 



MOV 
MOV 
MOV 
MOV 
JMP 

MOV 
CALL 
JNZ 



OX, [BP] 

READ_DSKCHNG 

OKU 



RESTORE PARAMETERS FROM STACK 

GO RETRY OPERATION 

RESTORE DRIVE PARMETER 

GO READ DISK CHANGE LINE STATUS 

IF ACTIVE, NO DISKETTE IN DRIVE, TIMEOUT 

IF NOT ACTIVE, DISKETTE IN DRIVE, DISK CHANGE 

INDICATE TIMEOUT IF DRIVE EMPTY 

, POA_START ; ERROR PUT STATE AT POWER ON ASSUMPTION 



DISKETTE_IO_1 



010C 

OlOC 80 FC 01 

OlOF 76 76 

Om F6 06 008F R 01 



DETERMINE NEW MEDIA TYPE, NEED TO RESET DISK CHANGE LINE HERE 



PROC 
CMP 
JBE 



NEAR 
AH, 1 
J1E 



0118 


80 


FC 


15 


011B 


73 


6A 




OIID 


50 






011E 


53 






011F 


51 






0120 


52 






0121 


E8 


0604 R 


0124 


74 


OC 




0126 


E9 


05E2 R 


0129 


50 






012A 


53 






012B 


51 






012C 


52 






012D 


E8 


0604 R 


0130 


EB 


51 




0132 


8A 


87 


0090 R 


0136 


OA 


CO 




0138 


75 


06 




013A 


BO 


80 




013C 


88 


87 


0090 R 


0140 


3C 


61 




0142 


75 


IE 




0144 


8B 


4E 


OA 


0147 


80 


FD 


28 


014A 


72 


16 




014C 


C6 


87 


0090 R 02 


0151 


BO 


02 




0153 


8A 


B7 


0092 R 


0157 


OA 


F6 




0159 


75 


13 




015B 


C6 


87 


0092 R 61 


0160 


EB 


OC 




0162 


8A 


97 


0092 R 


0166 


OA 


02 




0168 


75 


04 




016A 


88 


87 


0092 R 


016E 


8A 


OE 


008 B R 


0172 


3A 


CI 




0174 


74 


OD 




0176 


A2 


008B R 


0179 


DO 


CO 




017B 


DO 


CO 




017D 


24 


03 




017F 


BA 


03F7 


0182 


EE 






0183 


5A 






0184 


59 






0185 


5B 






0186 


58 






0187 


8A 


FO 




0189 


80 


26 


003F R 7F 


018E 


OA 


E4 




0190 


74 


38 




0192 


FE 


CC 




0194 


74 


76 




0196 


C6 


06 


0041 R 00 


019B 


FE 


CC 




019D 


74 


6E 




019F 


FE 


CC 




OlAl 


75 


03 




01A3 


E9 


0240 R 



PUSH 
PUSH 
PUSH 
PUSH 
CALL 
JZ 

JMP 

PUSH 
PUSH 
PUSH 
PUSH 
CALL 
JMP 

MOV 

OR 

JNZ 



MOV 
MOV 
MOV 



MOV 

OR 

JNZ 

MOV 
MOV 
CMP 



MOV 
ROL 
ROL 
AND 
MOV 
OUT 
POP 
POP 
POP 
POP 
MOV 
AND 



DEC 
JNZ 
JMP 



READ_DSKCHNG 
J1 I 

JIF 



HANDLE DISK CHANGE LINE ACTIVE 



AL,DSK_STATE[BX] 
AL,AL ; 

JID ; 



GET MEDIA STATE INFORMATION FOR DRIVE 
CHECK FOR NO STATE INFORMATION AT ALL 
IF INFORMATION DONT DEFAULT 



GET ORIGINAL TRACK PARAMETER 

SEE IF TRACK IS PAST END OF D I SKETTE( 320 ) 

GO TRY OPERATION AT THIS STATE IF NOT 



CX, [BP+10] 

CH,40 

JIG 

DSK_STATE[BX],02H ; SET NEXT STATE TO TRY IN ALGORITHM 

AL,02H ; PUT NEW STATE IN WORKING REGISTER 

DH,DSK_STATEIBX+2] ; OFT OPERATION START STATE 

DH,DH ; CHECK FOR OPERATION START 

JIC ; IF STARTED PREVIOUSLY, BYPASS SETTING IT UP 



DL,DSK_STATE[BX+21 ; GET START MEDIA STATE 



DSK_STATE[BX+2] 
CL, LASTRATE 
AL,CL 
J1H 

LASTRATE, AL 

AL, 1 

AL, 1 

AL, TRAN_MSK 

DX,03F7H 

DX,AL 



DX 
CX 



DH,AL 
MOTOR_STATUS, 07 FH 
AH, AH 
DISK_RESET 



L ; SAVE AS STARTING DATA RATE 
GET LAST DATA RATE SELECTED 
COMPARE TO LAST OPERATION 
IF SAME DONT SELECT NEW TRANSFER RATE 



CLEAR ALL BITS BUT DATA TRANSFER RATE BITS 
ADDRESS FLOPPY CONTROL REGISTER 
SET DATA TRANSFER RATE 
RESTORE PARAMETERS 



AH=0 
AH=1 



RESET THE STATUS INDICATOR 



DISK_READ 



DISK_WRITE 



AH=2 

AH=3 
TEST_DISK_VERF 



Diskette 5-91 



01 A6 






01 A6 


FE 


CC 


01 A8 


74 


6C 


01 AA 


FE 


CC 


01 AC 


74 


6C 


01AE 


80 


EC 10 


01 B1 


75 


03 


01 B3 


E9 


0698 R 


01 B6 


FE 


CC 


01 B8 


75 


03 


01 BA 


E9 


0646 R 


01 BD 


FE 


CC 


01 BF 


75 


03 


01C1 


E9 


070D R 


0104 


C6 


06 0041 R 01 


01 C9 


C3 




01 CA 






01 CA 






01 CA 


BA 


03F2 


01 CD 


FA 




OICE 


AO 


003F R 


01 Dl 


24 


3F 


01 D3 


Bl 


04 


01 D5 


D2 


CO 


01 D7 


OC 


08 


01 D9 


EE 




01 UA 


C6 


06 003E R 00 


01 DF 


C6 


06 0041 R 00 


01 E4 


EB 


00 


01 E6 


OC 


04 


01 E8 


EE 




01 E9 


FB 




01 EA 


E8 


051A R 


01 ED 


AO 


0042 R 


01 FO 


3C 


CO 


01 F2 


74 


06 


01 F4 


80 


OE 0041 R 20 


01 F9 


C3 




01 FA 






01 FA 


B4 


03 


01 FC 


E8 


03E2 R 


01 FF 


BB 


0001 


0202 


E8 


0382 R 


0205 


BB 


0003 


0208 


E8 


0382 R 


020B 


C3 




020C 






02 OC 






020C 


C3 




020D 






020D 






020D 


BO 


46 


020F 






020F 


E8 


04CA R 


0212 


84 


E6 


0214 


EB 


36 


0216 






0216 






0216 


BO 


42 


0218 


EB 


F5 


021A 






021 A 






021A 


80 


OE 003F R 80 


02 IF 


BO 


4A 


0221 


E8 


04CA R 


0224 


84 


4D 


0226 


EB 


24 


0228 






0228 


BB 


0007 


022B 


E8 


0382 R 


022E 


BB 


0009 


0231 


E8 


0382 R 


0234 


BB 


OOOF 


0237 


C8 


0382 R 


023A 


BB 


0011 


023D 


E9 


032A R 


0240 






0240 






0240 


80 


OE 003F R 80 


0245 


BO 


4A 


0247 


E8 


04CA R 


024A 


B4 


C5 


0240 







DEC 


AH ; 


JZ 


DISK VERF 


DEC 


AH ; 


JZ 


DISK FORMAT 


SUB 


AH, 10H 


JNZ 


J3 ; 


JMP 


DISK_TYPE ; 


J3: DEC 


AH ; 


JNZ 


J4 ; 


JMP 


OISK_CHANGE ; 


J4: DEC 


AH ; 


JNZ 


J5 ; 


JMP 


FORMAT_SET ; 


J5: MOV 


UI5KLI IE_STATUS,B 


RET 




Jl ENDP 




. RESET 


THE DISKETTE SYSTEM 


DISK RESET 


PROC NEAR 


MOV 


DX,03F2H ; 


CLI 




MOV 


AL, MOTOR STATUS ; 


AND 


AL,03FH ; 


MOV 


CL,4 ; 


ROL 


AL,CL ; 


OR 


AL,8 ; 


OUT 


DX,AL ; 


MOV 


SEEK STATUS, ; 


MOV 


DISKETTE STATUS. 


JMP 


$+2 ; 


OR 


AL,4 ; 


OUT 


DX,AL ; 


STI 




CALL 


CHK STAT 2 ; 


MOV 


AL, NEC STATUS ; 


CMP 


AL,OCOH ; 



BYPASS DISK TYPE OPERATION 

GO PERFORM DISK TYPE OPERATION 

AH = 16H 

BYPASS DISK CHANGE STATUS 

GO CHECK DISK CHANGE LINE STATUS 

AH = 17H 
BAD COMMAND 

GO SET MEDIA/DRIVE TYPE FOR FORMAT 



ADAPTER CONTROL PORT 

NO INTERRUPTS 

WHICH MOTOR IS ON 

STRIP OFF UNWANTED BITS 

SHIFT COUNT 

MOVE MOTOR VALUE TO HIGH NIBBLE, DRIVE SELECT 

TO LOW NIBBLE 
TURN ON INTERRUPT ENABLE 
RESET THE ADAPTER 

SET RECAL REQUIRED ON ALL DRIVES 
; SET OK STATUS FOR DISKETTE 
I/O WAIT STATE 
TURN OFF RESET 
TURN OFF THE RESET 
REENABLE THE INTERRUPTS 

DO SENSE INTERRUPT STATUS FOLLOWING RESET 
IGNORE ERROR RETURN AND DO OWN TEST 
TEST FOR DRIVE READY TRANSITION 
EVERYTHING OK 
SKETTE_STATUS,BAD_NEC ; SET ERROR CODE 



RET 

SEND SPECIFY COMMAND TO NEC 



MOV 

CALL 

MOV 

CALL 

MOV 

CALL 



GET_PARM 
BX, 3 
GET_PARM 



DISK_STATUS 

RET 

DISK_STATUS 



ENDP 
SKETTE STATUS ROUTINE 
PROC NEAR 
ENDP 
DISKETTE READ 



DISK_READ 

MOV 

J9: 

CALL 
MOV 
JMP 

DISK_READ 



DMA_SETUP 
AH,0E6H 
SHORT RW_OPN 
ENDP 



DRIVE_READY 
SPEC I FY COMMAND 
OUTPUT THE COMMAND 
FIRST BYTE PARM IN BLOCK 

TO THE NEC CONTROLLER 
SECOND BYTE PARM IN BLOCK 

TO THE NEC CONTROLLER 
RESET_RE 
RETURN TO CALLER 



READ COMMAND FOR DMA 

DISK_REA0_CONT 

SET UP THE DMA 

SET UP READ COMMAND FOR NEC CONTROLLER 

GO DO THE OPERATION 



DISKETTE VERI FY 



ISK_VERF 

MOV 
JMP 

ISK_VERF 



J9 



ENDP 

DISKETTE FORMAT 

ISK_FORMAT 



JIO: 



OR 

MOV 

CALL 

MOV 

JMP 



MOV 
CALL 
MOV 
CALL 
MOV 
CALL 
MOV 
JMP 
DISK_FORMAT 



PROC NEAR 

MOTOR_STATUS,WRITE_OP 

AL, 04AH 

DMA_SETUP 

AH,04DH 

SHORT RW_OPN 

BX, 7 

GEI_PARM 
BX, 9 

GET_PARM 
BX, 15 
GET_PARM 
BX, 17 
J16 
ENDP 



INDICATE WRITE OPERATION 

WILL WRITE TO THE DISKETTE 
SET UP THE DMA 

ESTABLISH THE FORMAT COMMAND 
DO THE OPERATION 
CONTINUATION OF RW_OPN FOR FMT 
GET THE 

BYTES/SECTOR VALUE TO NEC 
GET THE 

SECTORS/TRACK VALUE TO NEC 
GET THE 

GAP LENGTH VALUE TO NEC 
GET THE FILLER BYTE 

TO THE CONTROLLER 



DISKETTE WRITE ROUTINE 



DISK_WRITE PROC NEAR 

OR MOT0R_STATUS,WRITE_OP 

MOV AL, 04AH 

CALL DMA_SETUP 

MOV AH,0C5H 

DISK_WRITE ENDP 

-- ALLOW WRITE ROUTINE TO FALL INTO RW_OPN 



NEC COMMAND TO WRITE TO DISKETTE 



RW_OPN 



THIS ROUTINE PERFORMS THE READ/WRITE/VERIFY OPERATION 



024C 




024C 


73 08 


024E 


C6 06 0041 R 09 


0253 


BO 00 


0255 


C3 


0256 




0256 


50 



PROC NEAR 

JNC J11 ; TEST FOR DMA ERROR 

MOV DISKETTE_STATUS,DMA_BOUNDARY ; SET ERROR 

MOV AL,0 ; NO SECTORS TRANSFERRED 

RET ; RETURN TO MAIN ROUTINE 

; DO_RW_OPN 

PUSH AX ; SAVE THE COMMAND 

• TURN ON THE MOTOR AND SELECT THE DRIVE 



5-92 Diskette 



0257 


51 






0258 


8A 


CA 




025A 


BO 


01 




025C 


02 


EO 




025E 


FA 






025F 


&H 


06 003 F R 




0263 


m 


OC 




0265 


80 


3E 0040 R 


EC 


026A 


C6 


06 0040 R 


FF 


026F 


72 


42 




0271 


08 


06 003F R 




0275 


B1 


04 




0277 


80 


26 003F R 


CF 


027C 


D2 


C2 




027E 


08 


16 003F R 




0282 


02 


CA 




0284 


FB 






0285 


AO 


003F R 




0288 


2U 


3F 




028A 


D2 


CO 




028C 


OC 


OC 




028E 


52 






028F 


BA 


03F2 




0292 


EE 






0293 


5A 






0294 


F8 






0295 


B8 


90FD 




0298 


CD 


15 




029A 


72 


17 




029C 


BB 


0014 




029F 


E8 


0382 R 




02A2 


OA 


E4 




02A14 








02Af4 


m 


OD 




02A6 


2B 


09 




02A8 


E2 


FE 




0?AA 


B9 


6D06 




02AD 


E2 


FE 




02AF 


FE 


CC 




02B1 


75 


F1 




02B3 








02B3 


FB 






02B4 


59 






02B5 


E8 


041C R 




02B8 


58 






0289 


8A 


FC 




02BB 


B6 


00 




02BD 


72 


72 




02BF 


BE 


0331 R 




02C2 


56 






02C3 


E8 


03E2 R 




02C6 


8A 


66 01 




02C9 


DO 


E4 




02CB 


DO 


E4 




02CD 


80 


E4 04 




02D0 


OA 


E2 




02D2 


E8 


03E2 R 




02D5 


80 


FF 4D 




02D8 


75 


03 




02 DA 


E9 


0228 R 




02DD 


8A 


E5 




02DF 


E8 


03E2 R 




02 E2 


8A 


66 01 




02E5 


E8 


03E2 R 




02 E8 


8A 


El 




02 EA 


E8 


03E2 R 




02ED 


BB 


0007 




02 FO 


E8 


0382 R 




02F3 


BB 


0009 




02 F6 


E8 


0382 R 




02 F9 


8B 


5E 00 




02 FC 


32 


FF 




02FE 


8A 


A7 0090 R 




0302 


F6 


C4 10 




0305 


7h 


06 




0307 


80 


E4 07 




030A 


80 


EC 03 




030D 


80 


E4 07 




0310 


80 


FC 00 




0313 


75 


04 




0315 


BU 


2A 




0317 


EB 


OB 




0319 


80 


FC 01 




031C 


75 


04 




031E 


B4 


23 




0320 


EB 


02 




0322 


BH 


IB 




0324 


E8 


03E2 R 




0327 


BB 


OOOD 




032A 








032A 


E8 


0382 R 




032D 


5E 






032E 


E8 


053B R 




0331 








0331 


72 


45 





PUSH 
MOV 
MOV 
SAL 



AL,M0T0R_STATUS 



M0TOR_COUNT,0ECH 
M0TOR_COUNT,0FFH 
J14 



M0TOR_STATUS,AL 





MOV 


CL,4 




AND 


MOTOR STATUS, OCFH 




ROL 


DL,CL 




OR 


MOTOR STATUS, DL 




ROR 


DL,CL 




STI 






MOV 


AL, MOTOR STATUS 




AND 


AL,03FH 




ROL 


AL,CL 




OR 


AL.OCH 




PUSH 


DX 




MOV 


DX,03F2H 




OUT 


DX.AL 




POP 


DX 




-- WAIT 


FOR MOTOR 




CLC 






MOV 


AX,090FDH 




INT 


15H 




JC 


J14 




MOV 


BX,20 




CALL 


GET PARM 




OR 


AH, AH 


J12: 








JZ 


J14 




SUB 


CX,CX 


J13: 


LOOP 


J13 




MOV 


CX,06D06H 


R18: 


LOOP 


R18 




DEC 


AH 




JNZ 


J12 



SAVE THE T/S PARMS 

GET DRIVE NUMBER AS SHIFT COUNT 

MASK FOR DETERMINING MOTOR BIT 

SHI FT THE MASK BIT 

NO INTERRUPTS WHILE DETERMINING MOTOR STATUS 

IS THIS MOTOR ON 

IF NOT GO TEST FOR WAIT NECESSARY 

SEE I F THE MOTOR HAS BEEN ON LONG ENOUGH 
ENSURE MOTOR DOESNT TURN OFF DURING OPERATION 
IS LESS THAN EC, THEN TURN ON NOT DUE TO 

READING OF DISK CHANGE LINE, OTHERWISE 

GO TEST FOR WAIT NECESSARY 

TURN ON THE CURRENT MOTOR 

SHIFT COUNT TO MOVE DRIVE TO HIGH NIBBLE 

CLEAR ENCODED DRIVE SELECT BITS(4 & 5) 

MOVE DRIVE ENCODED BITS TO HIGH NIBBLE 

SAVE AS SELECTED DRIVE 

RESTORE 

INTERRUPTS BACK ON 

GET MOTORS ON AND DRIVE SELECTED 

STRIP OFF UNWANTED BITS 

SHIFT BITS AROUND TO DESIRED POSITIONS 

NO RESET, ENABLE DMA/ I NT 

SAVE REG 

CONTROL PORT ADDRESS 

; RECOVER REGISTERS 



CLEAR TIMEOUT INDICATOR 

LOAD WAIT CODE & TYPE 

PERFORM OTHER FUNCTION 

BYPASS I I MING LOOP If I I MtOU I OCGUKRLD 

GET THE MOTOR WAIT 

PARAMETER 
TEST FOR NO WAIT 
TEST_WAIT_TIME 
EXIT WITH TIME EXPIRED 
SET UP 1/8 SECOND LOOP TIME 
WAIT FOR THE REQUIRED TIME 





-- DO TH 
CALL 


E SEEK OPERATION 
SEEK 




POP 


AX 




MOV 


BH,AH 




MOV 


DH,0 




JC 


J17 




MOV 


SI, OFFSET J17 




PUSH 


SI 




-- SEND 


OUT THE PARAMETERS 




CALL 


NtC OUIPUI 




MOV 


AH,IBP+1 ] 




SAL 


AH, 1 




SAL 


AH. 1 




AND 


AH, 4 




OR 


AH,DL 




CALL 


NEC_OUTPUT 


._--_ 


— TEST 


FOR FORMAT COMMAND 




CMP 


BH.04DH 




JNE 


J15 




JMP 


J10 


J15: 


MOV 


AH,CH 




CALL 


NEC OUTPUT 




MOV 


AH,1BP+1] 




CALL 


NEC OUTPUT 




MOV 


AH.CL 




CALL 


NEC OUTPUT 




MOV 


BX,7 




CALL 


GET PARM 




MOV 


BX,9 




CALL 


GET PARM 




MOV 


BX, [BP] 




XOR 


BH.BH 




MOV 


AH.DSK STATE! BX 




TEST 


AH, DETERMINED 




JZ 


DO 


' 


AND 


AH,07H 




SUB 


AH,03H 


DO: 


AND 


AH,07H 




CMP 


AH,0 




JNE 


R16 




MOV 


AH,0?AH 




JMP 


SHORT R15 


R16: 


CMP 


AH,1 




JNE 


R17 




MOV 


AH,023H 




JMP 


SHORT R15 


R17: 


MOV 


AH,01BH 


R15: 


CALL 


NEC OUTPUT 




MOV 


BX, 13 


J16: 








CALL 


GET PARM 




POP 
-- LET T 


SI 
HE OPERATION HAPPEh 



MOVE TO CORRECT TRACK 
RECOVER COMMAND 
SAVE COMMAND IN BH 

SET NO SECTORS READ I.N CASE OF ERROR 
IF ERROR, THEN EXIT AFTER MOTOR OFF 
DUMMY RETURN ON STACK FOR NEC_OUTPUT 
SO THAT IT WILL RETURN TO MOTOR OFF LOCATION 



OUIPUT IHL OPEKAl ION COMMAND 
GET THE CURRENT HEAD NUMBER 
MOVE IT TO BIT 2 



IS THIS A FORMAT OPERATION 
NO. CONTINUE WITH R/W/V 
I F SO, HANDLE SPECIAL 

CYLINDER NUMBER 

HEAD NUMBER FROM STACK 

SECTOR NUMBER 

BYTES/SECTOR PARM FROM BLOCK 

TO THE NEC 
EOT PARM FROM BLOCK 

TO THE NEC 
RESTORE DRIVE NUMBER FROM PARMS 
CLEAR H.IGH ORDER INDEX REGISTER 
; GET DRIVE STATE VALUE 
SEE IF STATE ALREADY ESTABLISHED 
BYPASS STATE REDUCTION FOR GAP LENGTH 

;1TS 



STRIP OFF HIGH BITS 

CHECK FOR DISKETTE ATTACH CARD OR 320 DRIVE 

IF NOT CHECK FOR NEXT STATE 



LOAD 320/360 MEDIA IN 1.2 DRIVE GAP LENGTH 



LOAD 1.2 MEDIA IN 1.2 DRIVE GAP LENGTH 

DTL PARM FROM BLOCK 
RW_OPN_FINISH 

TO THE NEC 
CAN NOW DISCARD THAT DUMMY RETURN ADDRESS 



CALL WAIT_INT 
JC J21 



WAIT FOR THE IN' 
MOTOR_0FF 
LOOK FOR ERROR 



Diskette 5-93 



0333 


E8 


0580 R 


0336 


72 


3F 


0338 


FC 




0339 


BE 


0042 R 


033C 


AC 




0330 


24 


CO 


033F 


74 


38 


0341 


3C 


40 


OSUS 


75 


29 


0315 


AC 




03'»6 


DO 


EO 


0348 


B4 


04 


034A 


72 


24 


034C 


DO 


EO 


03i»E 


DO 


EO 


0350 


B4 


10 


0352 


72 


IC 


035U 


DO 


EO 


0356 


B4 


08 


0358 


72 


16 


035A 


DO 


EO 


035C 


DO 


EO 


035E 


B4 


04 


0360 


72 


OE 


0362 


DO 


EO 


0364 


B4 


03 


0366 


72 


08 


0368 


DO 


EO 


036A 


B4 


02 


036C 


72 


02 


036E 






036E 


B4 


20 


0370 






0370 


08 


26 0041 


037U 


E8 


05CB R 


0377 






0377 


C3 




0378 






0378 


E8 


0580 R 


037B 


C3 




037C 






037C 


E8 


05CB R 


037F 


32 


E4 


0381 


C3 




0382 







CHECK THE RESULTS RETURNED BY THE CONTROLLER 



CLD 
MOV 
LODS 
AND 



SI, OFFSET NEC_STATUS 

NEC_STATUS 

AL.OCOH 

J22 

AL.040H 

J18 



SET THE CORRECT DIRECTION 



POINT TO STATUS FIELD 

GET STO 

TEST FOR NORMAL TERMINATION 

OPN_OK 

TEST FOR ABNORMAL TERMINATION 

NOT ABNORMAL, BAD NEC 



ABNORMAL TERMINATION, FIND OUT WHY 
NEC_STATUS 



LODS 

SAL 

MOV 

JC 

SAL 

SAL 

MOV 



SAL 
SAL 
MOV 



AL, ■ 

AH,RECORD_NOT_FND 

J19 

AL, 1 

AL,1 

AH,BAD_CRC 

J19 

AL,1 

AH , BAD_DMA 

J19 

AL,1 

AL,1 

AH,RECORD_NOT_FN 

J19 

AL, 1 

AH,WRITE_PROTECT 

J19 

AL, 1 

AH,BAD_ADDR_MARK 

J19 



RW_FAIL 

TEST FOR CRC ERROR 

RW_FAIL 
TEST FOR 

RW_FAIL 

TEST FOR RECORD NOT FOUND 

RW_FAIL 

TESr FOR WRITE_PROTECT 

RW_FAIL 

TEST MISSING ADDRESS MARK 



J18: 
J19: 



■ NEC MUST HAVE FAILED 

MOV AH,BAD_NEC 

OR 
CALL 

RET 



; RW- NEC- FAIL 

: RW-FAIL 

; HOW MANY WERE REALLY TRANSFERRED 
; RW_ERR 
RETURN TO CALLER 



OPERATION WAS SUCCESSFUL 



CALL 
XOR 
RET 
ENDP 



OPN_OK 

HOW MANY COT MOVED 

NO ERRORS 



GET_PARM 
THIS ROUTINE FETCHES THE INDEXED POINTER FROM 
THE DISK_BASE BLOCK POINTED AT BY THE DATA 
VARIABLE DISK_POINTER 
A BYTE FROM THAT TABLE IS THEN MOVED INTO AH, 
THE INDEX OF THAT BYTE BEING THE PARM IN BX 
ENTRY -- 

BX = INDEX OF BYTE TO BE FETCHED » 2 

IF THE LOW BIT OF BX IS ON, THE BYTE IS IMMEDIATELY 
OUTPUT TO THE NEC CONTROLLER 
EXIT -- 

AH = THAT BYTE FROM BLOCK 



0382 








0382 


IE 






0383 


56 






0384 


2B 


CO 




0386 


8E 


08 




0388 


C5 


36 


0078 R 


038C 


D1 


EB 




038E 


8A 


20 




0390 


5E 






0391 


IF 






0392 


9C 






0393 


83 


FB 


OA 


0396 


75 


19 




0398 


F6 


06 


003F R 


039D 


74 


09 




039F 


80 


FC 


08 


03A2 


73 


3A 




03A4 


B4 


08 




03A6 


EB 


36 




03A8 


80 


FC 


05 


03AB 


73 


31 




03AD 


B4 


05 




03AF 


EB 


2D 




03B1 


83 


FB 


09 


03B4 


75 


28 




03B6 


F6 


06 


003F R 


03BB 


74 


21 




03BD 


OA 


E4 




03BF 


75 


ID 




03C1 


52 






03C2 


53 






03C3 


8B 


56 


00 


03C6 


32 


FF 




03C8 


8A 


DA 




03CA 


B4 


OF 




03CC 


8A 


87 


0090 R 


03D0 


5B 






03D1 


5A 






03D2 


24 


07 




03D4 


75 


04 




03D6 


B4 


14 




03D8 


EB 


04 





GET PARM 


PROG NEAR 


PUSH 


DS 


PUSH 


SI 


SUB 


AX, AX 


MOV 


DS,AX 


ASSUME 


DS:ABSO 


LOS 


SI, DISK POINTER 


SHR 


BX,1 


MOV 


AH,[SI+BX] 


POP 


SI 


POP 


DS 


PUSHF 




ASSUME 


DS:DATA 


CMP 


BX,10 


JNE 


GPO 



SAVE SEGMENT 

SAVE 

ZERO TO AX 



POINT TO BLOCK 

DIVIDE BX BY 2, AND SET FLAG FOR EXIT 

GET THE WORD 

RESTORE 

RESTORE SEGMENT 

SAVE RESULTS FOR EXIT 



CMP 


AH, 8 


JAE 


GP2 


MOV 


AH, 8 


JMP 


SHORT GP2 


CMP 


AH, 5 


JAE 


GP2 


MOV 


AH, 5 


JMP 


SHORT GP2 


CMP 


BX,9 


JNE 


GP2 


TEST 


MOTOR STATUS, WRITE OP 


JZ 


GP2 


OR 


AH, AH 


JNZ 


GP2 


PUSH 


DX 


PUSH 


BX 


MOV 


DX,[BP] 


XOR 


BH,BH 


MOV 


BL,DL 


MOV 


AH,HD12 SETTLE 


MOV 


AL,DSK STATE [BX] 


POP 


BX 


POP 


DX 


AND 


AL, STATE MSK 


JNZ 


GP4 


MOV 


AH,HD320 SETTLE 


JMP 


SHORT GP2 



IS SPECIFIED 



SAVE REGISTER 

SAVE REGISTER 

GET ORIGINAL DRIVE REQUESTED 

SET UP ADDRESSING TO STATE INDICATOR 

SPEC ED HEAD SETTLE TIME FOR 1.2 DRIVE 

GET MEDIA/DRIVE STATE 

RESTORE 

RESTORE 

ISOLATE STATE NUMBER 

BRANCH I F STATES 1 THRU 5 



5-94 Diskette 



03DE 
03DF 
03E1 
03E2 



POPF 
JC 

RET 



NEC_OUTPUT 
ENDP 



RESTORE EXIT RESULTS 

IF FLAG SET, OUTPUT TO CONTROLLER 

RETURN TO CALLER 



NEC_OUTPUT 

THIS ROUTINE SENDS A BYTE TO THE NEC CONTROLLER 

AFTER TESTING FOR CORRECT DIRECTION AND CONTROLLER READY 

THIS ROUTINE WILL T I ME OUT IF THE BYTE IS NOT ACCEPTED 

WITHIN A REASONABLE AMOUNT OF TIME, SETTING THE DISKETTE STATUS 

ON COMPLETION 



INPUT 



(AH) 



BYTE TO BE OUTPUT 



CY = SUCCESS 

CY = 1 FAIIURF -- DISKETTE STATUS UPDATED 

IF A FAILURE HAS OCCURRED, THE RETURN IS MADE ONE LEVEL 

HIGHER THAN THE CALLER OF NEC_OUTPUT 

THIS REMOVES THE REQUIREMENT OF TESTING AFTER EVERY CALL 

OF NEC_OUTPUT 
(AL) DESTROYED 



03E2 






03E2 


52 




03E3 


51 




03EI4 


53 




03E5 


BA 


03F4 


03E8 


B3 


02 


03EA 


33 


C9 


03EC 






03EC 


EC 




03ED 


A8 


UO 


03EF 


74 


11 


03F1 


E2 


F9 


03F3 


FE 


CB 


03F5 


75 


F3 


03 F7 






03 F7 


80 


OE 004 


03FC 


5B 




03 FD 


59 




03FE 


5A 




03FF 


58 




OUOO 


F9 




OltOI 


C3 




0402 


83 


02 


OUOU 






OUOU 


33 


C9 


0406 






0406 


EC 




0407 


A8 


80 


0409 


75 


08 


040B 


E2 


F9 


040D 


FE 


CB 


040F 


75 


F3 


0411 


EB 


E4 


0413 






0413 


8A 


04 


0415 


B? 


F5 


0417 


EE 




0418 


5B 




0419 


59 




041A 


5A 




041B 


C3 




04 IC 







NEC_ 


OUTPUT 


PROC 




PUSH 


DX 




PUSH 


CX 




PUSH 


BX 




MOV 


DX,03F4H 




MOV 


BL,2 


Rl 1 


XOR 


CX,CX 


J23: 








IN 


AL,DX 




TEST 


AL,040H 




JZ 


R12 




LOOP 


J23 




DEC 


BL 




JNZ 


Rll 


J24. 








OR 


DISKETTE 




POP 


BX 




POP 


CX 




POP 


DX 




POP 


AX 




STC 






RET 




R12 


MOV 


BL,2 


J25 








XOR 


CX,CX 


J26. 








IN 


AL,DX 




TEST 


AL,080H 




JNZ 


J27 




LOOP 


J26 




DEC 


BL 




JNZ 


J25 




JMP 


J24 


J27 








MOV 


AL.AH 




MOV 


DX,03F5H 




MOV 


DL,0F5H 




OUT 


DX,AL 




POP 


BX 




POP 


CX 




POP 


DX 




RET 




NLC_ 


OUTPUT 


ENDP 



NEAR 



SAVE REGISTERS 



STATUS PORT 

HIGH ORDER COUNTER 

COUNT FOR TIME OUT 

GET STATUS 

TEST DIRECTION BIT 

DIRECTION OK 



TIME_ERROR 
•|ME_OUT 
RESTORE REGISTERS 

SET ERROR CODE AND RESTORE REGS 
DISCARD THE RETURN ADDRESS 
INUICAlh LKKOK lO CALLER 

HIGH ORDER COUNT 

RESET THE COUNT 

GET THE STATUS 
IS IT READY 
YES, GO OUTPUT 

COUNT DOWN AND TRY AGAIN 



ERROR CONDITION 

OUTPUT 

GET BYTE TO OUTPUT 

DATA PORT 

OUTPUT THE BYTE 
RECOVER REGISTERS 
RECOVER REGISTERS 

CY = FROM TEST INSTRUCTION 



THIS ROUTINE WILL MOVE THE HEAD ON THE NAMED DRIVE 

TO THE NAMED TRACK. IF THE DRIVE HAS NOT BEEN ACCESSED 

SINCE THE DRIVE RESET COMMAND WAS ISSUED, THE DRIVE WILL BE 

RECALIBRATED. 



CY = SUCCESS 
CY = 1 FAILURE - 
(AX) DESTROYED 



DISKETTE_STATUS SET ACCORDINGLY 



041C 






041C 


BO 


01 


041E 


51 




041 F 


«A 


CA 


0421 


n? 


CO 


0423 


59 




0424 


84 


06 003E R 


0428 


75 


37 


042A 


08 


06 003E R 


042E 


B4 


07 


0430 


F8 


03E2 R 


0433 


SA 


E2 


0435 


F8 


03E2 R 


0438 


E8 


051A R 


0438 


73 


14 


0430 


C6 


06 0041 R 00 


0442 


B4 


07 


0444 


F8 


03E2 R 


0447 


«A 


E2 


0449 


F8 


03E2 R 


044C 


F8 


051A R 


044F 


72 


78 


0451 






0451 


l-ft 


06 008F R 01 


0456 


74 


09 


0458 


3? 


FF 


045A 


8A 


DA 


045C 


C6 


87 0094 R 00 



PROC 
MOV 
PUSH 
MOV 
ROL 
POP 
TEST 
JNZ 

OR 

MOV 

CALL 

MOV 

CALL 

CALL 

JNC 



SEEK__STATUS,AL 

AH,07H 

NEC_OUTPUT 

AH,DL 

NEC_OUTPUT 

CHK_STAT_2 

J28A 



ESTABLISH MASK FOR REGAL TEST 

SAVE I NPUT VALUES 

GET DRIVE VALUE INTO CL 

SHIFT IT BY THE DRIVE VALUE 

RECOVER TRACK VALUE 

TEST FOR RECAL REQUIRED 

NO_RECAL 



OUTPUT THE DRIVE NUI-IBER 

GET THE INTERUPT AND SENSE INT STATUS 

SEEK_COMPLETE 



ISSUE RECALIBRATE FOR 80 TRACK DISKETTES 



MOV 
MOV 
CALL 
MOV 
CALL 
CALL 
JC 



XOR 
MOV 
MOV 



DISKETTE_STATUS,0 

AH,07H 

NEC_OUTPUT 

AH,DL 

NEC_OUTPUT 

CHK_STAT_2 

RB 



HI-_CNTRL,DUAL 
J28 



OUTPUT THE DRIVE NUMBER 

GET THE INTERUPT AND SENSE INT STATUS 

SEEK_ERROR 



SET UP ADDRESSING TO STATE INDICATOR 
SAVE NEW CYLINDER AS PRESENT POSITION 
N SYNCH WITH CONTROLLER, SEEK TO TRACK 



BH,BH 
BL, DL 
DSK_TRK[BX],0 



Diskette 5-95 



0^461 


32 


FF 




Oi»63 


8A 


DA 




0»i65 


F6 


06 008 F R 


01 


046A 


74 


09 




0U6C 


F6 


87 0090 R 


20 


0471 


74 


02 




0473 


DO 


E5 




0475 








0475 


3A 


AF 0094 R 




0479 


74 


3E 




047B 


88 


AF 0094 R 




047F 


84 


OF 




0481 


E8 


03 E2 R 




0484 


8A 


E2 




0486 


E8 


03 E2 R 




0489 


8A 


E5 




048B 


E8 


03 E2 R 




048E 


E8 


051A R 




0491 


F6 


06 008F R 


01 


0496 


74 


09 




0498 


F6 


87 0090 R 


20 


049D 


74 


02 




049F 


DO 


ED 




04A1 








04A1 


9C 






04A2 


BB 


0012 




04A5 


E8 


0382 R 




04A8 


51 






04A9 








04A9 


B9 


0320 




04AC 


OA 


E4 




04AE 


74 


06 




04B0 


E2 


FE 




04B2 


FE 


CC 




04B4 


EB 


F3 




04B6 








04B6 


59 






04B7 


9D 






04B8 


C3 






04B9 








04B9 


F6 


06 008F R 


01 


04BE 


74 


09 




04CO 


F6 


87 0090 R 


20 


04C5 


74 


02 




04C7 


DO 


ED 




04C9 








04C9 


C3 






04CA 









XOR 
MOV 
TEST 



BH,BH 
BL,DL 
HF_CNTRL, DUAL 





CMP 


CH.DSK TRK[BX] 




JE 


J32 




MOV 


DSK TRK[BX],CH 




MOV 


AH,0FH 




CALL 


NEC OUTPUT 




MOV 


AH,DL 




CALL 


NEC OUTPUT 




MOV 


AH.CH 




CALL 


NEC OUTPUT 




CALL 


CHK STAT 2 




TEST 


HF CNTRL,DUAL 




JZ 


RA 




TEST 


DSK STATE[BX], 




JZ 


RA 




SHR 


CH.1 


RA: 








-WAIT FOR 


HEAD SETTLE 




PUSHF 






MOV 


BX, 18 




CALL 


GET PARM 




PUSH 


CX 


J29: 








MOV 


CX,800 




OR 


AH, AH 




JZ 


J31 


J30: 


LOOP 
DEC 


J30 
AH 




JMP 


J29 


J31 : 








POP 


CX 




POPF 






RET 




J32: 








TEST 


HF CNTRL,DUAL 




JZ 


RB 




TEST 


DSK_STATE[BX], 



SET UP ADDRESSING TO STATE INDICATOR 



DOUBLE NUMBER OF STEP TO TAKE 



DRIVE NUMBER 

GET CYLINDER NUMBER 

GET ENDING INTERRUPT AND SENSE STATUS 
GO DETERMINE TYPE OF CONTROLLER CARD 
DISKETTE ATTACH CARD 



SET BACK TO LOGICAL SECTOR 



SAVE REGISTER 

HEAD_SETTLE 

1 MS LOOP 

TEST FOR TIME EXPIRED 

DELAY FOR 1 MS 
DECREMENT THE COUNT 
DO IT SOME MORE 

RECOVER STATE 

RETURN TO CALLER 

SEEK_ERROR 

GO DETERMINE TYPE OF CONTROLLER CARD 

DISKETTE ATTACH CARD 



SET BACK TO LOGICAL SECTOR 
RETURN TO CAI I FR 



DMA_SETUP 

THIS ROUTINE SETS UP THE DMA FOR READ/WRITE/VERIFY 

OPERATIONS. 
INPUT 

(AL) = MODE BYTE FOR THE DMA 

(ES:BX) - ADDRESS TO READ/WRITE THE DATA 
OUTPUT 

(AX) DESTROYED 



04CA 






04CA 


51 




04CB 


FA 




04CC 


E6 


OC 


04CE 


E8 


00 


04D0 


E6 


OB 


04D2 


8C 


CO 


04D4 


B1 


04 


04D6 


D3 


CO 


04D8 


8A 


E8 


04 DA 


24 


FO 


04DC 


03 


C3 


04DE 


73 


02 


04E0 


FE 


C5 


04E2 






04 E2 


50 




04E3 


E6 


04 


04E5 


EB 


00 


04E7 


8A 


C4 


04E9 


E6 


04 


04EB 


8A 


C5 


04ED 


EB 


00 


04EF 


24 


OF 


04F1 


E6 


81 


04 F3 


8A 


E6 


04 F5 


2A 


CO 


04 F7 


D1 


E8 


04 F9 


50 




04FA 


BB 


0006 


04FD 


E8 


0382 R 


0500 


8A 


CC 


0502 


58 




0503 


D3 


EO 


0505 


48 




0506 


50 




0507 


E6 


05 


0509 


EB 


00 


050B 


8A 


C4 


050D 


E6 


05 


050F 


FB 




0510 


59 




0511 


58 




0512 


03 


CI 


0514 


59 




0515 


BO 


02 


0517 


E6 


OA 


0519 


C3 




051A 







DMA SETUP 


PROC NE 


PUSH 


CX 


CLI 




OUT 


DMA+12,AL 


JMP 


$+2 


OUT 


DMA+n,AL 


MOV 


AX, ES 


MOV 


CL,4 


ROL 


AX,CL 


MOV 


CH,AL 


AND 


AL,OFOH 


ADD 


AX.BX 


JNC 


J33 


INC 


CM 


J33: 




PUSH 


AX 


OUT 


DMA+4,AL 


JMP 


$+2 


MOV 


AL.AH 


OUT 


DMA+4,AL 


MOV 


AL,CH 


JMP 


$+2 


AND 


AL.OFH 


OUT 


081H,AL 


. DETERMINE COUNT 


MOV 


AH,DH 


SUB 


AL,AL 


SHR 


AX, 1 


PUSH 


AX 


MOV 


8X,6 


CALL 


GET PARM 


MOV 


CL,AH 


POP 


AX 


SHL 


AX,CL 


DEC 


AX 


PUSH 


AX 


OUT 


DMA+5,AL 


JMP 


$+2 


MOV 


AL,AH 


OUT 


DMA+5,AL 


STI 




POP 


CX 


POP 


AX 


ADD 


AX.CX 


POP 


CX 


MOV 


AL, 2 


OUT 


DMA+10,AL 


RET 




DMA SETUP 


ENDP 



NEAR 



SAVE THE REGISTER 

DISABLE INTERRUPTS DURING DMA SET-UP 

SET THE FIRST/LAST F/F 

WAIT FOR 10 

OUTPUT THE MODE BYTE 

GET THE ES VALUE 

SHI FT COUNT 

ROTATE LEFT 

GET HIGHEST NYBBLE OF ES TO CH 

ZERO THE LOW NYBBLE FROM SEGMENT 

TEST FOR CARRY FROM ADDITION 

CARRY MEANS HIGH 4 BITS MUST BE INC 

SAVE START ADDRESS 
OUTPUT LOW ADDRESS 
WAIT FOR 10 

OUTPUT HIGH ADDRESS 
GET HIGH 4 BITS 
I/O WAIT STATE 

OUTPUT THE HIGH 4 BITS TO PAGE REGISTER 



NUMBER OF SECTORS 

TIMES 256 INTO AX 
SECTORS * 128 INTO AX 

GET THE BYTES/SECTOR PARM 

USE AS SHIFT COUNT (0=128, 1=256 ETC) 

MULTIPLY BY CORRECT AMOUNT 
-1 FOR DMA VALUE 
SAVE COUNT VALUE 
LOW BYTE OF COUNT 
WAIT FOR 10 

HIGH BYTE OF COUNT 

RE-ENABLE INTERRUPTS 

RECOVER COUNT VALUE 

RECOVER ADDRESS VALUE 

ADD, TEST FOR 64K OVERFLOW 

RECOVER REGISTER 

MODE FOR 8237 

INITIALIZE THE DISKETTE CHANNEL 

RETURN TO CALLER, CFL SET BY ABOVE IF ERROR 



CHK STAT 2 

THIS ROUTINE HANDLES THE INTERRUPT RECEIVED AFTER 

A RECALIBRATE, SEEK, OR RESET TO THE ADAPTER. 

THE INTERRUPT IS WAITED FOR, THE INTERRUPT STATUS SENSED, 

AND THE RESULT RETURNED TO THE CALLER. 



5-96 Diskette 



051A 
051A 
051D 
051 F 
0521 
0524 
0527 
0529 
052C 
052E 
0530 
0532 
0533 
0533 
0534 
0534 
0539 
053A 
053B 



E8 03E2 R 
E8 0580 R 
72 OA 
AO 0042 R 
24 60 
3C 60 
74 02 
F8 



80 OE 0041 R 40 



CY = SUCCESS 
CY = 1 FAILURE ■ 
(AX) DESTROYED 



ERROR IS IN DISKETTE_STATUS 



< STAT 2 


PROC NEAR 


CALL 


WAIT INT 


JO 


J34 


MOV 


AH,08H 


CALL 


NEC OUTPUT 


CALL 


RESULTS 


JC 


J34 


MOV 


AL.NEC STATUS 


AND 


AL,060H 


CMP 


AL,060H 


JZ 


J35 



STC 
RET 
CHK_STAT_2 



WAIT FOR THE INTERRUPT 
IF ERROR, RETURN IT 
SENSE INTERRUPT STATUS COMMAND 

READ IN THE RESULTS 

CHK2_RETURN 

GET THE FIRST STATUS BYTE 

ISOLATE THE BITS 

TEST FOR CORRECT VALUE 

IF ERROR, GO MARK IT 

GOOD RETURN 



D I SKETTE_STATUS, BAD_SEEK 



ERROR RETURN CODE 



053B 










0538 


HB 








053C 


50 








053D 


53 








053 E 


51 








053 F 


F« 








0540 


li« 


9001 




0543 


CD 


15 






0545 


12 


11 






0547 


B3 


r4 






0549 


33 


(;9 






054B 










0548 


F6 


06 


003E 


R 80 


0550 


75 


OC 






0552 


E2 


F7 






0554 


K- 


CB 






0556 


75 


F3 






0558 


80 


OF 


0041 


R 80 


055D 


F9 








055E 










055E 


9C 








055 F 


80 


26 


003E 


R 7F 


0564 


9D 








0565 


59 








0566 


5B 








0567 


•?« 








0568 


C3 








0569 











WAIT_INT 

THIS ROUTINE WAITS FOR AN INTERRUPT TO OCCUR 

A TIME OUT ROUTINE TAKES PLACE DURING THE WAIT, SO 

THAT AN ERROR MAY BE RETURNED IF THE DRIVE IS NOT READY 
INPUT 

NONE 
OUTPUT 

CY = SUCCESS 

CY = 1 FAILURE -- Dl SKETTE_STATUS IS SET ACCORDINGLY 

(AX) DESTROYED 



STC 

PUSHF 

AND 

POPF 

POP 

POP 

POP 

RET 



PROC NEAR 



PUSH 


AX 


PUSH 


BX 


PUSH 


CX 


CLC 




MOV 


AX,09001H 


INT 


15H 


JC 


J36A 


MOV 


BL,4 


XOR 


CX,CX 


TEST 


SEEK STATUS, INT FLAG 


JNZ 


J37 


LOOP 


J36 


DEC 


BL 


JNZ 


J36 



CLEAR TIMEOUT INDICATOR 
LOAD WAIT CODE AND TYPE 
PERFORM OTHER FUNCTION 
BYPASS TIMING LOOP IF TIMEOUT OCCURRED 



TEST FOR INTERRUPT OCCURRING 



D I SKETTE_STATUS, T I ME_OUT 



SEEK_STATUS, NOT I NT_FLAG 



SAVE CURRENT CARRY 
; TURN OFF INTERRUPT FLAG 
; RECOVER CARRY 
; RECOVER REGISTERS 

• GOOD RETURN CODE COMES FROM TEST INST 



THIS ROUTINE HANDLES THE DISKETTE INTERRUPT 



THE INTERRUPT FLAG IS SET IS SEEK__STATUS 



0569 


FB 




056A 


IE 




0568 


50 




0560 


E8 0000 E 




056F 


80 OE 003E R 80 


0574 


80 20 




0576 


E6 20 




0578 


B8 9101 




0578 


CD 15 




0570 


58 




057E 


IF 




057F 


CF 




0580 







DISK INT 1 


PROC FAR 




STI 






PUSH 


DS 




PUSH 


AX 




CALL 


DOS 




OR 


SEEK STATUS, 


INT FLAG 


MOV 


AL,20H 




OUT 


20H,AL 




MOV 


AX,09101H 




INT 


15H 




POP 


AX 




POP 


DS 




IRET 






DISK INT 1 


ENDP 





>» ENTRY POINT FOR ORG 0EF57H 
RE ENABLE INTERRUPTS 
SAVE REGISTERS 

SETUP DATA ADDRESSING 
TURN ON INTERRUPT OCCURRED 
END OF INTERRUPT MARKER 
INTERRUPT CONTROL PORT 
INTERRUPT POST CODE & TYPE 
GO PERFORM OTHER TASK 
RECOVER REG 

RETURN FROM INTERRUPT 



RESULTS 

THIS ROUTINE WILL READ ANYTHING THAT THE NEC CONTROLLER 

HAS TO SAY FOLLOWING AN INTERRUPT. 
INPUT 

NONE 
OUTPUT 

CY = SUCCESSFUL TRANSFER 

CY = 1 FAILURE — TIME OUT IN WAITING FOR STATUS 

NFC:_STATUS AREA HAS STATUS BYTE LOADED INTO IT 

(AH) DESTROYED 



0580 






0580 


FC 




0581 


BF 


0042 R 


0584 


51 




0585 


52 




0586 


53 




0587 


B3 


07 


0589 


B7 


02 


058B 






058B 


33 


C9 


058D 


BA 


03 F4 


0590 






0590 


tc 




0591 


A8 


80 


0593 


lb 


10 


0595 


L2 


F9 



RESULTS 


PROC 
OLD 


NEAR 




MOV 


OI,OFFSE 




PUSH 


CX 




PUSH 


DX 




PUSH 


BX 




MOV 


BL,7 


; 


WAIT 


FOR REQUEST 


RIO: 


MOV 


BH,2 


J38: 








XOR 


CX,CX 




MOV 


DX,03F4H 


J39: 








IN 


AL,DX 




TEST 


AL,080H 




JNZ 


J 40 A 




LOOP 


J39 



MAX STATUS BYTES 



HIGH ORDER COUNTER 
INPUT_LOOP 
COUNTER 
STATUS PORT 
WAIT FOR MASTER 
GET STATUS 
MASTER READY 
TEST_DIR 
WAIT_MASTER 



DECREMENT HIGH ORDER COUNTER 



Diskette 5-97 



; REPEAT TIL DELAY DONE 



059B 


fiO 


OE 0041 


R 80 


05A0 








05A0 


F9 






O-jAI 


•^B 






05A2 


bA 






05A3 


'>y 






05AU 


a 






05A5 


FC 






05A6 


A8 


40 




05A8 


7 b 


07 




05AA 








05AA 


»() 


OE 0041 


R 20 


05AF 


EB 


EF 




05B1 








05B1 


U? 






05B2 


FC 






05B3 


fi8 


05 




05B5 


kf 






05B6 


B9 


0014 




05B9 


F2 


FE 




05BB 


UA 






05BC 


FC 






05BD 


A8 


10 




05BF 


7U 


06 




05C1 


FF 


CB 




05C3 


lb 


C4 




05C5 


LB 


E3 




05C7 








05C7 


bti 






05C8 


bA 






05C9 


b9 






05CA 


Ci 







D I SKETTE_STATUS, T I ME_OUT 



STC 

POP BX 

POP DX 

POP CX 

RET 

TEST THE DIRECTION I 



AL,DX ; GET STATUS REG AGAIN 

AL,040H ; TEST DIRECTION BIT 

J42 ; OK TO READ STATUS 

; NEC_FAIL 
D I SKETTE_STATUS, BAD_NEC 
J40 ; RESULTS_ERROR 



05CB 






05CB 


AO 0045 


K 


05CE 


3A C5 




05DO 


AO 0047 


K 


05D3 


74 OA 




0505 


BB 0008 




05D8 


E8 0382 


K 


05DB 


8A 04 




05DD 


FE CO 




05DF 


2A CI 




05E1 


03 





READ IN THE STATUS 



MOV 


CX,20 


LOOP 


J43 


DEC 


DX 


IN 


AL,DX 


TEST 


AL,010H 


JZ 


J44 


DEC 


BL 


JN7 


RIO 


JMP 


J41 



INPUT_STAT 

POINT AT DATA PORT 

; GET THE DATA 

; STORE THE BYTE 

; INCREMENT THE POINTER 

; LOOP TO KILL TIME FOR NEC 

; POINT AT STATUS PORT 

; GET STATUS 

; TEST FOR NEC STILL BUSY 

; RESULTS DONE 

; DECREMENT THE STATUS COUNTER 
; GO BACK FOR MORE 

; CHIP HAS FAILED 



RESULT OPERATION IS DONE 



POP 
POP 

RET 



NUM_TRANS 

THIS ROUTINE CALCULATES THE NUMBER OF SECTORS THAT 

WERE ACTUALLY TRANSFERRED TO/FROM THE DISKETTE 
INPUT 

(CH) = CYLINDER OF OPERATION 

(CL) = START SECTOR OF OPERATION 
OUTPUT 

(AL) = NUMBER ACTUALLY TRANSFERRED 

NO OTHER REGISTERS MODIFIED 



MOV 
CALL 
MOV 
INC 

J45: SUB 
RET 

NUM^TRANS 

RESULTS ENDP 



PROC NEAR 

AL,NEC_STATUS+3 

AL,CH 

AL,NEC_STATUS+5 

J45 

BX,8 

GET_PARM 

AL,AH 

AL 

AL,CL 



GET CYLINDER ENDED UP ON 

SAME AS WE STARTED 

GET ENDING SECTOR 

IF ON SAME CYL, THEN NO ADJUST 

GET EOT VALUE 

INTO AL 
USE EOT+1 FOR CALCULATION 
SUBTRACT START FROM END 



05E2 C6 87 0090 R 61 



IF FOUND TO BE 



05E7 


F8 


01CA R 


05 EA 


8B 


56 00 


05E0 


B'. 


01 


05EF 


1-8 


041C R 


05F2 


8B 


56 00 


05 F5 


R5 


00 


05F7 


F8 


041C R 


05 FA 


C6 


06 004 


05FF 


5A 




0600 


b9 




0601 


bti 




0602 


58 




0603 


C3 





MOV DSK_STATE[BX]. POA__DUAL ; CLEAR STATE FOR THIS DRIVE 

THIS SEQUENCE OF SEEKS IS USED TO RESET DISKETTE CHANGE SIGNAL 

RESET NEC 

RESTORE DRIVE PARMETER 
MOVE TO CYLINDER 1 
ISSUE SEEK 

RtSlORE DRIVE PARMETER 
MOVE TO CYLINDER 
ISSUE SEEK 
:dIA_CHANGE ; INDICATE MEDIA REMOVED FROM DRIVE 
RESTORE PARAMETERS 



CALL 


DISK RESET 


MOV 


DX,[BP] 


MOV 


CH,01H 


CALL 


SEEK 


MOV 


DX, [BP) 


MOV 


CH,OOH 


CALL 


SEEK 


MOV 


DISKETTE STATUS, N 


POP 


DX 


POP 


CX 


POP 


BX 


POP 


AX 


RET 





MEDI 



^ CHANGE, GO DETERMINE NEW TYPE 



READ_DSKCHNG 
THIS ROUTINE READS THE STATE OF THE 
DISK CHANGE LINE 
ZERO FLAG: 

- DISK CHANGE LINE INACTIVE 

1 - DISK CHANGE LINE ACTIVE 



0604 










READ DSKCHNG 


PROC NEAR 


0604 


32 


FF 






XOR 


BH,BH ; 


0606 


8A 


DA 






MOV 


BL,DL ; 


0608 


BO 


01 






MOV 


AL.Ol ; 


060A 


80 


26 


003F 


R CF 


AND 


MOTOR STATUS, OCFH 


o6or 


B1 


04 






MOV 


CL,4 ; 


0611 


D2 


C3 






ROL 


BL,CL ; 


0613 


08 


IE 


003F 


R 


OR 


MOTOR STATUS, BL ; 


0617 


D2 


CB 






ROR 


BL,CL ; 


0619 


8A 


CB 






MOV 


CL,BL ; 


06 IB 


D2 


EO 






SHL 


AL,CL ; 


06 ID 


FA 








CLI 




061E 


84 


06 


003F 


R 


TEST 


AL, MOTOR STATUS ; 


0622 


75 


09 






JNZ 


R8 ; 


0624 


08 


06 


003F 


R 


OR 


MOTOR STATUS, AL ; 


0628 


C6 


06 


0040 


R FF 


MOV 


MOTOR_COUNT,0FFH 


062D 


FB 








R8: STI 




062E 


BA 


03F2 




MOV 


DX,03F2H • 


0631 


AO 


003F R 




MOV 


AL, MOTOR STATUS ; 


0634 


24 


3F 






AND 


AL,03FH ; 


0636 


B1 


04 






MOV 


CL,4 ; 


0638 


D2 


CO 






ROL 


AL,CL ; 


063A 


OC 


OC 






OR 


AL,OCH ; 


063C 


EE 








OUT 


DX,AL ; 


063D 


BA 


03F7 




MOV 


DX,03F7H ; 


0640 


EB 


00 






JMP 


$+2 ; 



CLEAR HIGH ORDER OFFSET 

LOAD DRIVE NUMBER AS OFFSET 

MASK FOR DETERMINING MOTOR BIT 

; CLEAR ENCODED DR 1 VF SELECT BITS(4 & 5) 

SHIFT DRIVE NUMBER INTO HIGH NIBBLE COUNT 

SHIFT DRIVE NUM3ER INTO HIGH NIBBLE 

ADD IN DRIVE NUMBER SELECTED FOR LATER USE 

RESTORE DRIVE NUMBER 

RESTORE DRIVE NUMBER 

FORM MOTOR ON B I T MASK 

NO INTERRUPTS WHILE DETERMING MOTOR STATUS 

TEST 

DONT NEED TO SELECT DEVICE IF MOTOR ON 

TURN ON CURRENT MOTOR 
; SET LARGE COUNT DURING OPERATION 
ENABLE INTERRUPTS AGAIN 
ADDRESS DIGITAL OUTPUT REGISTER 
GET DIGITAL OUTPUT REGISTER REFLECTION 
STRIP AWAY UNWANTED BITS 
SHI FT COUNT 

PUT BITS IN DESIRED POSITIONS 
NO RESET, ENABLE DMA/ I NT 
SELECT DRIVE 

ADDRESS DIGITIAL INPUT REGISTER 
DELAY FOR SUPPORT CHIP 



^.o« riicirrf^ft** 



06't2 
0643 

06U6 



IN AL,DX 

TEST AL,DSK_CHG 
RET 

REAO_DSKCHNG ENDP 



INPUT DIR 

CHECK FOR DISK CHANGE LINE ACTIVE 

RETURN TO CALLER WITH ZERO FLAG SET 



DISK_CHANGE 
THIS ROUTINE RETURNS THE STATE OF THE 
0I5K CHANGE LINE 
DISKETTE_STATUS: 

00 - DISK CHANGE LINE INACTIVE 
06 - DISK CHANGE LINE ACTIVE 



06U6 
06U6 
064B 


F6 

74 


06 
29 


008F R 01 


DISK 


CHANGE 
TEST 
JZ 


PROC NEAR 
HF CNTRL, DUAL 
DC2 


06itD 
064 F 
0651 
0655 
0657 
0659 


32 
8A 
8A 
24 
3C 
74 


FF 
DA 
87 
07 
03 
07 


0090 R 




XOR 
MOV 
MOV 
AND 
CMP 
JE 


BH,BH 

BL.DL 

AL.DSK STATE[BX] 

AL, STATE MSK 

AL,3 

SET IT 


065B 


72 


OB 






JB 


DCO 


065D 
0660 


E8 
74 


0604 R 
05 




CALL 
JZ 


READ DSKCHNG 
FINIS 


0662 
0667 


C6 
C3 


06 


0041 R 06 


SETI 
FINI 


T: MOV 
S: RET 


DISKETTE_STATUS, 


0668 
066C 
066E 


8A 
OA 
75 


87 
CO 
F2 


0090 R 


DCO: 


MOV 

OR 

JNZ 


AL,DSK STATE[BX] 

AL,AL 

SET IT 


0670 
0675 


80 
C3 


OE 


0041 R 80 


DC1 : 


OR 
RET 


DISKETTE_STATUS, 


0676 
0678 
067A 
067C 
067 E 
0680 


BO 
E6 
EB 
E4 
A8 
75 


OE 
70 
00 
71 
CO 
EE 




DC2: 


MOV 
OUT 
JMP 
IN 

TEST 
JNZ 


AL,CMOSDSB ADDR 
CADR PRT,AL 
$+2 

AL,CDATA PRT 
AL,CMOS GOOD 
DC! 


0682 
0684 
0686 
0688 
068A 
068C 


BO 
E6 
EB 
E4 
OA 
75 


10 
70 
00 
71 
D2 
04 






MOV 
OUT 
JMP 
IN 
OR 
JNZ 


AL,CMOSDSK BYTE 

CADR PRT,AL 

$+2 

AL,CDATA PRT 

DL,DL 

DC3 


068E 
0690 
0692 
0694 


B1 
02 
24 
74 


04 
C8 
OF 
DA 




DC3: 


MOV 
ROR 
AND 
JZ 


CL,4 
AL,CL 
AL,LOWNIB 
DC1 


0696 
0698 


EB 


CA 




DISK 


JMP 
„CHANGE 


SHORT SET IT 
ENDP 



CLEAR HIGH ORDER OFFSET 
LOAD DRIVE NUMBER AS OFFSET 
; GET MEDIA STATE INFORMATION FOR DRIVE 
ISOLATE STATE 

CHECK FOR 48TPI DRIVE & NOT ESTABLISHED STATES 
IF FOUND SET DISK CHANGE ACTIVE 

IF NOT ESTABLISHED, GO CHECK FOR NO DRIVE 



; GET MEDIA STATE INFORMATION FOR DRIVE 
CHECK FOR NO DRIVE INSTALLED 
IF DRIVE PRESENT, SET CHANGE LINE ACTIVE 



GET CMOS DIAGNOSTIC STATUS BYTE ADDRESS 

WRITE ADDRESS TO READ OUT TO CMOS 

DELAY 

GET CMOS STATUS 

SEE IF BATTERY GOOD AND CHECKSUM VALID 

ERROR I F EITHER B I T ON 

ADDRESS OF DSKETTE BYTE IN CMOS 

WRITE ADDRESS TO READ OUT TO CMOS 

DELAY 

GET DSKETTE BYTE 

SEE WHICH DRIVE IN QUESTION 

IF DRIVE 1, DATA ALREADY IN LOW NIBBLE 

GET ROTATE COUNT TO SHIFT HIGH TO LOW NIBBLE 

EXCHANGE NIBBLES 

CLEAR AWAY UNDESIRED DRIVE DATA 

NO DRIVE THEN SET TIMEOUT ERROR 

DRIVE, ON 320/360K DRIVES SET DISK CHANGE 



DISK_TYPE 
THIS ROUTINE IS USED TO EITHER ESTABLISH THE 
TYPE OF MEDIA/DRIVE TO BE USED IN THE NEXT 
OPERATION( FOR FORMAT ONLY) OR RETURN THE 
TYPE OF MEDIA/DRIVE INSTALLED AT THE DRIVE 
SPECIFIED 



0698 
0698 
069D 


F6 
74 


06 
49 


008F R 


069 F 
06A1 
06A3 


32 
8A 
8A 


FF 
DA 
A7 


0090 R 


06A7 
06AA 


F6 
74 


C4 
OB 


10 


06AC 
06AF 
06B2 


80 
80 
75 


E4 
EC 
OC 


07 
03 


06B4 
06B6 


BO 
C3 


01 




06B7 
06B9 


OA 
74 


E4 
2A 




06BB 
06BE 


80 
74 


E4 
03 


07 


06CO 
06C2 


BO 
C3 


02 




06C3 
06C5 
06C7 
06C9 
06CB 
06CD 


BO 
E6 
EB 
E4 
A8 
75 


OE 
70 
00 
71 
CO 
16 




06CF 
06D1 
06D3 
06D5 
06D7 
06D9 


BO 
E6 
EB 
E4 
OA 
75 


10 
70 
00 
71 
D2 
04 




06DB 
06DD 
06DF 
06E1 
06E3 


B1 
D2 
24 
3C 
72 


04 
C8 
OF 
03 
02 




06E5 
06E7 


32 
C3 


CO 




06 E8 
06 EA 
06 EC 
06EE 
06FG 
06 F2 


BO 
E6 
EB 
E4 
A8 
75 


OE 
70 
00 
71 
CO 
F1 




06 FU 
06F6 


BO 
E6 


10 
70 





XOR 
MOV 
•MOV 



AND 
SUB 
JNZ 



BH,BH ; 

BL,DL ; 

AH,DSK_STATE(BX] 

AH, DETERMINED ; 



CLEAR HIGH ORDER OFFSET 
LOAD DRIVE NUMBER AS OFFSET 
GET PRESENT STATE INFORMATION 



STRIP OFF HIGH ORDER BITS 
CONVERT TO TYPE FOR OUTPUT 
SKIP IF NOT 320/360 DRIVE AND MEDIA 



MOV 
OUT 
JMP 



MOV 
OUT 
JMP 



MOV 
ROR 
AND 
CMP 



MOV 
OUT 
JMP 



AL,NOCHGLN 

AH , AH 
T1 

AH,STATE_MSK 



AL,CMOSDSB_ADDR ; 

CADR_PRT,AL ; 

$+2 ; 

AL,CDATA_PRT ; 

AL,CMOS_GOOD ; 

T1 ; 

AL,CMOSDSK_BYTE ; 

CaDR_PRT,AL ; 

$+2 ; 

AL,CDATA_PRT ; 

DL,0L ; 

TB ; 

CL,4 ; 

AL,CL ; 

AL,LOWNIB ; 

AL,3 ; 



AL,CMOSDSB_ADDR 

CADR_PRT,AL 

$+2 

AL,CDATA_PRT 

AL,CMOS_GOOD 

T1 



GET CMOS DIAGNOSTIC STATUS BYTE ADDRESS 

WRITE ADDRESS TO READ OUT TO CMOS 

DELAY 

GET CMOS STATUS 

SEE IF BATTERY GOOD AND CHECKSUM VALID 

ERROR I F EITHER B I T ON 

ADDRESS OF DSKETTE BYTE IN CMOS 

WRITE ADDRESS TO READ OUT TO CMOS 

DELAY 

GET DSKETTE BYTE 

SEE WHICH DRIVE IN QUESTION 

IF DRIVE 1, DATA ALREADY IN LOW NIBBLE 

GET ROTATE COUNT TO SHIFT HIGH TO LOW NIBBLE 

EXCHANGE NIBBLES 

CLEAR AWAY UNDESIRED DRIVE DATA 

SEE IF UNDEFINED DISKETTE TYPE 

RETURN IF NOT, RESULTS IN AL 



GET CMOS DIAGNOSTIC STATUS BYTE ADDRESS 

WRITE ADDRESS TO READ OUT TO CMOS 

DELAY 

GET CMOS STATUS 

SEE IF BATTERY GOOD AND CHECKSUM VALID 

ERROR I F EITHER B I T ON 



Diskette 5-99 



06 F8 


E8 


00 


06 FA 


LU 


/I 


06 FC 


OA 


o;^ 


06FE 


lb 


04 


0700 


Rl 


ou 


0702 


I)? 


c« 


070U 


n\ 


OF 


0706 


;ic 


oie 


0708 


/2 


02 


070A 


s? 


CO 


070C 


C3 




0700 









JHP 


$+2 




IN 


AL,CDATA PRT 




OR 


DL,DL 




JNZ 


T3 




MOV 


CL,U 




ROR 


AL.CL 


T3: 


AND 


AL, LOWNIB 




CMP 


AL, INVALID DRV 




JB 


T6 




XOR 


AL.AL 


T6: 


RET 




DISK 


TYPE ENDP 





DELAY 

GET DSKETTE BYTE 

SFE WHICH DRIVE IN QUESTION 

IF DRIVE 1, DATA ALREADY IN LOW NIBBLE 

GET ROTATE COUNT TO SHIFT HIGH TO LOW NIBBLE 

EXCHANGE NIBBLES 

CLEAR AWAY UNDESIRED DRIVE DATA 

SEE l^ UNDEFINED DISKETTE TYPE 

RETURN IF NOT, RESULTS IN AL 



FORMAT_SEr 
THIS ROUTINE IS USED TO ESTABLISH THE 
TYPE OF MEDIA/DRIVE TO BE USED FOR THE FOLLOWING 
FORMAT OPERATION 



070D 

070D F6 06 008F R 01 

0712 74 5C 



07 lU 


3? 


FF 








0716 


«A 


DA 








0718 


Ft 


ca 








071A 


75 


06 








07 IC 


C6 


87 


0090 


R 


93 


0721 


C3 










0722 


50 










0723 


1-8 


0604 R 






0726 


74 


2E 








0728 


C6 


06 


0041 


R 


06 


0720 


«B 


56 


00 






0730 


B5 


01 








0732 


F8 


04 


C R 






0735 


8B 


56 


00 






0738 


B5 


00 








073A 


F8 


04 


C R 






073D 


8B 


56 


00 






0740 


F8 


0604 R 






0743 


74 


11 








0745 


58 










0746 


C6 


06 


0041 


R 


80 


074B 


8B 


5L 


00 






074F 


3? 


FF 








0750 


C6 


87 


0090 


R 


61 


0755 


C3 










0756 


58 










0757 


l-F 


CH 








0759 


/5 


06 








075B 


C6 


87 


0090 


R 


74 


0760 


C3 










0761 


FF 


OR 








0763 


75 


06 








0765 


C6 


87 


0090 


R 


15 


076A 


C3 










076B 


C6 


06 


0041 


R 


01 


0770 


C3 










0771 













XOR 
MOV 
DEC 
JNZ 



JZ 

MOV 

MOV 

MOV 

CALL 

MOV 

MOV 

CALL 

MOV 

CALL 

JZ 



MOV 
MOV 
XOR 
MOV 
RET 



READ_DSKCHNG 



CLEAR HIGH ORDER OFFSET 
LOAD DRIVE NUMBER AS OFFSET 
CHECK FOR 320/360K MEDIA & DRIVE 
BYPASS I F NOT 



SAVE TYPE VALUE 

GO CHECK DISK CHANGE LINE 

NOT ACTIVE GO ON PROCESSING 



DISKETTE_STATUS,MEDIA_CHANGE ; INDICATE DISK CHANGE ACTIVE 



DX, [BP] 

CH,01H 

SEEK 

DX, [BP] 

CH,OOH 

SEEK 

DX, [BP] 

READ_DSKCHNG 

S3 



RESTORE DRIVE PARMETER 

MOVE TO CYLINDER 1 

I SSUE SEEK 

RESTORE DRIVE PARMETER 

MOVE TO CYLINDER 

ISSUE SEEK 

RESTORE DRIVE PARMETER 

GO CHECK DISK CHANGE LINE 

CHANGE LINE INACTIVE, GO SET TYPE 



AX ; RESTORE TYPE VALUE 

DISKETTE_STATUS,TIME_OUT ; INDICATE NO MEDIA IN DRIVE 
BX, [BP] ; RESTORE DRIVE PARMETER FOR USE AS INDEX 

BH,BH ; CLEAR HIGH ORDER OFFSET 

DSK_STATE[BX], POA_DUAL ; SET STATE TO POWER ON A5SUMPI10N 
; RETURN TO CALLER 



AX 



RESTORE TYPE VALUE 

CHECK FOR 320/360K MEDIA IN 1 . 2M DRIVE 

BYPASS I F NOT 



SE: MOV 
SO: RET 
FORMAT_SET 



DISKETTE_STATUS,BAD CMD ; UNKNOWN SFATL.BAU COMMAND 

; RETURN TO CALLER 
ENDP 



DSKETTE_SETUP 
THIS ROUTINE DOES A PRELIMINARY CHECK TO SEE 
WHAT TYPE OF DISKETTE DRIVES ARE ATTACH TO THE 
SYSTEM. TEST IS ONLY PERFORMED WHEN A DUAL 
ATTACHMENT CARD EXISTS. 



0771 












0771 


50 










0772 


53 










0773 


51 










0774 


52 










0775 


56 










0776 


57 










0777 


06 










0778 


IE 










0779 


55 










077A 


E8 


0000 E 






077D 


BB 


0000 






0780 


C7 


87 


0090 


R 


oooo 


0786 


C7 


87 


0092 


R 


0000 


078C 


C6 


06 


008B 


R 


GO 


0791 


C6 


06 


003E 


R 


00 


0796 


06 


06 


0040 


R 


00 


079B 


C6 


06 


003F 


R 


00 


07AO 


53 










07A1 


BO 


01 








07A3 


80 


26 


003F 


R 


CF 


07A8 


B1 


04 








07AA 


02 


C3 








07AC 


08 


IE 


003F 


R 




07B0 


D2 


CB 








07B2 


8A 


CB 








07B4 


D2 


EO 








07B6 


FA 










07B7 


84 


06 


003F 


R 




07BB 


75 


09 








07BD 


08 


06 


003F 


R 




07C1 


C6 


06 


0040 


R 


FF 


07C6 


FB 










07C7 


BA 


03 F2 






07CA 


AO 


003F R 






07CD 


24 


3F 








07CF 


B1 


04 








07D1 


D2 


CO 








07D3 


OC 


OC 








07D5 


EE 










07D6 


8B 


03 








0708 


B5 


30 








07DA 


E8 


041 C R 






07DD 


5A 










07DE 


52 










07DF 


B5 


OA 








07E1 


E8 


041C R 







DSKETTE SETUP 


PROC NEAR 


PUSH 


AX ; 


PUSH 


BX ; 


PUSH 


CX ; 


PUSH 


DX ; 


PUSH 


SI ; 


PUSH 


Dl ; 


PUSH 


ES ; 


PUSH 


DS ; 


PUSH 


BP ; 


CALL 


DDS ; 


MOV 


BX,0 ; 


MOV 


WORD PTR DSK STAT 


MOV 


WORD PTR DSK STAT 


MOV 


LASTRATE.O ; 


MOV 


SEEK_STATUS.O : 


MOV 


MOTOR COUNT, ; 


MOV 


MOTOR STATUS, ; 


SUPO: PUSH 


BX ; 


MOV 


AL,01 ; 


AND 


MOTOR STATUS, OCFH 


MOV 


CL,4 ; 


ROL 


BL,CL ; 


OR 


MOTOR STATUS, BL ; 


ROR 


BL,CL ; 


MOV 


CL,BL ; 


SHL 


AL,CL ; 


CLI 




TEST 


AL, MOTOR STATUS ; 


-JNZ 


SUP2 ; 


OR 


MOTOR STATUS, AL ; 


MOV 


MOT0R_COUNT,0FFH 


SUP2: STI 




MOV 


DX,03F2H ; 


MOV 


AL, MOTOR STATUS ; 


AND 


AL,03FH ; 


MOV 


CL,4 ; 


ROL 


AL,CL ; 


OR 


AL,OCH ; 


OUT 


DX,AL ; 


MOV 


DX, BX ; 


MOV 


CH,TRK SLAP 


CALL 


SEEK ; 


POP 


DX ; 


PUSH 


DX ; 


MOV 


CH, QUIET SEEK ; 


CALL 


SEEK ; 



SAVE REGISTERS 



LOAD DATA SEGMENT REGISTER TO ROM BIOS AREA 

INITIALIZE DRIVE POINTER 
E[BX],0 ; INITIALIZE STATES 
E[BX+2],0 ; INITIALIZE START STATES 

INITIALIZE LAST DATA TRANSFER RATE 

INDICATE RECALIBRATES NEEDED 

INITIALIZE MOTOR COUNT 

INITIALIZE DRIVES TO OFF STATE 

SAVE POINTER 

MASK FOR DETERMINING MOTOR BIT 

; CLEAR ENCODED DRIVE SELECT BITS(4 & 5) 

SHIFT DRIVE NUMBER INTO HIGH NIBBLE COUNT 

SHIFT DRIVE NUMBER INTO HIGH NIBBLE 

ADD IN DRIVE NUMBER SELECTED FOR LATER USE 

RESTORE DRIVE NUMBER 

RESTORE DRIVE NUMBER 

FORM MOTOR ON B I T MASK 

NO INTERRUPTS WHILE DETERMING MOTOR STATUS 

TEST 

DONT NEED TO SELECT DEVICE IF MOTOR ON 

TURN ON CURRENT MOTOR 
; SET LARGE COUNT DURING OPERATION 
ENABLE INTERRUPTS AGAIN 
ADDRESS DIGITAL OUTPUT REGISTER 
GET DIGITAL OUTPUT REGISTER REFLECTION 
STRIP AWAY UNWANTED BITS 
SHI FT COUNT 

PUT BITS IN DESIRED POSITIONS 
NO RESET, ENABLE DMA/ I NT 
SELECT DRIVE 

ESTABLISH DRIVE PARM FOR SEEK ROUTINE 
GET TRACK TO SEEK T0(>40) 
SEEK TO TRACK 
RESTORE POINTER 
SAVE POINTER 

SEEK SO FAR IN, BEFORE ISSUING SINGLE STEPS 
SEEK TO TRACK 10 



5-100 Diskette 



07Eit 


B5 


OA 




07E6 


33 


F6 




07E8 


FE 


CD 




07EA 


5A 






07EB 


52 






07 EC 


56 






07ED 


E8 


0410 R 




07F0 


BU 


04 




07F2 


E8 


0820 R 




07F5 


E8 


0580 R 




07 F8 


5E 






07 F9 


U6 






07 FA 


F6 


06 0042 R 10 


07FF 


75 


08 




0801 


83 


FE OB 




080U 


72 


E2 




0806 


5B 






0807 


E8 


10 




0809 


5B 






080A 


83 


FE OA 




080D 


C6 


87 0090 R 61 


0812 


73 


05 




osm 


C6 


87 0090 R 93 


0819 








0819 


U3 






081A 


83 


FB 02 




081D 


74 


03 




081 F 


E9 


07AO R 




0822 


5D 






0823 


1 F 






082U 


07 






0825 


5F 






0826 


5E 






0827 


5A 






0828 


59 






0829 


58 






082A 


58 






082B 


C3 






082C 


E8 


03E2 R 




082 F 


8A 


E2 




0831 


E8 


03E2 R 




083U 


C3 







MOV 
XOR 
SUP3: DEC 
POP 
PUSH 
PUSH 
CALL 

MOV 
CALL 
CALL 
POP 



POP 
CMP 
MOV 
JAE 



CH,QUIET_SEEK 



AH,SENSE_DRV_ST 

SUP5 

RESULTS 



SHORT NXT_DRV 



,QUIET_SEEK 



GET TRACK AT PRESENTLY 

CLEAR SEEK COUNTER 

SEEK TO NEXT TRACK, TOWARDS TRACK 

RESTORE POINTER 

SAVE POINTER 

SAVE COUNTER 

SEEK TO TRACK 

SENSE DRIVE STATUS COMMAND BYTE 

ISSUE THE COMMAND 

GO GET STATUS 

RESTORE COUNTER 

COUNT NUMBER OF SEEKS T I L AT HOME( TRACK 





CMP 


BX,MAX DRV 




JE 


SUPl 




JMP 


SUPO 


SUP! : 


POP 


BP 




POP 


OS 




POP 


ES 




POP 


Dl 




POP 


SI 




POP 


DX 




POP 


CX 




POP 


BX 




POP 


AX 




RET 


STACK CORRECl 






SUP5: 


CALL 


NEC OUTPUT 




MOV 


AH,DL 




CALL 


NEC OUTPUT 




RET 





DSK_STATEIBX], POA_DUAL ; SETUP POWER ON ASSUMPTION 
...., I F YES 1 .2 DRIVE 

DSK_STATE(BX],M326D326 ; ESTABLISH 320/360K STATE 

POINT TO NEXT DRIVE 

SEE IF DONE 

IF FINISHED LEAVE TEST 

REPEAT TIL DONF FOR EACH DRIVE 

RESTORE ALL REGISTERS 



OTHERWISE RETURN 



OUTPUT TO NEC 

GET DRIVE NUMBER SELECTED 

OUTPUT TO NEC 



DSKETTE_SETUP ENDP 



Diskette 5-101 



5-102 Diskette 



TITLE FIXED DISK BIOS FOR IBM DISK CONTROLLER 1-11- 

PUBLIC DISK„IO 
PUBLIC HD_INT 
PUBLIC DISK_SETUP 



EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 
EXTRN 



FT 780. -NEAR 
F1781:NEAR 
F1782:NEAR 
F1790: NEAR 
F1791 :NEAR 
FD TBL:NEAR 
NT 13 



FIXED DISK I/O INTERFACE 

THIS INTERFACE PROVIDES ACCESS TO 5 1/U" FIXED DISKS 
THROUGH THE IBM FIXED DISK CONTROLLER. 
THE BIOS ROUTINES ARE MEANT TO BE ACCESSED THROUGH 
SOFTWARE INTERRUPTS ONLY. ANY ADDRESSES PRESENT IN 
THE LISTINGS ARE INCLUDED ONLY FOR COMPLETENESS, 
NOT FOR REFERENCE. APPLICATIONS WHICH REFERENCE 
ABSOLUTE ADDRESSES WITHIN THE CODE SEGMENT 
VIOLATE THE STRUCTURE AND DESIGN OF BIOS. 



(AH = 



HEX VALUE) 



(AH) = O0 RESLI DISK ( DL = 80H,81H) / DISKETTE 

(AH)=01 READ THE STATUS OF THE LAST DISK OPERATION INTO (AL) 
NOTE: DL < 80H - DISKETTE 
DL > 80H - DISK 

(AH)=02 READ THE DESIRED SECTORS INTO MEMORY 

(All)=03 WRITE THE DESIRED SECTORS FROM MEMORY 

(AH)=0'+ VERIFY THE DESIRED SECTORS 

(AH)=05 FORMAT THE DESIRED TRACK 

(AH)=06 UNUSED 

(AH)=07 UNUSED 

(AH)=08 RETURN THE CURRENT DRIVE PARAMETERS 

(AH)=09 INITIALIZE DRIVE PAIR CHARAC I ER I ST I CS 

INTERRUPT Ul POINTS TO DATA BLOCK FOR DRIVE 
INTERRUPT 46 POINTS TO DATA BLOCK FOR DRIVE 1 

(AH)=OA READ LONG 

(AH)=OB WRITE LONG 

NOTE: READ AND WRITE LONG ENCOMPASS 512 + H BYTES ECC 

(AH)=OC SEEK 

(AH)=OD ALTERNATE DISK RESET (SEE DL) 

(AH)=OE UNUSED 

(AH)=OF UNUSED 

(AH)=10 TEST DRIVE READY 

(AH)=11 RECALIBRATE 

(AH)=12 UNUSED 

(AH)=13 UNUSED 

(AH)=1U CONTROLLER INTERNAL DIAGNOSTIC 

(AH)=15 READ DASD TYPE 

REGISTERS USED FOR FIXED DISK OPERATIONS 



(DL) 
(DH) 
(CH) 
(CD 



DRIVE NUMBER 
HEAD NUMBER 
CYLINDER NUMBER 
SECTOR NUMBER 



(80H-81H FOR DISK, VALUE CHECKED) 
(0-15 ALLOWED, NOT VALUE CHECKED) 
(0-1023, NOT VALUE CHECKED) (SEE CL) 
(1-17, NOT VALUE CHECKED) 



NOTE: HIGH 2 BITS OF CYLINDER NUMBER ARE PLACED 
IN THE HIGH 2 BITS OF THE CL REGISTER 
(10 BITS TOTAI ) 
(AL) - NUMBER OF SECTORS (MAXIMUM POSSIBLE RANGE 1-80H, 

FOR READ/WRITE LONG 1-79H) 
(ES:BX) - ADDRESS OF BUFFER FOR READS AND WRITES, 
(NOT REQUIRED FOR VERIFY) 

FORMAT (AH=5) ES: BX POINTS TO A 512 BYTE BUFFER. THE FIRST 

2*( SECTORS/TRACK) BYTES CONTAIN F,N FOR EACH SECTOR. 

F = OOH FOR A GOOD SECTOR 
80H FOR A BAD SECTOR 

N = SECTOR NUMBER 

FOR AN INTERLEAVE OF 2 AND 17 SECTORS/TRACK 

THE TABLE SHOULD BE: 
DB 0OH,O1H,O0H,0AH,0OH,02H,00H,OBH,0OH,O3H,0OH,OCH 
DB 0OH,O'+H,O0H,0DH,OOH,05H,0OH,0EH,0OH,O6H,OOH,0FH 
DB 0OH,07H,O0H, 10H, OOH, 08H, OOH, 11H,00H,09H 

IT 
AH = STATUS OF CURRENT OPERATION 

STATUS BITS ARE DEFINED IN THE EQUATES BELOW 
CY = SUCCESSFUL OPERATION ( AH=0 ON RETURN) 
CY = 1 FAILED OPERATION (AH HAS ERROR REASON) 

NOTE: ERROR 11H INDICATES THAT THE DATA READ HAD A RECOVERABLE 
ERROR WHICH WAS CORRECTED BY THE ECC ALGORITHM. THE DATA 
IS PROBABLY GOOD, HOWEVER THE BIOS ROUTINE INDICATES AN 
ERROR TO ALLOW THE CONTROLLING PROGRAM A CHANCE TO DECIDE 
FOR ITSELF. THE ERROR MAY NOT RECUR IF THE DATA IS 
REWRITTEN. 

IF DRIVE PARAMETERS WERE REQUESTED, 

DL = NUMBER OF CONSECUTIVE ACKNOWLEDGING DRIVES ATTACHED (0-2) 

(CONTROLLER CARD ZERO TALLY ONLY) 
DH = MAXIMUM USEABLE VALUE FOR HEAD NUMBER 
CH = MAXIMUM USEABLE VALUE FOR CYLINDER NUMBER 
CL = MAXIMUM USEABLE VALUE FOR SECTOR NUMBER 
AND CYLINDER NUMBER HIGH BITS 

1 F READ DASD TYPE WAS REQUESTED, 

AH = - NOT PRESENT 

1 - DISKETTE - NO CHANGE LINE AVAILABLE 

2 - DISKETTE - CHANGE LINE AVAILABLE 

3 - FIXED DISK 

CX, DX = NUMBER OF 512 BYTE BLOCKS WHEN AH = 3 



: OOFF 

: OOEO 

: OOCC 

: COBB 

■■ OOAA 

: 0080 

: 0040 



SENSE FAIL 


EQU 


OFFH 


NO ERR 


EQU 


OEOH 


WRITE FAULT 


EQU 


OCCH 


UNDEF ERR 


EQU 


OBBH 


NOT ROY 


EQU 


OAAH 


TIME OUT 


CQU 


80H 


BAD SEEK 


EQU 


UGH 



NOT IMPLEMENTED 

STATUS ERROR/ERROR REG=0 

WRITE FAULT ON SELECTED DRIVE 

UNDEFINED ERROR OCCURRED 

DRIVE NOT READY 

ATTACHMENT FAILED TO RESPOND 

SEEK OPERATION FAILED 



Disk 5-103 



= 0020 
= 0011 
= 0010 
= OOOB 
= OOOA 
= 0009 
= 0007 
= 0005 
= 0004 
= 0002 
= 0001 



BAD CNTLR 


EQU 


20H 


DATA CORRECTED 


EQU 


1 1H 


BAD ECC 


EQU 


TOH 


BAD TRACK 


EQU 


OBH 


BAD SECTOR 


EQU 


OAH 


DMA BOUNDARY 


EQU 


09H 


INIT FAIL 


EQU 


07H 


BAD RESET 


EQU 


03H 


RECORD NOT END 


EQU 


OilH 


BAD ADDR MARK 


EQU 


02H 


BAD CMD 


EQU 


01H 


PAGE 







CONTROLLER HAS FAILED 

ECC CORRECTED DATA ERROR 

BAD ECC ON DISK READ 

NOT IMPLEMENTED 

BAD SECTOR FLAG DETECTED 

DATA EXTENDS TOO FAR 

DRIVE PARAMETER ACTIVITY FAILED 

RESET FAILED 

REQUESTED SECTOR NOT FOUND 

ADDRESS MARK NOT FOUND 

BAD COMMAND PASSED TO DISK 1/0 



IXED DISK PARAMETER TABLE 

- THE TABLE IS COMPOSED OF A BLOCK DEFINED AS: 

+0 (1 WORD) - MAXIMUM NUMBER OF CYLINDERS 

+2 (1 BYTE) - MAXIMUM NUMBER OF HEADS 

+3 (1 WORD) - NOT USED/SEE PC-XT 

+5 (1 WORD) - STARTING WRITE PRECOMPENSAT ION CYL 

+7 (1 BYTE) - MAXIMUM ECC DATA BURST LENGTH 



(1 BYTE) 



(3 BYTES) 

(1 WORD) 

(1 BYTE) 

(1 BYTE) 



CONTROL BYTE 
BIT 7 DISABIF RFTR I ES -OR- 
BIT 6 DISABLE RETRIES 
BIT 3 MORE THAN 8 HEADS 
NOT USED/SEE PC-XT 
LANDING ZONE 
NUMBER OF SECTORS/TRACK 
RESERVED l-OR FUTURE USE 



TO DYNAMICALLY DEFINE A SET OF PARAMETERS 
BUILD A TABLE FOR UP TO 15 TYPES AND PLACE 
THE CORRESPONDING VECTOR INTO INTERRUPT 41 
FOR DRIVE AND INTERRUPT 46 FOR DRIVE 1. 



PAGE 

INCLUDE SEGMENT. SRC 
CODE SEGMENT BYTE PUBLIC 



0001 
0002 
0004 
0008 
0010 
0020 
0040 
0080 



0001 
0002 
OOOU 



: 0010 
= 0020 
0030 
: 0040 
= 0050 
^ 0060 
= 0070 
= 0090 
= 0091 
: 0001 
: 0002 
: 0008 

■■ OOAO 
= 0020 
= 0020 



= 0020 
= 0600 
= 0100 



HARDWARE SPECIFIC VALUES 



HF_P0RT+0 - READ DATA (FROM CONTROLLER TO CPU) 
HF_P0RT+1 - GET ERROR REGISTER 
HF_P0RT+2 - GET SECTOR COUNT 
HF_P0RT+3 - GET SECTOR NUMBER 
HF_P0RT+4 - GET CYLINDER LOW 
HF_P0RT+5 - GET CYLINDER HIGH (2 BITS) 
HF_P0RT+6 - GET SIZE/DRIVE/HEAD 
HF_P0RT+7 - GET STATUS REGISTER 
■ WHEN WRITTEN TO: 

HF_P0RT+0 - WRITE DATA (FROM CPU TO CONTROLLER) 
HF_P0RT+1 - SET PRECOMPENSAT ION CYLINDER 
HF_P0RT+2 - SET SECTOR COUNT 
HF_P0RT+3 - SET SECTOR NUMBER 
HF_P0RT+4 - SET CYLINDER LOW 
HF_P0RT+5 - SET CYLINDER HIGH (2 BITS) 
HF_P0RT+6 - SET SIZE/DRIVE/HEAD 
HF_P0RT+7 - SET COMMAND REGISTER 



HF PORT 


EQU 


01F0H 


HF_REG_PORT 


EQU 


3F6H 


; STATUS 


REGISTER 




ST ERROR 


EQU 


00000001B 


ST INDEX 


EQU 


00000010B 


ST CORRCTD 


EQU 


00000100B 


ST DRQ 


EQU 


00001 OOOB 


ST SEEK COMPL 


EQU 


00010000B 


ST WRT FLT 


EQU 


00100000B 


ST READY 


EQU 


01000000B 


ST_BUSY 


EQU 


10000000B 


; ERROR REGISTER 




FRR DAM 


EQU 


00000001 B 


ERR TRK 


EQU 


00000010B 


ERR_ABORT 


EQU 


00000100B 




EQU 


00001000B 


ERR_ID 


EQU 


00010000B 




EQU 


00100000B 


ERR DATA ECC 


EQU 


01000000B 


ERR_BAD_BLOCK 


EQU 


10000000B 


REGAL CMD 


EQU 


00010000B 


READ CMD 


EQU 


00100000B 


WRITE CMD 


EQU 


oonooooB 


VERIFY CMD 


EQU 


01000000B 


FMTTRK CMD 


EQU 


01010000B 


INIT CMD 


EQU 


01 100000B 


SEEK CMD 


EQU 


oinooooB 


01 AG CMD 


EQU 


100100008 


SET PARM CMD 


EQU 


10010001B 


NO RETRIES 


EQU 


00000001 B 


ECC MODE 


EQU 


0000001 OB 


BUFFER_MODE 


EQU 


OOO01000B 


INT CTL PORT 


EQU 


OAOH 


INTl CTL PORT 


EQU 


020H 


EOl 


EQU 


20H 


MAX FILE 


EQU 


2 


S_MAX_F 1 LE 


EQU 


2 


DELAY 1 


EQU 


20H 


DELAY 2 


EQU 


0600H 


DELAY_3 


EQU 


0100H 


HF_FAIL 


EQU 


08H 




EXTRN 


P_MSG:NEAR 


ASSUME 


CS:CODE 





; DISK PORT 



ECC CORRECTION SUCCESSFUL 



DATA ADDRESS 


MARK NOT FOUND 


TRACK NOT 


^OUND ON RECAL 


ABORTED COMMAND 


NOT USED 




ID NOT FOUND 




NOT USED 




DRIVE REGAL 


(10H) 


READ 


(20H) 


WRITE 


(30H) 


VERI FY 


(40H) 


FORMT TRACK 


(50H) 


INITIALIZE 


(60H) 


SEEK 


(70H) 


DIAGNOSTIC 


(90H) 


DRIVE PARMS 


(91H) 


CMD MODIFIER 


(01H) 


CMD MODI FIER 


(02H) 


CMD MODI FIER 


(08H) 



8259 CONTROL PORT #2 
8259 CONTROL PORT #1 
END OF INTERRUPT COMMAND 



DELAY FOR OP COMPLETE 

DELAY FOR READY 

DELAY FOR DATA REQUEST 



PAGE 

FIXED DISK I/O SETUP 



5-104 Disk 



ESTABLISH TRANSFER VECTORS FOR THE FIXED DISK 

PERFORM POWER ON DIAGNOSTICS 

SHOULD AN ERROR OCCUR A "1701" MESSAGE IS DISPLAYED 



0000 

0000 
0002 
OOOU 
0005 
0009 
GOOD 
0011 
0015 
OOIC 
0021 
002U 
0028 
002D 
003U 
0039 
0040 
0045 
0OU6 
00U8 
OOUA 
004C 
OOUE 
0050 



0052 
0055 
0057 
005C 
0061 
0066 
0068 
006A 
006C 
006E 
0070 
0072 
0074 
0077 
0079 
007B 
007D 
007F 
0081 
0083 
0085 
0087 
0089 
008E 
0090 
0092 
0094 
0096 
0099 
009D 
0OA2 

0OA4 
0OA4 
0OA6 
0OA4 
0OA4 
0OA6 
0OA6 
0OA7 
0OA9 
OOAB 
OOAE 
0082 
0OB7 
0OB9 
COBB 
OOBD 
OOBF 
0OC2 
0OC4 
0OC7 
00C9 
OOCC 
0OD1 
0OD3 
0OD5 
0OD8 
0OD8 
00D9 
OODB 
OQOD 
OODF 
OOEO 



0OE1 
0OE1 
0OE4 
00E7 
OOEA 
OOED 



i: A1 004C R 

,: A3 0100 R 

,: A1 004E R 

,: A3 0102 R 

.: C7 06 004C R 0197 R 

,: 8C OE 004E R 

; 06CA R 

,: A3 01D8 R 

,: 80 OE 01DA R 

t: C7 06 0104 R OOOO E 

,: 8C OE 0106 R 

.: C7 06 0118 R OOOO E 

I: 8C OE 011A R 



8E D8 

C6 06 0074 R 00 

06 06 0075 R 00 

06 06 0076 R 00 

BO 8E 

E6 70 

EB 00 

E4 71 

8A EO 

24 CO 

75 64 

80 E4 F7 

BO 8E 

E6 70 

8A C4 

EB 00 

E6 71 

BO 92 

E6 70 

EB 00 

E4 71 

06 06 0077 R 00 

8A D8 

B4 00 

24 FO 

74 42 

05 FFFO E 

26: A3 0104 R 

C6 06 0075 R 01 

8A 03 



04 

74 OE 

B4 00 

05 FFFO E 

26: A3 0118 R 

C6 06 0075 R 02 

B2 80 

B4 14 

CD 13 

72 22 

A1 006C R 

8B D8 

05 0444 

88 C8 

E8 OOEF R 

80 3E 0075 R 01 

76 05 

B2 81 

E8 OOEF R 

FA 



DISK_SETUP 

ASSUME 

SUB 

MOV 

CLI 

MOV 

MOV 

MOV 

MOV 

MOV 

MOV 

MOV 

MOV 

MOV 

MOV 

MOV 

MOV 

MOV 



PROC NEAR 
ES:ABSO 
AX, AX 
ES.AX 

AX, WORD PTR ORG_VECTOR 

WORD PTR DISK_VECTOR,AX 

AX, WORD PTR 0RG_VECT0R+2 

WORD PTR DISK_VECT0R+2.AX 

WORD PTR ORG_VECTOR, OFFSET DISK_I0 ; HDISK HANDLER 

WORD PTR 0RG_VECT0R+2.CS 

AX, OFFSET HD_INT 

WORD PTR HDISK_INT,AX 

WORD PTR HDISK_INT+2,CS 

WORD PTR HF_TBL_VEC, OFFSET FD_TBL 

WORD PTR HF_TBL_VEC+2,CS 

WORD PTR HF1_TBL_VEC, OFFSET FD_TBL 

WORD PTR HF1_TBL_VEC+2,CS 

; ** 10 DELAY NOT REQUIRED »* 
AL, INT„CTL PORT+1 ; TURN ON SECOND INTERRUPT CHIP 
AL, OBFH 

INT CTL_P0RT+1,AL 

AL, INT1_CTL_P0RT+1 ; LET INTERRUPTS PASS THRU TO 

AL,OFBH ; SECOND CHI P 

INT1_CTL_P0RT+1,AL 



70001 



E4 21 
24 FE 
E6 21 



BE OOOO I 
E8 0161 I 
E8 OOOO I 
BD OOOF 
EB E9 



MOV 
ADD 
MOV 
MOV 
MOV 
MOV 
INT 
JC 
MOV 
MOV 
ADD 
MOV 
CALL 
CMP 
JBE 
MOV 
CALL 
IE: 
CLI 



HDISK INTERRUPT 



PARM TBL DRV 80 
PARM TBL DRV 81 



ASSUME 

MOV 

MOV 

MOV 

MOV 

MOV 

MOV 

OUT 

JMP 

IN 

MOV 

AND 

JNZ 

AND 

MOV 

OUT 

MOV 

JMP 

OUT 

MOV 

OUT 

JMP 

IN 

MOV 

MOV 

MOV 

AND 

JZ 

ADD 

MOV 

MOV 

MOV 

ISHL 
70000 LABEL 
SHL 



DS:DATA 

AX, DATA ; 

DS,AX 

D1SK_STATUS1,0 ; 

HF_NUM,0 ; 

CONTROL_BYTE,0 

AL, 8EH 

70H,AL ; 

SHORT $+2 

AL,71H 

AH,AL ; 

AL,OCOH 

P0D_D0NE ; 

AH, NOT HF_FAIL ; 

AL,8EH ; 

70H,AL 

AL,AH 

SHORT $+2 

71H,AL 

AL,92H 

7nH,AL ; 

SHORT $+2 

AL,71H 

PORT_OFF,0 ; 

BL,AL ; 

AH,0 

AL,OFOH ; 

POD_DONE ; 

AX, OFFSET FD_TBL-16D ; 

WORD PTR HF_TBL_VEC,AX 

HF_NUM,1 ; 

AL,BL 

AL,4 ; 

BYTE 

AL.1 

BYTE 

OFFSET CS:??0000 

OCOH 
OFFSET CS:??0001 
4 

SHORT L4 ; 

AH,0 

AX, OFFSET FD_TBL-16D ; 
WORD PTR HF1_TBL_VEC,AX 
HF_NUM,2 ; 

DL,80H ; 

AH,14H 
13H 

CTL_ERRX 

AX,TIMER_L0W ; 

BX,AX 

AX, 6*1 82 ; 

CX,AX 

HD_RESET_1 ; 

HF_NUM, 1 ; 

P0D_D0NE ; 

DL,81H ; 

HD_RESET_1 



AL,021H 
AL,0FEH 
021H,AL 



ESTABLISH SEGMENT 



CHECK CMOS VALIDITY 



SAVE CMOS FLAG 

CMOS NOT VALID -- NO HARD FILES 
ALLOW HARD FILE I PL 
WRITE IT BACK 



ACCESS HARD FILE BYTE IN CMOS 



GET FIRST DRIVE TYPE 
NO HARD FILES 
COMPUTE OFFSET 

AT LEAST ONE DRIVE 

GET SECOND DRIVE TYPE 



ONLY ONE DRIVE 

COMPUTE OFFSET FOR DRIVE 1 



GET START TIMER COUNTS 

60 SECONDS * 18.2 

SET UP DRIVE 

WERE THERE TWO DRIVES? 

NO-ALL DONE 

SET UP DRIVE 1 



POD ERROR 



MOV 
CALL 
CALL 
MOV 
JMP 



SI, OFFSET F1782 

SET_FAIL 

P_MSG 

BP,OFH 

SHORT POD_DONE 



CONTROLLER ERROR 
DONT I PL FROM DISK 
DISPLAY ERROR 
POD ERROR FLAG 



OOEF 
OOEF 
00 FO 
0OF1 
00F3 
0OF5 
00 F7 
00 F9 
OOFB 
OOFD 
0100 
0102 
0105 
0108 
010A 
010D 
0110 
0112 



HD_RESET_1 



B4 09 
CD 13 

72 06 
B4 11 
CD 13 

73 15 

E8 0178 R 
73 EF 
BE OOOO E 
F6 C2 01 
75 4E 
BE OOOO E 
E8 0161 R 
EB 46 
B4 08 



PUSH 
PUSH 
MOV 



MOV 
INT 
JNC 

RES_2: CALL 
JNC 

RES_FL: MOV 
TEST 
JNZ 
MOV 
CALL 
JMP 

RES_CK: MOV 



BX 

AH,09H 

13H 

RES_2 

AH,11H 

13H 

RES_CK 

P0D_TCHK 

RES_1 

SI, OFFSET F1781 

DL, 1 

RES_E1 

SI, OFFSET F1780 

SET_FAIL 

SHORT RES_E1 

AH,08H 



SAVE TIMER LIMITS 
SET DRIVE PARMS 

RECALIBRATE DRIVE 



INDICATE DISK 1 FAILURE 



GET MAX CYL, HEAD, SECTOR 



Disk 5-105 



onu 


8A 


DA 


0116 


CD 


13 


0118 


72 


33 


OIIA 


8A 


03 


one 


B8 


0401 


on F 


CD 


1 3 


0121 


73 


36 


0123 


80 


FC OA 


0126 


74 


36 


0128 


80 


FC 11 


012B 


74 


31 


012D 


80 


FC 10 


0130 


74 


2C 


0132 


E8 


0178 R 


0135 


72 


16 


0137 


AG 


0044 R 


013A 


FE 


C8 


013C 


74 


D4 


013E 


8A 


2E 0045 


0142 


8A 


OE 0046 


0146 






0146 


DO 


El 


01U8 






0146 






0146 


CO 




0148 






0148 


06 




0149 


OA 


08 


014B 


EB 


OF 


014D 


BE 


OOOO E 


0150 


F6 


C2 01 


0153 


75 


03 


0155 


BE 


0000 E 


0158 


E8 


0000 E 


015B 


BD 


OOOF 


015E 


59 




015F 


5B 




0160 


C3 




0161 






0161 






0161 


BO 


8E 


0163 


E6 


70 


0165 


EB 


00 


0167 


E4 


71 


0169 


OC 


08 


016B 


8A 


EO 


0160 


BO 


8E 


016F 


E6 


70 


0171 


8A 


04 


0173 


EB 


GO 


0175 


E6 


71 


0177 


C3 




0178 






0178 






0178 


58 




0179 


59 




017A 


5B 




017B 


53 




017C 


51 




0170 


50 




017E 


A1 


O06C R 


0181 


3B 


D9 


0183 


72 


06 


0185 


3B 


D8 


0107 


72 


OC 


0189 


EB 


04 


018B 


3B 


C3 


018D 


72 


04 


018F 


3B 


CI 


0191 


72 


02 


0193 


F9 




0194 


C3 




0195 


F8 




0196 


C3 




019/^ 







SAVE DRIVE CODE 



0197 


SO 


FA 80 


019A 


73 


05 


019C 


CD 


40 


019E 






019E 


CA 


O0O2 


01A1 






01A1 


FB 




01A2 


OA 


E4 


01A4 


75 


09 


01A6 


CD 


40 


01A8 


■Pk 


Ell 


OlAA 


80 


FA 81 


OlAD 


11 


EF 


01AF 






OlAF 


m 


FC 08 


0132 


/5 


03 


01 B4 


t9 


038B R 


01 87 


80 


FC 15 


01 BA 


/5 


03 


01 BC 


ty 


0349 R 


01BF 






OIBF 


53 




01C0 


51 




OlCl 


52 




01C2 


IE 




01C3 


06 




OlC/t 


56 




01C5 


5/ 




01C6 


OA 


E4 


01C8 


/5 


02 


01 CA 


B2 


80 


01CC 


F8 


0212 R 


01CF 


50 




0100 


B8 




01D3 


8E 


D8 





JC 


RES ER 






MOV 


DL,BL 


RESTORE DRIVE CODE 


RES_3: 


MOV 


AX, 0401 H 


VERIFY THE LAST SECTOR 




INT 


1311 






JNC 


RES OK 


VERIFY OK 




CMP 


AH, BAD SECTOR 


OK ALSO IF JUST ID READ 




JE 


RES OK 






CMP 


AH, DATA CORRECTED 






JE 


RES OK 






CMP 


AH, BAD ECC 






JE 


RES OK 






CALL 


POD TCHK 


CHECK FOR TIME OUT 




JC 


RES ER 


FAILED 




MOV 


AL,CMD BLOCK+2 


GET SECTOR ADDRESS 




DEC 


AL 


TRY PREVIOUS ONE 




JZ 


RES CK 


WE'VE TRIED ALL SECTORS ON TRACK 




MOV 


CH,CMD BLOCK+3 


GET CYLINDER 




MOV 


CL,CMD BLOCK+4 


NUMBER 




ISHL 


CL,6 


MOVE THE BITS UP 


??0003 


LABEL 


BYTE 






SHL 


CL, 1 




??0004 


LABEL 


BYTE 






ORG 


OFFSET CS:??0003 






DB 


OCOH 






ORG 


OFFSET CS:??0004 






DB 


6 






OR 


CL,AL 


PUT SECTOR NUMBER IN PLACE 




JMP 


RES 3 


TRY AGAIN 


RES_ER: 


MOV 


SI, OFFSET F1791 


INDICATE DISK 1 ERROR 




TEST 


DL, 1 






JNZ 


RES El 






MOV 


SI, OFFSET F1790 


INDICATE DISK ERROR 


RES_E1 : 


CALL 


P MSG 






MOV 


BP,OFH 




RES_OK: 


POP 


CX 


RESTORE TIMER LIMITS 




POP 
RET 


BX 




HD_RESET_1 


ENDP 




SET_FAIL 


PROC NEAR 






MOV 


AL,8EH 


GET CMOS ERROR BYTE 




OUT 


70H,AL 






JMP 


SHORT $+2 






IN 


AL,71H 






OR 


AL,HF FAIL 


SET DONT IPL FROM DISK FLAG 




MOV 


AH,AL 


SAVE IT 




MOV 


AL,8EH 


CMOS BYTE ADDRESS 




OUT 


70H,AL 






MOV 


AL,AH 






JMP 


SHORT $+2 






OUT 


71H,AL 


PUT IT OUT 




RET 






SET_FAI 


L 


ENDP 




P0D_TCHK 


PROC NEAR 


CHECK FOR 30 SECOND TIME OUT 




POP 


AX 


SAVE RETURN 




POP 


CX 


GET TIME OUT LIMITS 




POP 


BX 






PUSH 


BX 


AND SAVE THEM AGAIN 




PUSH 


CX 






PUSH 


AX 


RESTORE RETURN 




MOV 


AX,TIMER_L0W 


AX = CURRENT TIME 








BX - START TIME 
CX = END TIME 




CMP 


BX,CX 






JB 


TCHKl 


START < END 




CMP 


BX,AX 






JB 


TCHKG 


END < START < CURRENT 




JMP 


SHORT TCHK2 


END, CURRENT < START 


TCHKl : 


CMP 


AX,BX 






JB 


TCHKNG 


CURRENT < START < END 


TCHK2: 


CMP 


AX,CX 






JB 


TCHKG 


START < CURRENT < END 
OR CURRENT < END < START 


TCHKNG: 


STC 
RET 




CARRY SET INDICATES TIME OUT 


TCHKG: 


CLC 
RET 




INDICATE STI LL TIME 


POD_TCHK 


ENDP 




DISK SETUP 


ENDP 




PAGE 








'; FIXED DISK BIOS ENTRY POINT : 


DISK_I0 PROC 


FAR 






ASSUME 


DS: NOTHI NO, ES: NOTHING 






CMP 


DL,80H 


TEST FOR FIXED DISK DRIVE 




JAE 


HARD DISK 


YES, HANDLE HERE 




INT 


40H 


DISKETTE HANDLER 


RET_2: 










RET 


2 


BACK TO CALLER 


HARD_D 


SK: 








ASSUME 


DS:DATA 






STI 




ENABLE INTERRUPTS 




OR 


AH, AH 






JNZ 


A2 






INT 


40H 


RESET NEC WHEN AH=0 




SUB 


AH, AH 






CMP 


DL,(80H + S MAX FILE - 1 






JA 


RET_2 




A2: 










CMP 


AH,08H 


GET PARAMETERS IS A SPECIAL CASE 




JNZ 


A3 






JMP 


GET PARM N 




A3: 


CMP 


AH,15H 


READ DASD TYPE IS ALSO 




JNZ 


A4 






JMP 


READ_DASD_TYPE 




A4: 










PUSH 


BX 


SAVE REGISTERS DURING OPERATION 




PUSH 


CX 






PUSH 


DX 






PUSH 


DS 






PUSH 


ES 






PUSH 


SI 






PUSH 


Dl 






OR 


AH, AH 


CHECK FOR RESET 




JNZ 


A5 






MOV 


DL,80H 


FORCE DRIVE 80 FOR RESET 


A5: 


CALL 


DISK 10 CONT 


PERFORM THE OPERATION 




PUSH 


AX 






MOV 


AX, DATA 






MOV 


DS,AX 


ESTABLISH SEGMENT 



5-106 Disk 



0105 


58 




0106 


8A 26 0074 R 


010A 


80 


FC 01 


01DD 


F5 




01DE 


5F 




01DF 


5E 




01 EO 


07 




01E1 


IF 




01E2 


5A 




01E3 


59 




01 EU 


5B 




01E5 


CA 


O002 


01 E8 






01 E8 






01 E8 


02B3 R 


01 EA 


0307 R 


01 EC 


031 


R 


01EE 


0318 R 


01 FO 


0320 R 


01 F2 


0333 R 


01 FU 


02AB R 


01 F6 


02AB R 


01 F8 


02AB R 


01 FA 


03EA R 


01 FC 


041 F R 


01FE 


0427 R 


0200 


042 F R 


0202 


02B3 R 


020U 


02AB R 


0206 


02AB R 


0208 


044 E R 


020A 


0465 R 


020C 


02AB R 


020E 


02AB R 


0210 


0489 R 


= 002A 




0212 






0212 


50 




021.3 


B8 


R 


0216 


8E 


D8 


0218 


58 




0219 


80 


FC 01 


021C 


75 


03 


021E 


E9 


0307 R 


0221 






0221 


C6 


06 0074 R 00 


0226 


53 




0227 


8A 


IE 0075 R 


022B 


50 




022C 


80 


E2 7F 


022 F 


3A 


DA 


0231 


76 


76 


0233 


06 




023U 


E8 


06B4 R 


0237 


26 


8B 47 05 


023B 






023B 


D1 


E8 


023D 






023B 






023B 






023B 


CI 




0230 






0230 


02 




023E 


A2 


0042 R 


0241 


26 


8A 47 08 


0245 


52 




0246 


BA 


03F6 


0249 


EE 




024A 


5A 




024B 


07 




024C 


8A 


26 0076 R 


0250 


80 


E4 CO 


0253 


OA 


EO 


0255 


88 


26 0076 R 


0259 


58 




025A 


A2 


0043 R 


0250 


50 




025E 


8A 


CI 


0260 


24 


3F 


0262 


A2 


0044 R 


0265 


88 


2E 0045 R 


0269 


8A 


CI 


0268 






0268 


DO 


E8 


0260 






026B 






026B 


CO 




0260 






026D 


06 




026E 


A2 


0046 R 


0271 


8A 


C2 


0273 






0273 


DO 


EO 


0275 






0273 






0273 


CO 




0275 






0275 


04 




0276 


80 


E6 OF 


0279 


OA 


C6 


027B 


OC 


AO 


027D 


A2 


0047 R 


0280 


58 




0281 


50 




0282 


8A 


C4 


0284 


32 


E4 


0286 


D1 


EO 


0288 


8B 


FO 


028A 


3D 


002A 


028D 


73 


1A 


028F 


58 




0290 


5B 




0291 


51 




0292 


50 




0293 


8B 


CB 


0295 






0295 


D1 


E9 


0297 






0295 






0295 









POP 


AX 




MOV 


AH, DISK STATUS1 




CMP 


AH,1 




CMC 






POP 


Dl 




POP 


SI 




POP 


ES 




POP 


DS 




POP 


DX 




POP 


CX 




POP 


BX 




RET 


2 


DISK_I0 


ENDP 




Ml 


LABEL 


WORD 




DW 


DISK RESET 




DW 


RETURN STATUS 




DW 


DISK READ 




DW 


DISK WRITE 




DW 


DISK VERF 




DW 


FMT TRK 




DW 


BAD COMMAND 




DW 


BAD COMMAND 




DW 


BAD COMMAND 




DW 


IN IT DRV 




DW 


RD LONG 




DW 


WR LONG 




DW 


DISK SEEK 




DW 


DISK RESET 




DW 


BAD COMMAND 




DW 


BAD COMMAND 




DW 


TST RDY 




DW 


HDISK RECAL 




DW 


BAD COMMAND 




DW 


BAD COMMAND 




DW 


CTLR DIAGNOSTIC 


MIL 


EQU 


$-M1 


D 1 SK_ 1 


CONT 


PROC NEAR 




PUSH 


AX 




MOV 


AX, DATA 




MOV 


DS.AX 




POP 


AX 




CMP 


AH,01H 




JNZ 


SUO 




JMP 


RETURN_STATUS 


SUO: 








MOV 


DISK STATUS1,0 




PUSH 


BX 




MOV 


BL,HF NUM 




PUSH 


AX 




AND 


0L,7FH 




CMP 


BL,DL 




JBE 


BAD COMMAND POP 




PUSH 


ES 




CALL 


GET VEC 




MOV 


AX, WORD PTR ES:[BX][51 




ISHR 


AX, 2 


? 70006 


LABEL 


BYTE 




SHR 


AX,1 


??0007 


LABEL 


BYTE 




ORG 


OFFSET CS: 770006 


??0008 


LABEL 


NEAR 




DB 


0C1H 




ORG 


OFFSET CS:??0007 




DB 


2 




MOV 


CMD BLOCK, AL 




MOV 


AL.BYTE PTR ES:[BX][81 




PUSH 


DX 




MOV 


0X,HF REG PORT 




OUT 


DX,AL 




POP 


DX 




POP 


ES 




MOV 


AH, CONTROL BYTE 




AND 


AH,OCOH 




OR 


AH,AL 




MOV 


CONTROL BYTE, AH 




POP 


AX 




MOV 


CMD BL0CK+1,AL 




PUSH 


AX 




MOV 


AL,CL 




AND 


AL,3PH 




MOV 


CMD BL0CK+2,AL 




MOV 


CMD BL0CK+3,CH 




MOV 


AL,CL 




ISHR 


AL,6 


??0009 


LABEL 


BYTE 




SHR 


AL, 1 


??000A 


LABEL 


BYTE 




ORG 


OFFSET CS:??0009 




DB 


OCOH 




ORG 


OFFSET CS^:??O00A 




DB 


6 




MOV 


CMD BL0CK+4,AL 




MOV 


AL,DL 




ISHL 


AL,4 


??000C 


LABEL 


BYTE 




SHL 


AL,1 


??000D 


LABEL 


BYTE 




ORG 


OFFSET CS:??O0OC 




DB 


OCOH 




ORG 


OFFSET CS:??O0OD 




DB 


4 




AND 


DH.OFH 




OR 


AL, DH 




OR 


AL.80H OR 20H 




MOV 


CMD BL0CK+5,AL 




POP 


AX 




PUSH 


AX 




MOV 


AL,AH 




XOR 


AH, AH 




SAl 


AX, 1 




MOV 


SI, AX 




CMP 


AX, MIL 




JNB 


BAD COMMAND POP 




POP 


AX 




POP 


BX 




PUSH 


CX 




PUSH 


AX 




MOV 


CX,BX 




ISHR 


CX,4 


??000F 


LABEL 


BYTE 




SHR 


CX,1 


770010 


LABEL 


BYTE 




ORG 


OFFSET CS:??000F 


??0011 


LABEL 


NEAR 



GET STATUS FROM OPERATION 

SET THE CARRY FLAG TO INDICATE 

SUCCESS OR FAILURE 
RESTORE REGISTERS 



THROW AWAY SAVED FLAGS 



001 H 
002H 
003H 
004H 
005H 
006H 
007H 
008H 
009H 
OOAH 
OOBH 
OOCH 
OODH 
GOEH 
OOFH 
010H 
011H 
012H 
013H 
014H 



FORMAT BAD SECTORS 
FORMAT DRIVE 
RETURN PARMS 



RAM DIAGNOSTIC 
DRIVE DIAGNOSTIC 
CONTROLLER DIAGNOSTIC 



ESTABLISH SEGMENT 
RETURN STATUS 



; RESET THE STATUS I ND 
SAVE DATA ADDRESS 
GET NUMBER OF DRIVES 

GET DRIVE AS OR 1 

INVALID DRIVE 



GET CONTROL BYTE MODIFIER 
SET EXTRA HEAD OPTION 



SECTOR COUNT 

GET SECTOR NUMBER 

GET CYLINDER NUMBER 



HEAD NUMBER 



GET INTO LOW BYTE 
ZERO HIGH BYTE 
*2 FOR TABLE LOOKUP 
PUT INTO SI FOR BRANCH 
TEST WITHIN RANGE 



Disk 5-107 



0295 


CI 


0297 




0297 


04 


0298 


8C CO 


029A 


03 01 


029C 


8E CO 


029E 


81 E3 OOOF 


02A2 


58 


02A3 


59 


02A(+ 


2E: FF Ak 01E8 


02A9 




02A9 


58 


02AA 


5B 


02AB 




02AB 


C6 06 0074 R 01 


02B0 


BO 00 


02B2 


C3 


02B3 





ORG OFFSET CS 

OB 4 

MOV AX, ES 

ADD AX, CX 

MOV ES,AX 

AND BX,OOOFH 

POP AX 

POP CX 

JMP WORD PTR CS:[SI + OFFSET Ml] 
BAD_COMMAND_POP: 

POP AX 

POP BX 
BAD_COMMAND: 

MOV 

MOV 

RET 
DISK_IO_CONT 



ES:BX CHANGED TO ES:OOOX 



COMMAND ERROR 



RESET THE DISK SYSTEM (AH = OOOH ) 



02B3 








02B3 


hA 






02B4 


F4 


A1 




02B6 


24 


8F 




02B8 


FA 


AT 




02 BA 


FB 






02BB 


BO 


04 




02BD 


BA 


03F6 




O2C0 


EE 






02C1 


B9 


OOOA 




02C4 


49 






02C5 


f^ 


FD 




02C7 


AO 


0076 R 




02CA 


24 


OF 




02CC 


FF 






02CD 


F8 


05DF R 




02DO 


75 


2F 




02D2 


BA 


01F1 




0205 


FC 






02D6 


30 


01 




02D8 


/5 


27 




02DA 


80 


26 0047 R 


FF 


02DF 


?A 


D2 




02E1 


E8 


03EA R 




02E4 


F« 


0465 R 




02E7 


«0 


3E 0075 R 


01 


02EC 


fb 


OD 




02EE 


80 


OE 0047 R 


10 


02F3 


B2 


01 




02F5 


E8 


03EA R 




02F8 


h« 


0465 R 




02FB 


C6 


06 0074 R 


00 


0300 


03 






0301 


C6 


06 0074 R 


05 


0306 


C3 






0307 









ST I 

MOV 

MOV 

OUT 

MOV 

DEC 

JNZ 

MOV 

AND 

OUT 

CALL 

JNZ 

MOV 

IN 

CMP 

JNZ 

AND 

SUB 

CALL 

CALL 

CMP 

JBE 

OR 

MOV 

CALL 

CALL 

MOV 

RET 

DRERR: MOV 
RET 

DISK_RESET 



DRE: 



AL, INT_CTL_P0RT+1 

AL,OBFH 

1NT_CTL_P0RT+1,AL 

AL,04H 

DX,HF_REG_PORT 

DX,AL 

CX, 10 

CX 

DRD 

AL,C0NTR0L_BYTE 

AL.OFH 

DX,AL 

NOT_BUSY 

DRERR 

DX,HF_P0RT+1 

AL,DX 

AL, 1 

DRERR 

CMD_BLOCK+5,0EFH 

DL,DL 

I N I T_DRV 

HDISK_RECAL 

HF_NUM, 1 

DRE 

CMD_BLOCK+5,010H 

DL,1 

I N I T_DRV 

HDISK_RECAL 

DISK_STATUS1,0 

I SK_STATUS1 , BAD_RESET 

ENDP 



** 10 DELAY NOT REQUIRED ' 
GET THE MASK REG 
ENABLE HARD FILE INT. 

START INTERRUPTS 



WAIT 4.8 MICRO-SEC 



TIME OUT ON RESET 
GET RESET STATUS 



SET MAX HEADS 

RECAL TO RESET SEEK SPEED 

CHECK FOR DRIVE 1 

SET TO DRIVE 1 

SET MAX HEADS 

RECAL TO RESET SEEK SPEED 

IGNORE ANY SET UP ERRORS 



CARD FAILED 



DISK STATUS ROUTINE (AH = 001 H) 



0307 

0307 AO 0074 R 

030A C6 06 0074 R 00 

030F C3 

0310 



RETURN_STATUS 
MOV 
MOV 
RET 

RETURN_STATUS 



PROC NEAR 

AL,DISK_STATUS1 

DISK_STATUS1,0 



DISK READ ROUTINE (AH = 002H) 



0310 

0310 C6 06 0048 R 20 

0315 E9 04BB R 

0318 



DISK_READ PROC NEAR 

MOV CMD_BL0CK+6,READ_CMD 

JMP COMMAND! 

DISK_READ ENDP 



DISK WRITE ROUTINE (AH = 003H) 



0318 

0318 C6 06 0048 R 30 

031D E9 04FB R 

0320 



DISK_WRITE PROC NEAR 

MOV CMD_BL0CK+6,WRITE_CMD 

JMP COMMANDO 

D1SK_WRITE ENDP 



DISK VERI FY ( AH = 



0320 




0320 


C6 06 0048 R 40 


0325 


E8 0544 R 


0328 


75 08 


032A 


E8 05A5 R 


032D 


75 03 


032F 


E8 061E R 


0332 




0332 


C3 


0333 





DISK_VERF 

MOV 

CALL 

JNZ 

CALL 

JNZ 

CALL 

VERF_EXIT: 
RET 

DISK_VERF 



PROC NEAR 

CMD_BL0CK+6, VER I FY_CMD 

COMMAND 

VERF_EXIT ; CONTROLLER STILL BUSY 

WAIT 

VERF_EXIT ; TIME OUT 

CHECK_STATUS 



FORMATTING (AH = 005H ) 



0333 
0333 
0338 
0339 
033A 
033D 
0341 
0344 
0345 
0346 
0349 



C6 06 0048 R 50 



E8 06B4 R 
26: 8A 47 OE 
A2 0043 R 



FMT_TRK PROC 
MOV 
PUSH 
PUSH 
CALL 
MOV 
MOV 
POP 
POP 
JMP 

FMT_TRK ENDP 

PAGE 



GET_VEC 

AL,ES:[BX][14] 

CMD_BL0CK+1,AL 



FORMAT TRACK (AH = 



GET DISK PARMS ADDRESS 

GET SECTORS/TRACK 

SET SECTOR COUNT IN COMMAND 



GO EXECUTE THE COMMAND 



READ DASD TYPE (AH = 



0349 
0349 
0349 



READ_DASD_TYPE LABEL 
READ_D_T PROC 
PUSH DS 



5-108 Disk 



OSilA 


06 








PUSH 


ES 




03'4B 


53 








PUSH 


BX 




03'»C 


B8 R 








MOV 


AX, DATA 


ESTABLISH ADDRESSING 


031+F 


8F 08 








MOV 
ASSUME 


DS,AX 
DS:DATA 




0351 


C6 06 0074 


R 00 






MOV 


DISK STATUS1,0 




0356 


8A IE 0075 


R 






MOV 


BL,HF NUM 


GET NUMBER OF DRIVES 


035A 


80 E2 7F 








AND 


DL,7FH 


GET DRIVE NUMBER 


035D 


3A DA 








CMP 


BL,DL 




035F 


76 22 








JBE 


RDT NOT PRESENT 


RETURN DRIVE NOT PRESENT 


0361 


E8 06B4 R 








CALL 


GET VEC 


GET DISK PARM ADDRESS 


036U 


26: 8A 47 02 






MOV 


AL,ES:[BX][2] 


HEADS 


0368 


26: 8A 4F OE 






MOV 


CL,ES:[BX][14] 




036C 


F6 E9 








IMUL 


CL 


* NUMBER OF SECTORS 


036C 


26: 8B OF 








MOV 


CX,ES:[BX] 


MAX NUMBER OF CYLINDERS 


0371 


49 








DEC 


CX 


LEAVE ONE FOR DIAGNOSTIC 


0372 


F7 E9 








IMUL 


CX 


NUMBER OF SECTORS 


037't 


8B GA 








MOV 


CX,DX 


HIGH ORDER HALF 


0376 


8B DO 








MOV 


OX, AX 


LOW ORDER HALF 


0378 


2B CO 








SUB 


AX, AX 




037A 


B4 03 








MOV 


AH,03H 


INDICATE FIXED DISK 


037C 


5B 




RDT2: 


POP 


BX 


RESTORE REGS 


0370 


07 








POP 


ES 




037E 


1 F 








POP 


DS 




037F 


F8 








CLC 




CLEAR CARRY 


0380 


CA 0002 








RET 


2 




0383 






RDT 


_NOT 


PRESENT: 




0383 


2B CO 








SUB 


AX, AX 


DRIVE NOT PRESENT RETURN 


0385 


8B C8 








MOV 


CX, AX 


ZERO BLOCK COUNT 


0387 


8B DO 








MOV 


DX,AX 




0389 


EB F1 








JMP 


RDT2 




038B 






READ D 
PAGE 


T 


ENDP 










GET PARAMETERS (AH = 8) 




038B 


GET FARM N 


LABEL NEAR 




038B 






GET 


_PARM 


PROG FAR 


GET DRIVE PARAMETERS 


038B 


IE 








PUSH 


DS 


SAVE REGISTERS 


038C 


06 








PUSH 


ES 




038D 


53 








PUSH 
ASSUME 


BX 
DS:ABSO 




038E 


2B CO 








SUB 


AX, AX 


ESTABLISH ADDRESSING 


0390 


8E D8 








MOV 


DS,AX 




0392 


F6 C2 01 








TEST 


DL, 1 


CHECK FOR DRIVE 1 


0395 


74 06 








JZ 


GO 




0397 


C4 IE 0118 


R 






LES 


BX, HF1 TBL VEC 




039B 


EB 04 








JMP 


SHORT G1 




039D 


C4 IE 0104 


R 


GO 




LES 
ASSUME 


BX,HF TBL VEC 
DS:DATA 




03A1 


B8 R 




G1 




MOV 


AX, DATA 




03A4 


8E D8 








MOV 


DS,AX 


ESTABLISH SEGMENT 


03A6 


80 EA 00 








SUB 


DL,80H 




03A9 


80 FA 02 








CMP 


DL,MAX FILE 


TEST WITHIN RANGE 


03AC 


73 2C 








JAE 


G4 




03AE 


C6 06 0074 


R 00 






MOV 


DISK STATUS1,0 




03B3 


26: OB 07 








MOV 


AX, ES: [BX] 


MAX NUMBER OF CYLINDERS 


03B6 


20 0002 








SUB 


AX, 2 


ADJUST FOR O-N 


03B9 


8A E8 








MOV 


CH,AL 




03BB 


25 0300 








AND 


AX,0300H 


HIGH TWO BITS OF CYL 


03BE 


01 E8 








SHR 


AX, 1 




03 CO 


D1 E8 








SHR 


AX, 1 




03C2 


26: OA 47 OE 






OR 


AL, ES: IBX][ 14] 


SECTORS 


0306 


8A C8 








MOV 


CL,AL 




03C8 


26: 8A 77 02 






MOV 


DH, ES: [BX]121 


HEADS 


03CC 


F£ CE 








DEC 


DH 


O-N RANGE 


03CE 


8A 16 0075 


R 






MOV 


DL,HF NUM 


DRIVE COUNT 


03D2 


2B CO 








SUB 


AX, AX 




03D(t 






G5 










03Dt< 


5B 








POP 


BX 


RESTORE REGISTERS 


03D5 


07 








POP 


ES 




03D6 


IF 








POP 


DS 




03D7 


CA 0002 








RET 


2 




03DA 






G4 










03DA 


C6 06 0074 


R 07 






MOV 


DISK STATUS1, INIT FAIL 


; OPERATION FAILED 


03DF 


B4 07 








MOV 


AH, INIT FAIL 




03E1 


2A CO 








SUB 


AL,AL 




03 E3 


2B 02 








SUB 


DX,DX 




03E5 


2B C9 








SUB 


CX,CX 




03E7 


F9 








STC 




SET ERROR FL^G 


03E8 


EB EA 








JMP 


G5 




03EA 






GET 


_PARM 


ENDP 














PAGE 










INIT 


lALIZE DRIVE 




03EA 


IN 


T_DRV 


PROC NEAR 




03EA 


C6 06 0048 


R 91 






MOV 


CMD BL0CK+6,SET PARM CMD 




03EF 


E8 06B4 R 








CALL 


GFT VEC 


ES:BX -> PARM BLOCK 


03 F2 


26: 8A 47 02 






MOV 


AL,ES:[BX][2] 


GET NUMBER OF HEADS 


03 F6 


FE C8 








DEC 


AL 


CONVERT TO 0- 1 NDEX 


03F8 


8A 26 0047 


R 






MOV 


AH, CMD BLOCK+5 


GET SDH REGISTER 


03 FC 


80 E4 FO 








AND 


AH,OFOH 


CHANGE HEAD NUMBER 


03FF 


OA EO 








OR 


AH,AL 


TO MAX HEAD 


OUOI 


88 26 0047 


R 






MOV 


CMD BLOCK+5, AH 




0M05 


26: 8A 47 OE 






MOV 


AL,ES:[BX][14] 


MAX SECTOR NUMBER 


0U09 


A2 0043 R 








MOV 


CMD BL0CK+1,AL 




OUOC 


28 CO 








SUB 


AX, AX 




OUOE 


A2 0045 R 








MOV 


CMD BL0CK+3,AL 


ZERO FLAGS 


0411 


E8 0544 R 








CALL 


COMMAND 


TELL CONTROLLER 


o^^^ 


75 08 








JNZ 


INIT EXIT 


CONTROLLER BUSY ERROR 


0416 


E8 05DF R 








CALL 


NOT BUSY 


WAIT FOR IT TO BE DONE 


0419 


75 03 








JNZ 


INIT EXIT 


TIME OUT 


041B 


E8 061 E R 








CALL 


CHECK_STATUS 




0'41E 






IN 


T_EX 


IT: 






041 E 


C3 








RET 






041 F 






IN 


T_DRV 


ENDP 










READ LONG (AH = OAH ) 




041F 


RD_ 


LONG 




PROC NEAR 




041 F 


C6 06 0048 


R 22 






MOV 


CMD BL0CK+6,READ CMD OR 


:CC_MODE 


0424 


E9 04BB R 








JMP 


COMMAND 1 




0427 






RD_ 


LONG 




ENDP 










WRITE LONG (AH = OBH ) 




0427 


WR_ 


LONG 




PROG NEAR 




0427 


C6 06 0048 


R 32 






MOV 


CMD BLOGK+6, WRITE CMD OR 


ECC_MO0E 


042C 


E9 04FB R 








JMP 


COMMANDO 




042F 






WR_ 


LONG 




ENDP 





Disk 5-109 



(AH = OCH) 



042 F 


C6 06 0048 


R 70 


0'13U 


E8 0544 R 




0437 


75 14 




0439 


E8 05A5 R 




043C 


75 OF 




043E 


E8 061 E R 




0441 


80 3E 0074 


R 40 


0446 


75 05 




0448 


C6 06 0074 


R 00 


0440 






044D 


C3 




044E 







MOV 

CALL 

JNZ 

CALL 

JNZ 

CALL 

CMP 

JNE 

MOV 

OS_EXIT: 

RET 

DISK_SEEK 



PROC NEAR 

CMD_BL0CK+6, SEEK_CMD 

COMMAND 

DS_EXIT 

WAIT 

DS_EXIT 

CHECK_STATUS 

D I SK_STATUS1 , BAD_SEEK 

DS_EXIT 

DISK_STATUS1,0 



; CONTROLLER BUSY ERROR 
; TIME OUT ON SEEK 



TEST DISK READY (AH = 



044 E 




044E 


E8 05DF R 


0451 


75 n 


0453 


AO 0047 R 


0456 


BA 01 F6 


0459 


EE 


045A 


E8 0630 R 


0450 


75 05 


045F 


C6 06 0074 R 00 


0464 


C3 


0465 





JNZ 
MOV 
MOV 
OUT 
CALL 
JNZ 
MOV 
TR_EX: RET 
TST_RDY ENDP 



NEAR 

NOT_BUSY 

TR_EX 

AL,CMD_BL0CK+5 

DX, HF_P0RT+6 

DX,AL 

CHECK_ST 

TR_EX 

DISK_STATUS1,0 



WAIT FOR CONTROLLER 
SELECT DRIVE 

CHECK STATUS ONLY 

WIPE OUT DATA CORRECTED ERROR 



RECALIBRATE (AH = OIIH) 



0465 










0465 


C6 


06 0048 


R 


10 


046A 


L« 


0544 R 






046D 


15 


14 






046F 


FR 


05A5 R 






0472 


75 


OF 






0474 


F« 


061 E R 






0477 


80 


3E 0074 


R 


40 


047C 


75 


05 






047 E 


C6 


06 0074 


R 


no 


0483 










0483 


80 


3E 0074 


R 


00 


0488 


C3 








0489 











HDISK_RECAL 
MOV 
CALL 
JNZ 
CALL 
JNZ 
CALL 
CMP 
JNE 
MOV 

RECAL_EXIT: 
CMP 
RET 

HDISK_RECAL 



PROC NEAR 

CMD_BL0CK+6, RECAL_CMD 

COMMAND 

RECAL_EXIT 

WAIT 

RECAL_EXIT 

CHECK_STATUS 

D I SK_STATUS1 , BAO_SEEK 

RECAL_EXIT 

DISK_STATUS1,0 

DISK_STATUS1,0 



START THE OPERATION 

ERROR 

WAIT FOR COMPLETION 

TIME OUT 



CONTROLLER DIAGNOSTIC (AH = 



0489 






0489 


t4 


A1 


048B 


24 


BF 


0480 


L6 


A1 


048 F 


L4 


21 


0491 


?4 


FB 


0493 


F6 


21 


0495 


!-« 


05DF R 


0498 


75 


1A 


049A 


BA 


01 F7 


049D 


BO 


90 


049F 


FF 




04A0 


F« 


05DF R 


04A3 


B4 


80 


0'4A5 


/5 


OF 


04A7 


BA 


01 F1 


04AA 


FC 




04AB 


A? 


008D R 


04AE 


B4 


00 


04B0 


30 


01 


04B2 


74 


02 


0484 


B4 


20 


04B6 






04B6 


88 


26 0074 R 


04BA 


03 




04BB 







CTLR DIAGNOSTIC 


PROC NEAR 


IN 


AL, INT CTL PORT+1 


AND 


AL,OBFH 


OUT 


INT CTL PORT+1, AL 


IN 


AL, INT1 CTL PORT+1 


AND 


AL.OFBH 


OUT 


INT1 CTL PORT+1. AL 


CALL 


NOT BUSY 


JNZ 


CD ERR 


MOV 


DX,HF PORT+7 


MOV 


AL,DIAG CMD 


OUT 


DX,AL 


CALL 


NOT BUSY 


MOV 


AH, TIME OUT 


JNZ 


CD EXIT 


MOV 


DX,HF PORT+1 


IN 


AL,DX 


MOV 


HF ERROR, AL 


MOV 


AH,0 


CMP 


AL, 1 


JE 


SHORT CD EXIT 


CD ERR: MOV 


AH, BAD CNTLR 


CD EXIT: 




MOV 


DISK STATUS1,AH 


RET 




CTLR DIAGNOSTIC 


ENDP 



START DIAGNOSE 

WAIT FOR IT TO COMPLETE 



SAVE IT 

CHECK FOR ALL OK 



COMMAND I 

REPEATEDLY INPUTS DATA TIL NSECTOR 
RETURNS ZERO 



04BB 






COMMAND 1 : 




04BB 


FR 


068F R 




CALL 


CHECK DMA 


04BE 


7? 


3A 




JC 


CMD ABORT 


04C0 


«B 


FB 




MOV 


Dl ,BX 


04C2 


FB 


0544 R 




CALL 


COMMAND 


04C5 


75 


33 




JNZ 


CMD ABORT 


o^c^ 






CMD 


1 1 : 




04C7 


L8 


05A5 R 




CALL 


WA 1 1 


04CA 


75 


2E 




JNZ 


TM OUT 


04CC 


B9 


0100 




MOV 


CX,256D 


04CF 


BA 


01 FO 




MOV 


DX,HF PORT 


04D2 


FC 






CLD 












REP INSW 


04D3 


F3 


6D 






OB 0F3H,06DH 


04D5 


F6 


06 0048 R 02 




TEST 


CMD BL0CK+6.ECC MODE 


04DA 


74 


12 




JZ 


CMD 13 


04DC 


F8 


0608 R 




CALL 


WAIT DRQ 


04DF 


7? 


19 




JC 


TM OUT 


04E1 


BA 


01 FO 




MOV 


DX, HF PORT 


04E4 


B9 


0004 




MOV 


CX,4 


04E7 


FC 




CMD 


12: IN 


AL,DX 


04E8 


26 


88 05 




MOV 


ES:BYTE PTR [Dl ],AL 


04 EB 


47 






INC 


Dl 


04EC 


F? 


F9 




LOOP 


CMD 12 


04EE 


FR 


061E R 


CMD 


13: CALL 


CHECK STATUS 


04F1 


75 


07 




JNZ 


CMD ABORT 


04 F3 


F6 


06 008C R 80 




TEST 


HF STATUS, ST BUSY 


04 F8 


75 


CD 




JNZ 


SHORT CMD 1 1 


04FA 






CMD 


ABORT: 




04 FA 






TM OUT: 




04FA 


C3 






RET 





; CHECK 64K BOUNDARY ERROR 
; OUTPUT COMMAND 



; WAIT FOR DATA REQUEST INT 

; TIME OUT 

; SECTOR SIZE IN WORDS 



; GET THE SECTOR 

; CHECK FOR NORMAL INPUT 
; WAIT FOR DATA REQUEST 

; GET ECC BYTES 

; GO SLOW FOR BOARD 



COMMANDO 

REPEATEDLY OUTPUTS DATA TIL NSECTOR 
RETURNS ZERO 



5-110 Disk 



OtFB 








COMMANC 


0: 




O'lFB 


E8 068F 


R 






CALL 


CHECK DMA 


OUFE 


72 FA 








JC 


CMD ABORT 


0500 


8B F3 






CMD_0F: 


MOV 


SI.BX 


0502 


E8 05iH( 


R 






CALL 


COMMAND 


0505 


75 F3 








JNZ 


CMD ABORT 


0507 


E8 0608 


R 






CALL 


WAIT DRQ 


050A 


72 EE 








JC 


TM OUT 


050C 


IE 






CMD_01 : 


PUSH 


DS 


050D 


06 








PUSH 


ES 


050E 


1 F 








POP 


DS 


050F 


B9 0100 








MOV 


CX,256D 


0512 


BA 01 FO 








MOV 


DX,HF_PORT 


0515 


FC 








CLD 














REP_OUTSW 


0516 


F3 6F 










DB OF3H,06FH 


0518 


IF 








POP 


DS 


0519 


F6 06 0048 R 02 




TEST 


CMD BL0CK+6,ECC MODE 


051E 


74 12 








JZ 


CMD 03 


0520 


E8 0608 


R 






CALL 


WAIT DRQ 


0523 


72 05 








JC 


TM OUT 


0525 


BA 01 FO 








MOV 


DX.HF PORT 


0528 


B9 0004 








MOV 


CX,4 


052B 


26: 8A 04 




CMD_02: 


MOV 


AL,ES:BYTE PTR [SI ] 


052E 


EE 








OUT 


DX,AL 


052F 


46 








INC 


SI 


0530 


E2 F9 








LOOP 


CMD_02 


0532 








CMD_03 : 






0532 


E8 05A5 


R 






CALL 


WAIT 


0535 


75 C3 








JNZ 


TM OUT 


0537 


E8 061 E 


R 






CALL 


CHECK STATUS 


053A 


75 BE 








JNZ 


CMD ABORT 


053C 


F6 06 008C R 08 




TEST 


HF STATUS, ST DRQ 


05i»1 


75 C9 








JNZ 


SHORT CMD 01 


0543 


C3 








RET 





CHECK 64K BOUNDARY ERROR 



OUTPUT COMMAND 



MOVE ES TO DS 

PUT THE DATA OUT TO THE CARD 



; WAIT FOR DATA REQUEST 



OUTPUT THE ECC BYTES 



; CHECK FOR MORE 



COMMAND 

THIS ROUTINE OUTPUTS THE COMMAND BLOCK 
OUTPUT 

BL = STATUS 

BH = ERROR REGISTER 



0544 








0544 


53 






0545 


B9 


0600 




0548 








0548 


51 






0549 


E8 


044E R 




054C 


59 






054D 


74 


OB 




054F 


80 


3E 0074 


R 80 


0554 


74 


43 




0556 


E2 


FO 




0558 


E8 


44 




055A 








055A 


5B 






055B 


57 






0550 


06 


06 008E 


R 00 


0561 


E4 


A1 




0563 


24 


BF 




0505 


L6 


AT 




0567 


E4 


21 




0569 


24 


FB 




056B 


E6 


21 




056D 


BF 


0042 R 




0570 


BA 


01F1 




0573 


F6 


06 0076 


R CO 


0578 


74 


12 




057A 


AO 


0048 R 




057D 


24 


FO 




057F 


3C 


20 




0581 


72 


09 




0583 


3C 


'10 




0585 


77 


05 




0587 


80 


OE 0048 


R 01 


058C 








058C 


8A 


05 




058E 


EE 






058F 


47 






0590 


42 






0591 


81 


FA 01 F8 




0595 


75 


F5 




0597 


5F 






0598 


C3 






0599 








0599 


C6 


06 0074 


R 20 


059E 








059E 


5B 






059F 


80 


3E 0074 


R 00 


05A4 


03 






05A5 









COMMAND PROC 
PUSH 
MOV 

COMMAND! : 

PUSH 

CALL 

POP 

JZ 

CMP 

JZ 

LOOP 

JMP 

C0MMAND2: 

POP 
PUSH 
MOV 
IN 



AND 

OUT 

MOV 

MOV 

TEST 

JZ 

MOV 

AND 

CMP 



C0MMAND3: 

MOV 
OUT 
INC 
INC 
CMP 
JNZ 
POP 
RET 

CMD_TlMEOUT: 
MOV 

C0MMAND4: 

POP 
CMP 
RET 

COMMAND ENDP 



TST_RDY 

CX 

C0MMAND2 

D I SK_STATUS1 , T I ME_OUT 

CMD_TIMEOUT 

COMMAND! 

SHORT C0MMAND4 

BX 

Dl 

HF_INT_FLAG,0 

AL. INT_CTL_P0RT+1 

AL,08FH 

INT_CTL_PORT+1,AL 
AL, INT1_CTL_P0RT+1 
AL,OFBH 

INT1_CTL_P0RT+1,AL 

Dl , OFFSET CMD_BLOCK 

DX,HF_P0RT+1 

CONTROL_BYTE,0C0H 

COMMANDS 

AL,CM0_BL0CK+6 

AL.OFOH 

AL,20H 

COMMAND3 

AL,40H 

C0MMAND3 

CMD_BL0CK+6, NO_RETR I ES 



D I SK_STATUS1 , BAD_CNTLR 

BX 
DISK_STATUS1,0 



** 10 DELAY N07 REQUIRED ** 

RESET INTERRUPT FLAG 

TURN ON SECOND INTERRUPT CHIP 



INDEX THE COMMAND TABLE 

DISK ADDRESS 

CHECK FOR RETRY SUPPRESSION 

YES-GET OP CODE 

GET RID OF MODI F I ERS 

20H-40H IS READ, WRITE, VERIFY 



VALID OP FOR RETRY SUPPRESS 

GET THE COMMAND STRING 

GIVE IT TO CONTROLLER 

NEXT BYTE 

NEXT DISK REGISTER 

ALL DONE? 

NO--GO DO NEXT ONE 



ZERO FLAG I S SET 



SET CONDITION CODE FOR CALLER 



WAIT FOR INTERRUPT 



05A5 












05A5 


FB 










05A6 


2B 


09 








05A8 


F8 










05A9 


BH 


9000 






05AC 


CD 


15 








05AE 


1? 


28 








05BO 


\b 


06 


008E 


K 


80 


05B5 


/5 


n 








05B7 


B3 


20 








05B9 


F6 


06 


008E 


R 


RO 


05EE 


LI 


F9 








05C0 


/5 


06 








05C2 


it 


CB 








05C4 


/5 


Ki 








05C6 


FB 


10 








05C8 


C6 


06 


0074 


R 


00 


05CD 


C6 


06 


008E 


R 


on 


05D2 


80 


3F 


0074 


R 


on 


05D7 


03 










05D8 


C6 


06 


0074 


R 


80 


05DD 


FB 


F3 








05DF 













SUB 


OX,CX 


CLC 




MOV 


AX,9000H 


INT 


15H 


JO 


WT3 


TEST 


HF INT FLAG, BOH 


JNZ 


WT2 


MOV 


BL, DELAY_1 


WAIT 


LOOP 


TEST 


HF INT FLAG,80H 


LOOPZ 


WT1 


JNZ 


WT2 


DEC 


BL 


JNZ 


WT1 


JMP 


SHORT WT3 


MOV 


DISK STATUS!, 


MOV 


HF INT FLAG,0 


CMP 


DISK STATUS1,0 


RET 




MOV 


DISK STATUS!, TIME OUT 


JMP 


WTX 


ENDP 





DEVICE WAIT INTERRUPT 

DEVICE TIMED OUT 
TEST FOR INTERRUI 

SET DELAY COUNT 

TEST FOR INTERRUPT 
INTERRUPT--LETS GO 
KEEP TRYING FOR A WHILE 

SET CONDITION CODE FOR CALLER 
REPORT TIME OUT ERROR 



Disk 5-111 



WAIT FOR CONTROLLER NOT BUSY 



050F 








05DF 


KK 






05E0 


•>3 






05E1 


B3 


20 




05E3 


2B 


C9 




05E5 


BA 


01F7 




05E8 


FC 






05E9 


A8 


80 




05EB 


f-0 


FB 




05ED 


7U 


06 




05EF 


hh 


CB 




05F1 


?■> 


F5 




05F3 


tB 


OC 




05F5 


C6 


06 0074 


R 00 


05 FA 


•>B 






05FB 


80 


3E 007U 


R 00 


0600 


C3 






0601 


06 


06 0074 


R 80 


0606 


FB 


F2 




0608 









ST I 

PUSH 

MOV 

SUB 

MOV 

IN 



DEC 
JNZ 
JMP 
MOV 
POP 
CMP 
RET 
MOV 
JMP 



BX 

BL, 0ELAY_1 

CX,CX 

DX,HF_P0RT+7 

AL,DX 

AL, ST_BUSY 

NB1 

NB2 

BL 

NB1 

SHORT NB3 

DISK_STATUS1,0 

BX 

D1SK_STATUS1,0 

D I SK_STATUS1 , T I ME_OUT 

NBX 

ENDP 



MAKE SURE INTERRUPTS ARE ON 

SET INITIAL DELAY BEFORE TEST 
CHECK STATUS 

NOT BUSY--LETS GO 

KEEP TRYING FOR A WHILE 

SET CONDITION CODE FOR CALLER 
REPORT TIME OUT ERROR 



WAIT FOR DATA REQUEST 



0608 




0608 


B9 0100 


060B 


BA 01F7 


060 E 


EC 


060F 


A8 08 


0611 


75 09 


0613 


E2 F9 


0615 


C6 06 0074 R 80 


061A 


F9 


061B 


C3 


061C 


F8 


0610 


C3 


061E 





IN 

TEST 

JNZ 

LOOP 

MOV 

STC 

RET 

CLC 

RET 



PROC NEAR 

CX, DELAY_3 

DX.HF_P0RT+7 

AL,DX 

AL, ST_DRQ 

WQ_OK 

WQ_1 

D I SK_STATUS1 , T 1 ME_OUT 



CHECK HARD FILE STATUS 



061 E 






061E 


E8 


0630 R 


0621 


/5 


07 


0623 


Aft 


01 


0625 


74 


03 


0627 


t8 


0664 R 


062A 






062A 


«0 


3E 0074 R 


062F 


03 




0630 






0630 






0630 


BA 


01 F7 


0633 


FC 




0634 


A2 


008C R 


0637 


B4 


00 


0639 


Aft 


80 


063B 


75 


1A 


063D 


R4 


CC 


063F 


Aft 


20 


0641 


75 


14 


0643 


B4 


AA 


0645 


Aft 


40 


0647 


74 


OE 


0649 


B4 


40 


064B 


Aft 


10 


064D 


74 


08 


064F 


B4 


1 1 


0651 


Aft 


04 


0653 


75 


02 


0655 


B4 


00 


0657 






0657 


88 


26 0074 R 


065B 


fiO 


FC 1 1 


065E 


74 


03 


0660 


80 


FC 00 


0663 






0663 


C3 




0664 






0664 






0664 


BA 


01F1 


0667 


EC 




0668 


A2 


008D R 


066B 


53 




066C 


B9 


0008 


066F 


DO 


EO 


0671 


1? 


02 


0673 


F? 


FA 


0675 


BB 


0686 R 


0678 


03 


09 


067A 


2f 


8A 27 


067D 


88 


26 0074 R 


0681 


5B 




0682 


HO 


FC 00 


0685 


C3 




0686 


FO 




0687 


0? 


40 01 BB 


068B 


04 


BB 10 OA 



CHECK_STATUS 
CALL 
JNZ 
TEST 
JZ 
CALL 

CHECK_S1: 

CMP 
RET 

CHECK_STATUS 



PROC NEAR 

CHECK_ST 

CHECK_S1 

AL,ST_ERROR 

CHECK_S1 

CHECK_ER 

DISK_STATUS1,0 



CHECK HARD FILE STATUS BYTE 



MOV 
IN 
MOV 
MOV 
TEST 
JNZ 
MOV 
TEST 
JNZ 
MOV 
TEST 
JZ 



JZ 

MOV 

TEST 

JNZ 

MOV 

CKST_EXIT: 
MOV 
CMP 
JZ 
CMP 

CKST_EX1 : 

RET 

CHECK_ST 



PROC NEAR 

DX,HF_P0RT+7 

AL,DX 

HF_STATUS,AL 

AH,0 

AL,ST_BUSY 

CKST_EXIT 

AH,WRITE_FAULT 

AL,ST_WRT_FLT 

CKST_EXIT 

AH.N0T_RDY 

AL,ST_READY 

CKST_EXIT 

AH,BAD_SEEK 

AL,ST_SEEK_COMPL 

CKST_EXIT 

AH,DATA_CORRECTED 

AL, ST_C0RRCTD 

CKST_EXIT 

AH,0 

DISK_STATUS1,AH 
AH, DATA_CORRECTED 
CKST_EX1 
AH,0 



CHECK HARD FILE ERROR REGISTER 



PROC NEAR 

DX,HF_P0RT+1 

AL,DX 

HF_ERROR,AL 

BX 

CX,8 

AL, 1 

CK2 

CK1 

BX, OFFSET ERR_TBL 

BX,CX 

AH, BYTE PTR CS:(BX] 

DISK_STATUS1,AH 

BX 



CK1 : 



CK2: 



MOV 

PUSH 

MOV 

SHL 

JC 

LOOP 

MOV 

ADD 

MOV 

CKEX: MOV 
POP 
CMP 
RET 

ERR_TBL DB 
DB 
DB 



CHECK THE STATUS BYTE 

AN ERROR WAS FOUND 

WERE THERE ANY OTHER ERRORS 

NO ERROR REPORTED 

ERROR REPORTED 

SET STATUS FOR CALLER 



GET THE STATUS 



; CHECK FOR WRITE FAULT 

; CHECK FOR NOT READY 

; CHECK FOR SEEK NOT COMPLETE 

; CHECK FOR CORRECTED ECC 



; GET THE ERROR REG 



TEST ALL 8 BITS 

MOVE NEXT ERROR B I T TO CARRY 

FOUND THE ERROR 

KEEP TRYING 

COMPUTE ADDRESS OF 

ERROR CODE 

GET ERROR CODE 

SAVE ERROR CODE 



AH,0 

NO_ERR 

BAD_ADDR_MARK, BAD_SEEK, BAD_CMD, UNDEF_ERR 

RECORD_NOT_ FND, UNDEF_ERR, BAD_ECC, BAD_SECTOR 



068F 

068F 50 

0690 B8 8000 

0693 F6 06 0048 R 02 



CHECK_DMA 
-CHECK ES:BX AND # SECTORS TO MAKE SURE THAT IT WIL 

FIT WITHOUT SEGMENT OVERFLOW. 
-ES:BX HAS BEEN REVISED TO THE FORMAT SSSS:OOOX 
-OK IF # SECTORS < BOH (7FH IF LONG READ OR WRITE) 
-OK IF # SECTORS = 80H (7FH) AND BX <= OOH ( 04H ) 
-ERROR OTHERWISE 



CHECK_DMA PROC 
PUSH AX 
MOV AX.BOOOH 



NEAR 



CMD_BL0CK+6, ECC_MODE 



SAVE REGS 

AH = MAX # SECTORS 

AL = MAX OFFSET 



5-112 Disk 



0698 


7't 


03 


069A 


B8 


7F0'4 


069D 


3A 


26 0043 


06A1 


7? 


06 


06A3 


12 


07 


06A5 


3A 


C3 


06A7 


72 


03 


06A9 


h« 




06AA 


^8 




06AB 


C3 




06AC 


F9 




06AD 


C6 


06 0074 


06B2 


S« 




06B3 


03 




06BU 







CMP 
JB 

CKDOK: CLC 
POP 
RFT 

CKDERR: STC 
MOV 
POP 
RET 

CHECK_DMA 



CKD1 

AX,7F0UH 

AH,CMD_BL0CK+1 

CKDOK 

CKDERR 

AL,BL 

CKDERR 

AX 



ECC IS l| MORE BYTES 

NUMBER OF SECTORS 

IT WILL FIT 

TOO MANY 

CHECK OFFSET ON MAX SECTORS 

ERROR 

CLEAR CARRY 



D I SK_STATUS1 , DMA_BOUNDARY 







\ SET UP ES:BX- 


>DISK PARMS : 


oeBu 


GET_VEC 


PROC 


NEAR 


06BU 


2B CO 




SUB 


AX, AX 


06B6 


8E CO 




MOV 
ASSUME 


ES.AX 
ES:ABSO 


06B8 


F6 C2 01 




TEST 


DL,1 


06BB 


74 07 




JZ 


GV 


06BD 


26: CU IE 0118 R 




LES 


BX,HF1 TBL VEC 


06C2 


EB 05 




JMP 


SHORT GV_EXIT 


06CU 




GV_0: 






0604 


26: CU IE 0104 R 




LES 


BX,HF_TBL_VEC 


06C9 




GV_EXIT 






06C9 


C3 




'ret 




06CA 




GET_VEC 


ENDP 






'; HARD 


DISK INTERRUPT ROUTINE : 



06CA 
06CA 
06CB 
06CC 
06CF 
0601 
06D6 
06D8 
06DA 
06DC 
06DE 
06DF 
06E0 
06E3 
06E5 
06 E6 
06 E7 



IE 

B8 R 

8E D8 

C6 06 008E R FF 

BO 20 

E6 AG 

EB 00 

E6 20 



PROC 

PUSH 

PUSH 

MOV 

MOV 

MOV 

MOV 

OUT 

JMP 

OUT 

POP 

ST I 

MOV 

INT 

POP 

I RET 

ENDP 



DS 

AX, DATA 

DS,AX 

HF_INT_FLAG,OFFH 

AL, EOl 

INT CTL PORT,AL 

$+2~ ~ 

INT1_CTL_P0RT,AL 

DS 



GET DISK PARAMETER ADDRESS 



ES:BX -> DRIVE PARAMETERS 
ES;BX -> DRIVE PARAMETERS 



ALL DONE 

NON-SPECIFIC END OF IN 

FOR CONTROLLER #2 

WAIT 

FOR CONTROLLER #1 

RE-ENABLE INTERRUPTS 
DEVICE POST 
INTERRUPT 

RETURN FROM INTERRUPT 



06E7 31 2F 31 31 2F 38 



END_ADDRESS 

CODE ENDS 

END 



'1/11/84' 
LABEL BYTE 



RELEASE MARKER 



Disk 5-113 



5-114 Disk 



PUBLIC 


KEYBOARD 10 1 


PUBLIC 


KB INT 1 


PUBLIC 


K16 


CODE 


SEGMENT BYTE PUBLIC 


EXTRN 


DOS: NEAR 


CXTRN 


START 1:NEAR 


EXTRN 


K6:BYTE 


EXTRN 


K6L:ABS 


EXTRN 


K7:BYTE 


EXTRN 


K8:BYTE 


EXTRN 


K9:BYTE 


EXTRN 


K10:BYTE 


EXTRN 


KIT: BYTE 


EXTRN 


K12:BYTE 


EXTRN 


K13:BYTE 


EXTRN 


K14:BYTE 


EXTRN 


K15:BYTE 



0000 








0000 


FB 






0001 


IE 






0002 


53 






0003 


E8 


0000 E 




0006 


OA 


E4 




0008 


74 


OB 




OOOA 


FE 


CC 




OOOC 


74 


45 




OOOE 


FE 


CC 




0010 


74 


67 




0012 


5B 






0013 


IF 






001U 


CF 






0015 


8B 


IE 001A 


R 


0019 


3B 


IE 001C 


R 


001 D 


75 


07 




001 F 


B8 


9002 




0022 


CD 


15 




0024 








0024 


FB 






0025 


90 






0026 


FA 






0027 


8B 


IE 001A 


R 


002B 


3B 


fE 001C 


R 


002F 


53 






0030 


90 






0031 


E8 


048A R 




003U 


8A 


IE 0097 


R 


0038 


32 


D8 




003A 


80 


E3 07 




003D 


74 


04 




003F 


E8 


044C R 




0OU2 


FA 






00U3 


9D 






OOUiA 


5B 






0045 


74 


DD 




0047 


8B 


07 




0049 


E8 


007 F R 




004C 


89 


IE 001A 


R 


0050 


5B 






0051 


IF 






0052 


CF 






0053 








0053 


FA 






0054 


8B 


IE 001A 


R 


0058 


3B 


IE 001C 


R 


0050 


8B 


07 




005E 


90 






005F 


50 






0060 


E8 


048A R 




0063 


8A 


IE 0097 


R 


0067 


32 


08 




0069 


80 


E3 07 




006C 


74 


03 




006E 


E8 


044C R 




0071 


58 






0072 


9D 






0073 


FB 






0074 


5B 






0075 


IF 






0076 


CA 


0002 




0079 








0079 


AO 


0017 R 




007C 


5B 






007D 


IF 






007E 


CF 






007F 









(AH)=0 READ THE NEXT ASCII CHARACTER STRUCK FROM THE KEYBOARD 

RETURN THE RESULT IN (AL), SCAN CODE IN (AH) 
(AH)=1 SET THE Z FLAG TO INDICATE IF AN ASCII CHARACTER IS AVAILABLE 

TO BE READ. 

(ZF)=1 -- NO CODE AVAILABLE 

(ZF):=0 -- CODE IS AVAILABLE 

IF ZF = 0, THE NEXT CHARACTER IN THE BUFFER TO BE READ IS 

IN AX, AND THE ENTRY REMAINS IN THE BUFFER 
(AH)=2 RETURN THE CURRENT SHIFT STATUS IN AL REGISTER 

THE BIT SETTINGS FOR THIS CODE ARE INDICATED IN THE 

THE EQUATES FOR KB_FLAG 



ASSUME CS: CODE, DS: DATA 



KEYB0ARD_I0_1 



PUSH 


DS 


PUSH 


BX 


CALL 


DOS 


OR 


AH, AH 





POP 


BX 




POP 


DS 




IRET 




. 


-- READ THE KEY TO FIGURE 


K1B: 


MOV 


BX, BUFFER HEAD 




CMP 


BX, BUFFER TAIL 




JNE 


K1C 




MOV 


AX,09002H 




INT 


15H 


K1 : 


STI 
NOP 




K1C: 


CLI 






MOV 


BX. BUFFER HEAD 




CMP 


BX, BUFFER TAI L 




PUSH 


BX 




PUSHF 






CALL 


MAKE LED 




MOV 


BL, KB FLAG 2 




XOR 


BL,AL 




AND 


BL,07H 




JZ 


K1A 




CALL 


SND_LED1 




CLI 




K1A: 


POPF 






POP 


BX 




J7 


K1 




MOV 


AX, [BX] 




CALL 


K4 




MOV 


BUFFER_HEAD,BX 


' 


POP 


BX 




POP 


DS 




IRET 






-- ASCI 1 


STATUS 


K2: 


CLI 






MOV 


BX, BUFFER HEAD 




CMP 


BX, BUFFER TAIL 




MOV 


AX, [BX] 




PUSHF 






PUSH 


AX 




CALL 


MAKE LED 




MOV 


BL,KB FLAG 2 




XOR 


BL,AL 




AND 


BL,07H 




JZ 


SK2 




CALL 


SND LED1 


SK2: 


POP 
POPF 
STI 


AX 




POP 


BX 




POP 


DS 




RET 


2 




-- SHIFT 


STATUS 


K3: 








MOV 


AL,KB FLAG 




POP 


BX 




POP 


DS 




IRET 




KEYBOARD_ 1 0_1 


ENDP 



;>» ENTRY POINT FOR ORG 0E82EH 
INTERRUPTS BACK ON 
SAVE CURRENT DS 
SAVE BX TEMPORARILY 
ESTABLISH POINTER TO DATA REGION 
AH=0 

ASCI l_READ 
AH=1 

ASCI l_STATUS 
AH=2 

SHI FT_STATUS 
RECOVER REGISTER 

INVALID COMMAND 



GET POINTER TO HEAD OF BUFFER 

TEST END OF BUFFER 

IF ANYTHING IN BUFFER DONT DO INTERRUPT 

MOVE IN WAIT CODE & TYPE 

PERFORM OTHER FUNCTION 

ASCI I READ 

INTERRUPTS BACK ON DURING LOOP 

ALLOW AN INTERRUPT TO OCCUR 

INTERRUPTS BACK OFF 

GET POINTER TO HEAD OF BUFFER 

TEST END OF BUFFER 

SAVE ADDRESS 

SAVE FLAG 

GO GET MODE INDICATOR DATA BYTE 

GET PREVIOUS BITS 

SEE IF ANY DIFFERENT 

ISOLATE INDICATOR BITS 

IF NO CHANGE BYPASS UPDATE 

GO TURN ON MODE INDICATORS 

DISABLE INTERRUPTS 

RESTORE FLAGS 

RESTORE ADDRESS 

LOOP UNTIL SOMETHING IN BUFFER 

GET SCAN CODE AND ASCI I CODE 
MOVE POINTER TO NEXT POSITION 
STORE VALUE IN VARIABLE 

RECOVER REGISTER 
RECOVER SEGMENT 
RETURN TO CALLER 



INTERRUPTS OFF 

GET HEAD POINTER 

IF EQUAL (Z=1) THEN NOTHING THERE 

SAVE FLAGS 

SAVE CODE 

GO GET MODE INDICATOR DATA BYTE 

GET PREVIOUS BITS 

SEE I F ANY Dl FFERENT 

ISOLATE INDICATOR BITS 

IF NO CHANGE BYPASS UPDATE 

GO TURN ON MODE INDICATORS 

RESTORE CODE 

RESTORE FLAGS 

INTERRUPTS BACK ON 

RECOVER REGISTER 

RECOVER SEGMENT 

THROW AWAY FLAGS 



GET THE SHIFT STATUS FL^^GS 
RECOVER REGISTER 
RECOVER REGISTERS 
RETURN TO CALLER 



Keyboard 5-115 



007F 




007F 


43 


0080 


43 


0081 


3B IE 0082 R 


0085 


75 04 


0087 


8B IE 0080 R 



INCREMENT A BUFFER POINTER 



CMP 
JNE 
MOV 



BX,BUFFER_END 

K5 

BX, BUFFER_START 



MOVE TO NEXT WORD IN LIST 

AT END OF BUFFER? 

NO, CONTINUE 

YES, RESET TO BUFFER BEGINNING 



KEYBOARD INTERRUPT ROUTINE 



008C 








008C 


FB 






008D 


55 






008E 


50 






008F 


53 






0090 


51 






0091 


52 






0092 


56 






0093 


57 






009U 


IE 






0095 


06 






0096 


FC 






0097 


E8 


OOOO E 




009A 


BO 


AD 




009C 


E8 


0498 R 




009F 


FA 






OOAO 


2B 


C9 




00A2 








00A2 


Ek 


64 




00A4 


AS 


02 




00A6 


EO 


FA 




00A8 


Ett 


60 




OOAA 


FB 






OOAB 


30 


FE 




OOAD 


7U 


OD 




OOAF 


3C 


FA 




00B1 


75 


12 




0083 


FA 






OOBU 


80 


OE 0097 


=t 10 


00B9 


E9 


01 E2 R 




OOBC 








OOBC 


FA 






OOBD 


80 


OE 0097 R 20 


00C2 


E9 


01 E2 R 





KB_INT_1 PROC 
ST I 



PUSH 
PUSH 
PUSH 
PUSH 
PUSH 
PUSH 
PUSH 
PUSH 
PUSH 
CLD 
CALL 
MOV 
CALL 



WAIT FOR COMMAND TO ACCEPTED 
CLI ; DISABLE INTERRUPTS 

SUB CX,CX ; 



ENABLE INTERRUPTS 



FORWARD DIRECTION 
SET UP ADDRESSING 
DISABLE THE KEYBOARD 
EXECUTE DISABLE 



AL,STATUS_PORT ; 
AL, INPT_BUF_FULL 
KB_INT_01 ; 

AL, KB_DATA 



WAIT FOR COMMAND TO BE ACCEPTED 



•--CHECl 
CMP 



FOR A RESEND COMMAND TO KEYBOARD 



CHECK FOR RESPONSE TO A COMMAND TO KEYBOARD 



- A COMMAND TO THE 
CLI 



KEYBOARD WAS ISSUED 



RESEND THE LAST BYTE 



DISABLE INTERRUPTS 

INDICATE ACK RECEIVED 

RETURN IF NOT (THIS ACK RETURNED FOR DATA) 



DISABLE INTERRUPTS 

INDICATE RESEND RECEIVED 

RETURN IF NOT (THIS ACK RETURNED FOR DATA) 



-UPDATE MODE INDICATORS IF CHANGE IN STATE 



00C5 
00C6 
00C9 
OOCD 
OOCF 
00D2 


50 
E8 
8A 
32 
80 
74 


048A R 
IE 0097 R 
08 

E3 07 
03 


OODU 
00D7 
00D8 


E8 
58 
8A 


0439 R 
EO 


OODA 
OODC 
CODE 


3C 
75 
E9 


FF 
03 
03 D6 R 


OOEl 
00E1 
00E3 
00E4 


24 
OE 
07 


7F 


00E5 
00E7 


3C 
75 


54 
3D 


00E9 
OOEC 


F6 
75 


C4 80 
21 


OOEE 
00F3 


F6 
75 


06 0018 R 04 
17 


00F5 
00 FA 
OOFC 


80 
BO 
L6 


OE 0018 R 04 

20 

20 


OOFE 
0100 
0103 
0106 
0107 
0109 
010C 


BO 
E8 
B8 
FB 
CD 
E9 
E9 


AE 

0498 R 
8500 

15 

OlEC R 
01 E2 R 


010F 
0114 
0116 


80 
BO 
E6 


26 0018 R FB 

20 

20 


0118 
011A 
01 ID 
0120 
0121 


BO 
E8 
B8 
FB 
CD 


AE 

0498 R 
8501 

15 



PUSH 
CALL 
MOV 
XOR 
AND 
JZ 

CALL 
POP 
MOV 



MAKE_LED 

BL,KB_FLAG_2 

BL,AL 

BL,07H 

UPO 

SND_LED 



SAVE DATA IN 

GO GET MODE INDICATOR DATA BYTE 

GET PREVIOUS BITS 

SEE I F ANY Dl FFERENT 

ISOLATE INDICATOR BITS 

IF NO CHANGE BYPASS UPDATE 

GO TURN ON MODE INDICATORS 

RESTORE DATA IN 

SAVE SCAN CODE IN AH ALSO 



TEST FOR OVERRUN SCAN CODE FROM KEYBOARD 



CMP 
JNZ 
JMP 



AL,OFFH 

K16 

K6? 



TEST FOR SHI FT KEYS 



AND AL,07FH 

PUSH CS 

POP ES 

-- TEST FOR SYSTEM KEY 



S THIS AN OVERRUN CHAR 
0, TEST FOR SHI FT KEY 
UFFER FULL_BEEP 



ESTABLISH ADDRESS OF SHIFT TABLE 



KB FLAG_1,SYS_SHI FT ; INDICATE SYSTEM KEY DEPRESSED 
■■ --• END OF INTERRUPT COMMAND 

SEND COMMAND TO INTERRUPT CONTROL PORT 
INTERRUPT-RETURN-NO-EOI 
INSURE KEYBOARD IS ENABLED 
EXECUTE ENABLE 
FUNCTION VALUE FOR MAKE OF SYSTEM KEY 
MAKE SURE INTERRUPTS ENABLED 
USER INTERRUPT 
END PROCESSING 
IGNORE SYSTEM KEY 

KB_FLAG_1,N0T SYS_SH T FT ; TURN OFF SHIFT KEY HELD DOWN 
END OF INTERRUPT COMMAND 
SEND COMMAND TO INTERRUPT CONTROL PORT 
I NTERRUPT-RETURN-NO-EO I 
INSURE KEYBOARD IS ENABLED 
EXECUTE ENABLE 

FUNCTION VALUE FOR BREAK OF SYSTEM KEY 

MAKE SURE INTERRUPTS ENABLED 

USER INTERRUPT 



MOV 


AL,EOI 


OUT 


020H,AL 


MOV 


AL,ENA KBD 


CALL 


SH 1 P IT 


MOV 


AX,O850OH 


STI 




INT 


15H 


JMP 


K27A 


JMP 


K26 


AND 


KB FLAG 1, 


MOV 


AL,EOI 


OUT 


020H,AL 


MOV 


AL, ENA KBD 


CALL 


SH 1 P IT 


MOV 


AX,08501H 



5-116 Keyboard 



0123 


£9 01 EC R 


0126 


BF 0000 E 


0129 


B9 0000 E 


012C 


F2/ A£ 


012E 


8A C4 


0130 


m 03 


0132 


E9 GIGE R 


0135 


81 EF 0001 E 


0139 


2E: 8A A5 0000 


013E 


A8 80 


01 UO 


7k 02 


01U2 


EB 63 


OI'lU 


80 FC 10 


0147 


73 07 


01U9 


08 26 0017 R 


014D 


E9 01 E2 R 


0150 




0150 


F6 06 0017 R OH 


0155 


IH 03 


0157 


EB 75 90 


015A 


3C 52 


015C 


75 25 


015E 


F6 06 0017 R 08 


0163 


74 03 


0165 


EB 67 90 


0168 


F6 06 0017 R 20 


016D 


75 OD 


016F 


F6 06 001 1 R 03 


017U 


74 OD 


0176 




0176 


88 5230 


0179 


E9 0375 R 


017C 




017C 


F6 06 0017 R 03 


0181 


74 F3 


0183 




0183 


84 26 0018 R 


0187 


74 02 


0189 


EB 57 


018B 


08 26 0018 R 


018F 


30 26 0017 R 


0193 


F6 C4 70 


0196 


74 05 


0198 


50 


0199 


E8 0439 R 


019C 


58 


019D 


30 52 


019F 


75 41 


01A1 


B8 5200 


01A4 


E9 0375 R 


01A7 




01A7 


80 FC 10 


01AA 


73 1A 


01 AC 


F6 D4 


01AE 


20 26 0017 R 


01B2 


3C B8 


01 BU 


75 2C 


0186 


AC 0019 R 


01 B9 


B4 00 


01BB 


88 26 0019 R 


01BF 


3C 00 


01C1 


74 IF 


01C3 


E9 037E R 


01C6 




01 C6 


F6 D4 


01C8 


20 26 0018 R 


OICC 


EB 14 


OICE 




DICE 


3C 80 


01 DO 


73 10 


0102 


F6 06 0018 R 08 


01D7 


74 IE 


01D9 


3C 45 


01DB 


74 05 


01DD 


80 26 0018 R F7 


01E2 




01 E2 


FA 


01E3 


BO 20 


01E5 


E6 20 


01 E7 




01E7 


BO AE 


01E9 


E8 0498 R 


01 EC 


FA 


01 ED 


07 


01EE 


1 F 


01EF 


5F 


01 FO 


5E 


01F1 


5A 


01 F2 


59 


01 F3 


5B 


01 FU 


58 


01 F5 


5D 


01 F6 


CF 



K20: 
K21 : 



MOV 


Dl, OFFSET K6 


MOV 


CX, OFFSET K6L 


REPNE 


SCASB 


MOV 


AL,AH 



SHIFT KEY KOUND 

SUB Dl, OFFSET K6+1 

MOV AH,CS:K7[DI] 

TEST AL,80H 

JZ K17C 

JMP SHORT K23 



IGNORE SYSTEM KEY 

SHI FT KEY TABLE 
LENGTH 

LOOK THROUGH THE TABLE FOR A MATCH 
RECOVER SCAN CODE 
JUMP IF MATCH FOUND 
IF NO MATCH, THEN SHIFT NOT FOUND 



ADJUST PTR TO SCAN CODE MTCH 
GET MASK INTO AH 
TEST FOR BREAK KEY 
BREAK_SHI FT_FOUND 
CONTINUE 



DETERMINE SET OR TOGGLE 



IF SCROLL SHIFT OR ABOVE, TOGGLE KEY 



PLAIN SHIFT KEY, SET SHIFT ON 



CMP 

JN2 

TEST 

JZ 

JMP 

TEST 

JNZ 

TEST 



K25 

AL, INS_KEY 

K22 

KB_FU\G, ALT_SHIFT 



TOGGLED SHIFT KEY, TEST FOR 1ST MAKE OR NOT 

SHI FT-TOGGLE 

CHECK CTl SHI FT STATE 

JUMP IF NOT CTL STATE 

JUMP IF CTL STATE 
CHECK FOR INSERT KEY 
JUMP IF NOT INSERT KEY 
CHECK FOR ALILKNATE SHIFT 
JUMP IF NOT ALTERNATE SHIFT 
I F ALTERNATE SHI FT 
; CHECK FOR BASE STATE 
; JUMP IF NUM LOCK IS ON 
RIGHT_SHIFT ; 

; JUMP IF BASE STATE 

NUMERIC ZERO, NOT INSERT KEY 
PUT OUT AN ASCI I ZERO 
BUFFER_FILL 
MIGHT BE NUMERIC 

KB_FLAG, LEFT_SHIFT+ R I GHT_SH I FT ; 

K20 ; JUMP NUMERIC, NOT INSERT 



K57 



5230H 



TEST AH,KB_FLAG_1 

JZ K22A0 

JMP SHORT K26 

OR KB_FLAG_1,AH 

XOR KB_FLAG,AH 



SHIFT TOGGLE KEY HIT; PROCESS IT 

IS KEY ALREADY DEPRESSED 

GO I F NOT 

JUMP IF KEY ALREADY DEPRESSED 

INDICATE THAT THE KEY IS DEPRESSED 
TOGGLE THE SHIFT STATE 



TOGGLE LED IF CAPS OR NUM KEY DEPRESSED 

TEST AH,CAPS_SHI FT+NUM_SHI FT+SCROLL_SHI FT ; SHIFT TOGGLE? 
GO I F NOT 

SAVE SCAN CODE AND SHIFT MASK 
GO TURN MODE INDICATORS ON 
RESTORE SCAN CODE 



CMP 
JNE 
MOV 
JMP 



AL, INS_KEY 

K26 

AX, INS_KEY*256 



K57 
BREAK SHIFT FOUND 



JAE 
NOT 
AND 
CMP 
JNE 



KB_FLAG,AH 

AL,ALT_KEY+80H 

K26 



TEST FOR 1ST MAKE OF INSERT KEY 
JUMP IF NOT INSERT KEY 
SET SCAN CODE INTO AH, INTO AL 
PUT INTO OUTPUT BUFFER 



BREAK-SHI FT- FOUND 
IS THIS A TOGGLE KEY 
YES, HANDLE BREAK TOGGLE 
INVERT MASK 
TURN OFF SHI FT BIT 
IS THIS ALTERNATE SHIFT RELEASE 
INTERRUPT_RETURN 



ALTERNATE SHIFT KEY RELEASED, GET THE VALUE INTO BUFFER 



MOV 
MOV 
MOV 
CMP 



NOT 
AND 
JMP 



AL,ALT_1NPUT 

AH,0 

ALT_INPUT,AH 

AL,0 

K26 

K58 



TEST FOR HOLD STATE 



CMP 


AL,80H 


JAE 


K26 


TEST 


KB FLAG 1,H0LD STATE 


JZ 


K28 


CMP 


AL.NUM KEY 


JE 


K26 



KB_FLAG_1 , NOT HOLD_STATE 



SCAN CODE OF 
ZERO OUT THE Fl ELD 
WAS THE INPUT=0 
INTERRUPT_RETURN 
IT WASN'T, SO PUT IN BUFFER 

BREAK-TOGGLE 

INVERT MASK 

INDICATE NO LONGER DEPRESSED 

INTERRUPT_RETURN 



NO-SHI FT-FOUND 

TEST FOR BREAK KEY 

NOTHING FOR BREAK CHARS FROM HERE ON 

ARE WC IN HOLD STATE 

BRANCH AROUND TEST I F NOT 

CAN'T END HOLD ON NUM_LOCK 

; TURN OFF THE HOLD STATE BIT 



MOV 


AL,EOI 


OUT 


020H.AL 


MOV 


AL, ENA KBD 


CALL 


SHIP_IT 


CLI 




POP 


ES 


POP 


DS 


POP 


Dl 


POP 


SI 


POP 


DX 


POP 


CX 


POP 


BX 


POP 


AX 


POP 


BP 


IRET 





INTERRUPT-RETURN 

TURN OFF INTERRUPTS 

END OF INTERRUPT COMMAND 

SEND COMMAND TO INTERRUPT CONTROL PORT 

INTERRUPT-RETURN-NO-EOI 

INSURE KEYBOARD IS ENABLED 

EXECUTE ENABLE 



RETURN, INTERRUPTS BACK ON WITH FLAG CHANGE 



Keyboard 5-117 



01F7 

01F7 F6 06 0017 R 08 

01 FC 75 03 

01 FE E9 0290 R 



0201 








0201 


F6 


06 0017 R 


04 


0206 


74 


31 




0208 


3C 


53 




020A 


75 


2D 




020C 


C7 


06 0072 R 


1234 


0212 


E9 


0000 E 




0215 








0215 


52 
40 


4F 50 51 


4B UC 


021C 


47 


48 49 




021 F 


10 


11 12 13 


14 15 




16 


17 




0227 


18 


19 IE IF 


20 21 




22 


23 




022F 


24 


25 26 2C 


2D 2E 




2F 


30 




0237 


31 


32 




0239 








0239 


3C 


39 




023B 


75 


05 




023D 


80 


20 




023 F 


E9 


0375 R 




0242 








0242 


BF 


0215 R 




02U5 


B9 


OOOA 




0248 


F2/ AE 




024A 


75 


12 




024C 


81 


EF 0216 R 




0250 


AO 


0019 R 




0253 


B4 


OA 




0255 


F6 


E4 




0257 


03 


C7 




0259 


A2 


0019 R 




025C 


EB 


84 




025E 








025 E 


C6 


06 0019 R 


00 


0263 


B9 


001A 




0266 


F2/ AE 




0268 


75 


05 




026A 


80 


00 




026C 


E9 


0375 R 




026F 








026F 


3C 


02 




0271 


72 


OC 




0273 


3C 


OE 




0275 


73 


08 




02 ff 


80 


C4 76 




027A 


BO 


00 




027C 


E9 


0375 R 




027 F 








027 F 


3C 


3B 




0281 


73 


03 




0283 








0283 


E9 


01E2 R 




0286 








0286 


3C 


47 




0288 


73 


F9 




C)28A 


BB 


OOOO E 




028D 


E9 


03CC R 




0290 








0290 


F6 


06 0O17 R 


04 


0295 


74 


62 




0297 


3C 


46 




0299 


75 


ID 




029B 


88 


IE 0O8O R 




029 F 


89 


IE 0O1A R 




02A3 


89 


IE 001C R 




02A7 


C6 


06 0O71 R 


80 


02AC 


BO 


AE 




02AE 


E8 


0498 R 




02B1 


CD 


IB 




02B3 


2B 


CO 




02B5 


E9 


0375 R 




02B8 








02B8 


3C 


45 




02BA 


75 


26 




02BC 


80 


OE 0018 R 


08 


02C1 


BO 


AE 




02C3 


E8 


0498 R 




02C6 


BO 


20 




02C8 


E6 


20 





. MOT IN HOLD STATE 

K28: ; NO-HOLD-STATE 

TEST KB_FLAG,ALT_SHIFT ; ARE WE IN ALTERNATE SHIFT 

JNZ K29 ; JUMP IF ALTERNATE SHIFT 

JMP K38 ; JUMP I F NOT ALTERNATE 

; TEST FOR RESET KEY SEQUENCE ( CTL ALT DEL) 

K29: ; TEST-RESET 

TEST KB_FLAG,CTL_SHIFT ; ARE WE IN CONTROL SHIFT ALSO 

JZ K31 ; N0_RESET 

CMP AL,DEL_KEY ; SHIFT STATE IS THERE, TEST KEY 

JNE K31 ; N0_RESET 

. CTL-ALT-DEL HAS BEEN FOUND, DO I/O CLEANUP 



■ ALT- INPUT-TABLE 
LABEL BYTE 

DB 82,79,80,81,75,76,77 

DB 71,72,73 ; 10 NUMBERS ON KEYPAD 

■ SUPER-SHIFT-TABLE 

DB 16.17,18.19.20,21,22,23 ; A-2 TYPEWRITER CHARS 

DB 24,25,30.31,32,33.34,35 

DB 36,37,38,44,45,46,47,48 

DB 49,50 

IN ALTERNATE SHIFT, RESET NOT FOUND 

; NO-RESET 

; TEST FOR SPACE KEY 

; NOT THERE 

; SET SPACE CHAR 

; BUFFER_FILL 



CMP 


AL,57 


JNE 


K32 


MOV 


AL, • 


JMP 


K57 



LOOK FOR KEY PAD ENTRY 



MOV 


Dl, OFFSET K30 


MOV 


CX, 10 


REPNE 


SCASB 


JNE 


K33 


SUB 


Dl, OFFSET K30+1 


MOV 


AL,ALT INPUT 


MOV 


AH, 10 


MUL 


AH 


ADD 


AX.DI 


MOV 


ALT INPUT, AL 


JMP 


K26 



LOOK FOR SUPERSHIFT ENTRY 



MOV 


ALT INPUT, 


MOV 


CX,26 


REPNE 


SCASB 


JNE 


K34 


MOV 


AL,0 


JMP 


K57 



ALT- KEY- PAD 

ALT- INPUT-TABLE 

LOOK FOR ENTRY USING KEYPAD 

LOOK FOR HATCH 

NO_ALT_KEYPAD 

Dl NOW HAS ENTRY VALUE 

GET THE CURRENT BYTE 

MULTIPLY BY 10 

ADD IN THE LATEST ENTRY 

STORE IT AWAY 

THROW AWAY THAT KEYSTROKE 



NO-ALT-KEYPAD 

ZERO ANY PREVIOUS ENTRY INTO INPUT 

DI,ES ALREADY POINTING 

LOOK FOR MATCH IN ALPHABET 

NOT FOUND, FUNCTION KEY OR OTHER 

ASCI I CODE OF ZERO 

PUT IT IN THE BUFFER 



LOOK FOR TOP ROW OF ALTERNATE SHIFT 



CMP 
JAE 
ADD 
MOV 
JMP 



AL,2 

K35 

AL,14 

K35 

AH, 118 

AL,0 

K57 



ALT-TOP-ROW 

KEY WITH ' 1 ' ON IT 

NOT ONE OF INTERESTING KEYS 

IS IT IN THE REGION 

ALT-FUNCTION 

CONVERT PSUEDO SCAN CODE TO RANGE 

INDICATE AS SUCH 

BUFFER_FILL 



TRANSLATE ALTERNATE SHIFT PSEUDO SCAN CODES 



K36: 
K37: 



CMP 
JAE 
MOV 
JMP 



AL,71 

K36 

BX, OFFSET Kl: 

K63 



NOT IN ALTERNATE SHIFT 



ALT- FUNCTION 
TEST FOR IN TABLE 
ALT-CONTINUE 
CLOSE-RETURN 
IGNORE THE KEY 
ALT-CONTINUE 
IN KEYPAD REGION 
IF SO, IGNORE 

ALT SHIFT PSEUDO SCAN TABLE 
TRANSLATE THAT 



NOT-ALT-SHI FT 

ARE WE IN CONTROL SHIFT 

NOT-CTL-SHI FT 



CONTROL SHIFT, TEST SPECIAL CHARACTERS 

TEST FOR BREAK AND PAUSE KEYS 

CMP AL, SCROLL_KEY 

JNE K39 

MOV BX,BUFFER_START 

MOV BUrFER_HEAD,BX 

MOV BUFFER_TAIL,BX 

MOV BIOS_BREAK,80H 



TEST FOR BREAK 

NO-BREAK 

RESET BUFFER TO EMPTY 



TURN ON BIOS_BREAK BIT 



ENABL 

MOV 


E KEYBOARD 
AL,ENA KBD 


CALL 


SHIP IT 


INT 


1BH 


SUB 


AX, AX 


JMP 


K57 


C39: 

CMP 


AL,NUM KEY 


JNE 


K41 


OR 


KB FLAG 1,H0LD STATE 


ENABLE KEYBOARD 


MOV 


AL,ENA KBD 


CALL 


SHIP IT 


MOV 


AL,EOI 


OUT 


020H,AL 



ENABLE KEYBOARD 

EXECUTE ENABLE 

BREAK INTERRUPT VECTOR 

PUT OUT DUMMY CHARACTER 

BUFFER_FILL 

NO-BREAK 

LOOK FOR PAUSE KEY 

NO- PAUSE 

TURN ON THE HOLD FLAG 



ENABLE KEYBOARD 

EXECUTE ENABLE 

END OF INTEr^RUPT TO CONTROL PORT 

ALLOW FURTHER KEYSTROKE I NTS 



5-118 Keyboard 



02CA 


80 


3E 00U9 R 07 


02CF 


7H 


07 




02D1 


BA 


03D8 




02DU 


AO 


0065 


R 


02D7 


EE 






02D8 








0208 








02D8 


F6 


06 0018 R 08 


02DD 


75 


F9 




02DF 


E9 


01 EC 


R 


0?F? 








02E2 


3C 


37 




02EU 


75 


06 




02E6 


B8 


7200 




02E9 


E9 


0375 


R 


02CC 








02EC 


BB 


0000 


E 


02EF 


3C 


3B 




02F1 


72 


7E 




02F3 


BB 


0000 


E 


02F6 


E9 


03CC 


R 





- DOR INC 
CMP 


5 PAUSE INIERVAL, 
CRT MODE, 7 




JE 


KUO 




MOV 


DX,03D8H 




MOV 


AL,CRT MODE SET 




OUT 


DX.AL 


K40: 






END IF 






KilOA: 







02F9 


3C 


U7 




02FB 


73 


33 




02FD 


F6 


06 OC 


17 R 03 


0302 


7«+ 


62 




0304 


3C 


OF 




0306 


75 


05 




0308 


B8 


OFOO 




030B 


EB 


68 




030D 








030D 


3C 


37 




030F 


75 


10 




0311 


BO 


AE 




0313 


E8 


0498 


R 


0316 


BO 


20 




0318 


E6 


20 




031A 


55 






031B 


CD 


05 




031D 


5D 






031E 


E9 


01 E7 


R 


0321 








0321 


3C 


3B 




0323 


72 


06 




0325 


BB 


0000 


E 


0328 


E9 


03CC 


R 


032B 








032B 


BB 


0000 


E 


032E 


EB 


41 




0330 








0330 


F6 


06 0017 R 20 


0335 


75 


21 




0337 


F6 


06 0017 R 03 


033C 


75 


21 





TEST KB_FLAG_ 

JNZ K40A 

JMP K27A 



1,H0LD_STATE 



TEST SPECIAL CASE KEY 55 

CMP AL,55 

JNE K42 

MOV AX. 114*256 

JMP K57 

SET UP TO TRANSLATE CONTROL SHIFT 



BX, OFFSET K8 

AL,59 

K56 



NOT IN CONTROL SHI FT 



IS THIS BLACK AND WHITE CARD 
YES, NOTHING TO DO 
PORT FOR COLOR CARD 
GET THE VALUE OF THE CURRENT MODE 
SET THE CRT MODE, SO THAT CRT IS ON 
PAUSE-LOOP 



LOOP UNTIL FLAG TURNED OFF 
I NTERRU PT_RETURN_NO_EO I 
NO- PAUSE 



NOT-KEY-55 

START/STOP PRINTING SWITCH 

BUFFER_FILL 



NOT-KEY-55 

SET UP TO TRANSLATE CTL 

IS IT IN TABLE 

YES, GO TRANSLATE CHAR 

CTL-TABLE-TRANSLATE 

CTL TABLE SCAN 

TRANSL7\TE_SCAN 



NOT-CTL-SHI FT 



CMP 
JAE 
TEST 



KB_FLAG, LEFT_SH I FT+R I GHTSH I FT 



K54 
UPPER CASE, HANDLE SPECIAL CASES 



CMP 
JNE 
MOV 
JMP 



AL, 15 

K45 

AX, 15*256 

SHORT K57 



TEST FOR SHI FT STATE 



BACK TAB KEY 

NOT-BACK-TAB 

SET PSEUDO SCAN CODE 

BUFFER_F 1 LL 

NOT-BACK-TAB 
PRINT SCREEN KEY 
NOT-PRINT-SCREEN 



ISSUE INTERRUPT TO INDICATE PRINT SCREEN FUNCTION 



MOV 
CALL 
MOV 
OUT 
PUSH 
INT 
POP 
JMP 



AL, ENA_KBD 



AL,59 

K47 

BX, OFFSET K12 

K63 



INSURE KEYBOARD IS ENABLED 

EXECUTE ENABLE 

END OF CURRENT INTERRUPT 

SO FURTHER THINGS CAN HAPPEN 
SAVE POINTER 

ISSUE PRINT SCREEN INTERRUPT 
RESTORE POINTER 
GO BACK WITHOUT EO I OCCURRING 

NOT-PRINT-SCREEN 

FUNCTION KEYS 

NOT-UPPER-FUNCTION 

UPPER CASE PSEUDO SCAN CODES 

TRANSLATE_SCAN 

NOT-UPPER-FUNCTION 

POINT TO UPPER CASE TABLE 

OK, TRANSLATE THE CHAR 



KEYPAD KEYS, MUST TEST NUM LOCK FOR DETERMINATION 



TEST KB_FLAG,NUM_STATE 

JNZ K52 

TEST KB_FLAG,LEFT_SHI FT+RIGHI 

JNZ K53 

BASE CASE FOR KEYPAD 



KEYPAD-REGION 
ARE WE IN NUM_LOCK 
TEST FOR SURE 
SHIM ; ARE WE IN SHIFT STATE 
IF SHIFTED, REALLY NUM STATE 



033E 
0340 
0342 
0344 
0346 
0348 
034B 


3C 
74 
3C 
74 
2C 
BB 
E9 


4A 

OC 

4E 

00 

47 

0000 

03CE 


E 
R 


034E 
0351 


B8 
EB 


4A2D 
22 




0353 
0356 


B8 
EB 


4E2B 
ID 




0358 
0358 
035D 


F6 
75 


06 0017 R 03 
DF 


035F 
035F 
0361 
0364 


2C 
BB 
EB 


46 

0000 

OB 


E 


0366 
0366 
0368 
036A 
036C 


3C 
72 
BO 
EB 


38 
04 
00 
07 




036E 
036E 


BB 


0000 


E 



CMP 


AL,74 


JE 


K50 


CMP 


AL,78 


JE 


K51 


SUB 


AL, 71 


MOV 


BX, OFFSET K15 


JMP 


K64 


MOV 


AX, 74*256+'-' 


JMP 


SHORT K57 


MOV 


AX, 78*256+'+' 


JMP 


SHORT K57 



CONVERT ORIGIN 
BASE CASE TABLE 
CONVERT TO PSEUDO SCAN 



■ MIGHT BE NUM LOCK, TEST SHIFT STATUS 



SUB 
MOV 
JMP 



AL, 70 

BX, OFFSET K14 

SHORT K56 



PLAIN OLD LOWER CASE 



AL,59 
K55 
AL,0 
SHORT K57 



MOV BX, OFFSET K10 
TRANSLATE THE CHARACTER 



SHIFTED TEMP OUT OF NUM STATE 

REALLY_NUM_STATE 
CONVERT ORIGIN 
NUM STATE TABLE 
TRANSLATE_C.1AR 



NOT-SHI FT 

TEST FOR FUNCTION KEYS 

NOT-LOWER- FUNCT I ON 

SCAN CODE IN AH ALREADY 

BUFFER_FILL 



Keyboard 5-119 



0371 




0371 


FE C8 


0373 


2E: 07 


0375 




0375 


3C FF 


0377 


74 IF 


0379 


80 FC FF 


037C 


7U 1A 


037E 




037E 


F6 06 0017 R UO 


0383 


74 20 


0385 


F6 06 0017 R 03 


038A 


74 OF 


038C 


3C H^ 


038E 


72 15 


0390 


3C 5A 


0392 


77 11 


039U 


04 20 


0396 


EB OD 


0398 




0398 


E9 01 E2 R 


039B 




039B 


3C 61 


039D 


72 06 


039F 


3C 7A 


03A1 


77 02 


03A3 


2C 20 


03A5 




03A5 


8B IE OOIC R 


03A9 


8B F3 


03AB 


E8 007F R 


03AE 


3B IE 001A R 


03B2 


74 22 


03 BU 


89 04 


03B6 


89 IE OOIC R 


03BA 


FA 


03BB 


80 20 


03BD 


E6 20 


03BF 


80 AE 


03C1 


E8 0498 R 


03CU 


B8 9102 


03C7 


CD 15 


03C9 


E9 01 EC R 



PUT CHARACTER INTO BUFFER 



CMP 


AL.-1 


JE 


K59 


CMP 


AH,-1 


JE 


K59 



HANDLE THE CAPS LOCK PROBLEM 



TRANSLATE-CHAK 
CONVERT ORIGIN 
CONVERT THE SCAN CODE TO ASCI 



BUFFER-FILL 
IS THIS AN IGNORE CHAR 
YES, 00 NOTHING WITH IT 
LOOK FOR -1 PSEUDO SCAN 
NEAR_INTERRUPT_RETURN 



BUFFER-FILL-NOTEST 

ARE WE IN CAPS LOCK STATE 

SKI P IF NOT 



I N CAPS LOCK STATE 

TEST 
JZ 

CONVERT ANY UPPER CASE TO LOWER CASE 



AL, 'A' 
K61 

AL, 'Z' 
K61 

SHORT K61 



; NOT_CAPS_STATE 

; CONVERT TO LOWER CASE 

; NOT_CAPS_STATE 



CONVERT ANY LOWER CASE TO UPPER CASE 



JB 


K61 


CMP 


AL, 'z' 


JA 


K61 


SUB 


AL, 'a'-'A' 


MOV 


BX, BUFFER TAIL 


MOV 


SI,BX 


CALL 


K4 


CMP 


BX, BUFFER HEAD 


JE 


K62 


MOV 


[SI], AX 


MOV 


BUFFER TAIL,BX 


CLI 




MOV 


AL,EOI 


OUT 


020H,AL 


MOV 


AL,ENA KBD 


CALL 


SHIP IT 


MOV 


AX,09102H 


INT 


15H 


JMP 


K27A 



LOWER-TO-UPPER 

FIND OUT IF ALPHABETIC 

NOT_CAPS_STATE 



NOT-CAPS-STATE 

GET THE END POINTER TO THE BUFFER 

SAVE THE VALUE 

ADVANCE THE TAIL 

HAS THE BUFFER WRAPPED AROUND 

BUFFER_FULL_BEEP 

STORE THE VALUE 

MOVE THE POINTER UP 

TURN OFF INTERRUPTS 

END OF INTERRUPT COMMAND 

SEND COMMAND TO INTERRUPT CONTROL PORT 

INSURE KEYBOARD IS ENABLED 
EXECUTE ENABLE 
MOVE IN POST CODE & TYPE 
PERFORM OTHER FUNCTION 

INTERRUPT_RETURN 



TRANSLATE SCAN FOR PSEUDO SCAN CODES 



03CC 






03CC 


?C 


3B 


03CE 






03CE 


?\- 


D7 


03D0 


8A 


EO 


03D2 


HO 


00 


03D4 


EB 


9F 


0306 






03D6 


BO 


20 


03D8 


F6 


20 


03DA 


BB 


0082 


03DD 


F4 


61 


03DF 


50 




03E0 






03E0 


>>4 


FC 


03E2 


FR 


00 


03E4 


E6 


61 


03E6 


B9 


OOCE 


03E9 


L2 


FE 


03EB 


OC 


02 


03ED 


F6 


61 


03EF 


BQ 


0OE5 


03F2 


E2 


FE 


03F4 


4B 




03 F5 


75 


E9 


03 F7 


58 




03 F8 


Lb 


61 


03 FA 


E9 


01E7 R 



03FD 






03FD 


50 




03FE 


53 




03FF 


51 




0400 


rtA 


F8 


0402 


B3 


03 


0404 


FA 




0405 


80 


26 


040A 


?B 


C9 


040C 






040C 


E4 


64 


040E 


A8 


02 


0410 


EO 


FA 


0412 


8A 


C7 


0414 


F6 


60 


0416 


FB 




0417 


B9 


1A0O 



XLAT 


CS:K9 


MOV 


AH.AL 


MOV 


AL,0 


JMP 


K57 




ENDP 


MOV 


AL.EOI 


OUT 


INTA00,AL 


MOV 


BX,82H 


IN 


AL,KB CTL 


PUSH 


AX 


AND 


AL,0FCH 


JMP 


SHORT $+2 


OUT 


KB CTL.AL 


MOV 


CX,OCEH 


LOOP 


K66 


OR 


AL,2 


OUT 


KB CTL,AL 


MOV 


CX,0E5H 


LOOP 


K67 


DEC 


BX 


JNZ 


K65 


POP 


AX 


OUT 


KB CTL,AL 


JMP 


K27 


SNO DATA 



TRANSLATE-SCAN 

CONVERT ORIGIN TO FUNCTION KEYS 

TRANSLATE-SCAN-ORGD 

CTL TABLE SCAN 

PUT VALUE INTO AH 

ZERO ASCI I CODE 

PUT IT INTO THE BUFFER 



ENABLE INTR. CTL. CHIP 

NUMBER OF CYCLES FOR 1/8 SECOND TONE 

GET CONTROL INFORMATION 

SAVE 

BEEP-CYCLE 

TURN OFF TIMER GATE AND SPEAKER DATA 

10 DELAY 

OUTPUT TO CONTROL 

HALF CYCLE TIME FOR TONE 

SPEAKER OFF 

TURN ON SPEAKER BIT 

OUTPUT TO CONTROL 

SET UP COUNT 

ANOTHER HALF CYCLE 

TOTAL TIME COUNT 

DO ANOTHER CYCLE 

RECOVER CONTROL 

OUTPUT THE CONTROL 

EXIT 



THIS ROUTINES HANDLES TRANSMISSION OF COMMAND AND DATA BYTES 
TO THE KEYBOARD AND RECEIPT OF ACKNOWLEDGEMENTS. IT ALSO 
HANDLES ANY RETRIES IF REQUIRED 



SND DATA PROC 


NEAR 


PUSH 


AX 


PUSH 


BX 


PUSH 


CX 


MOV 


BH,AL 


MOV 


BL,3 


SDO: CLI 




AND 


KB FL 


. WAIT 


FOR COM^ 



SAVE REGISTERS 



; SAVE TRANSMITTED BY FOR RETRIES 
; LOAD RETRY COUNT 
; DISABLE INTERRUPTS 
KB_FLAG_2,N0T ( KB_FE+KB_FA) ; CLEAR ACK AND RESEND FLAGS 



AL, STATUS_PORT ; 
AL, INPT_BUF_FULL 
SD5 ; 



WAIT FOR COMMAND TO BE ACCEPTED 

REESTABLISH BYTE TO TRANSMIT 

SEND BYTE 

ENABLE INTERRUPTS 

LOAD COUNT FOR 10mS+ 



5-120 Keyboard 



0U1A 
041 F 


F6 
75 


06 
OD 


0097 R 30 


0421 


E2 


F7 




0423 
0425 


FE 
75 


CB 
DD 




0427 
042C 


80 
EB 


OE 
07 


0097 R 80 


042E 
0433 


F6 
74 


06 
EE 


0097 R 10 


0435 
0436 
0437 
0438 
0439 


59 
5B 
58 
C3 







SEE IF EITHER BIT SET 
IF SET, SOMETHING RECEIVED GO PROCESS 

OTHERWISE WAIT 



RESTORE REGISTERS 
RETURN, GOOD TRANSMISSION 



0439 










0439 


l-A 








043A 


F6 


06 0097 


R 


40 


043F 


75 


47 






0441 


80 


OE 0097 


R 


40 


0446 


BO 


20 






0448 


F6 


20 






044A 


EB 


OD 






044C 










044C 


FA 








0440 


F6 


06 0097 


R 


40 


0452 


(b 


34 






0454 


80 


OE 0097 


R 


40 


0459 


BO 


ED 






045B 


F8 


03FD R 






045E 


FA 








045F 


F8 


048A R 






0462 


SO 


26 0097 


R 


FR 


0467 


08 


06 0097 


R 




046B 


F6 


06 0097 


K 


RO 


0470 


75 


OB 






0472 


FR 


03FD R 






0475 


FA 








0475 


F6 


06 0097 


R 


80 


047B 


/4 


06 






047D 


BO 


F4 






047F 


FR 


03FD R 






0482 


FA 








0483 


80 


26 0097 


R 


3F 


0488 


FB 








0489 


C3 








048A 











SND_LED PROG 



MOV 
OUT 
JMP 



THIS ROUTINES TURNS ON THE MODE INDICATORS. 



NEAR 

; TURN OFF INTERRUPTS 
KB_FLAG_2,KB_PR_LED ; CHECK FOR MODE INDICATOR UPDATE 
SL1 ; DONT UPDATE AGAIN IF UPDATE UNDERWAY 

KB_FLAG_2,KB_PR_LED ; TURN ON UPDATE IN PROCESS 

AL.EOI ; END OF INTERRUPT COMMAND 

020H,AL ; SEND COMMAND TO INTERRUPT CONTROL PORT 

SHORT SLO ; GO SEND MODE INDICATOR COMMAND 



; TURN OFF INTERRUPTS 
KB_FLAG_2,KB_PR_LED ; CHECK FOR MODE INDICATOR UPDATE 
SLl ; DONT UPDATE AGAIN IF UPDATE UNDERWAY 

KB_FLAG_2,KB_PR_LED ; TURN ON UPDATE IN PROCESS 
AL,LED_CMD ; LED CMD BYTE 
SND_DATA ; SEND DATA TO KEYBOARD 



MAKE_LED 

KB_FLAG_2,0F8H 

KB_FLAG_2,AL 

KB FLAG_2,KB_ERR 

SL2 

SND_DATA 



KB_FLAG_2,N0T(KB. 



SLl: ST I 
RET 
SND_LED ENDP 



GO FORM INDICATOR DATA BYTE 
CLEAR MODE INDICATOR BITS 

SAVE PRESENT INDICATORS STATES FOR NEXT ' 
; TRANSMIT ERROR DETECTED 
IF YES, BYPASS SECOND BYTE TRANSMISSION 

SEND DATA TO KEYBOARD 
TURN OFF INTERRUPTS 
; TRANSMIT ERROR DETECTED 
IF NOT, DONT SEND AN ENABLE COMMAND 

GET KEYBOARD CSA ENABLE COMMAND 
SEND DATA TO KEYBOARD 
TURN OFF INTERRUPTS 

='R_LED+KB_ERR) ; TURN OFF MODE INDICATOR 
UPDATE AND TRANSMIT ERROR FLAG 
ENABLE INTERRUPTS 
RETURN TO CALLER 



048A 


51 




048B 


At) 


0017 


048E 


24 


70 


0490 


B1 


04 


0492 


02 


CO 


0494 


24 


07 


0496 


59 




0497 


C3 




0498 







MAKE_LED PROG 
PUSH 
MOV 
AND 
MOV 
ROL 
AND 
POP 
RET 

MAKE_LED ENDP 



CL,4 
AL,CL 
AL,07H 



SHIFT COUNT 

SHIFT BITS OVER TO TURN ON INDICATORS 

MAKE SURE ONLY MODE BITS ON 

RETURN TO CALLER 



0498 






0498 


5U 




0499 


FA 




049A 


2B 


C9 


049C 






049C 


K4 


64 


049E 


AR 


0? 


04A0 


EO 


FA 


04A2 


58 




04A3 


L6 


64 


04A5 


FB 




04A6 


C3 




04A7 






04A7 











CLI 








SUB 


CX,CX 


S 1 O.- 












IN 


AL, STATUS PORT 






TEST 


AL, INPT BUF FULL 






LOOPNZ 


SIC 






POP 


AX 






OUT 


STATUS PORT,AL 






STI 








RET 




SHI P 


IT 


ENDP 




CODE 




ENDS 
END 





WAIT FOR COMMAND TO BE ACCEPTED 

GET DATA TO SEND 
SEND TO KEYBOARD CONTROLLER 
ENABLE INTERRUPTS AGAIN 
RETURN TO CALLER 



Keyboard 5-121 



5-122 Keyboard 



TITLE 09/09/83 PRINT BIOS 

.LIST 

INCLUDE SEGMENT. SRC 

CODE SEGMENT BYTE PUBLIC 

EXTRN DDS:NEAR 
PUBLIC PRINTER_I0_1 
--- INT 17 

PRINTER_IO 

THIS ROUTINE PROVIDES COMMUNICATION WITH THE PRINTER 
INPUT 

{AH)=0 PRINT THE CHARACTER IN (AL) 

ON RETURN, AH=1 IF CHARACTER COULD NOT BE PRINTED (TIME OUT) 
OTHER BITS SET AS ON NORMAL STATUS CALL 
(AH)=1 INITIALIZE THE PRINTER PORT 

RETURNS WITH (AH) SET WITH PRINTER STATUS 
(AH)=2 READ THE PRINTER STATUS INTO (AH) 



I 



I 



I 



I i_ 1 = SELECTED 
|_ 1 = OUT OF PAPER 
■■ ACKNOWLEDGE 



2-1 
I l_ 
|_ UNUSED 
I/O ERROR 



TIME OUT 



(OX) = PRINTER TO BE USED (0,1,2) CORRESPONDING TO ACTUAL VALUES 
IN PRINTER_BASE AREA 

DATA AREA PRINTER_BASE CONTAINS THE BASE ADDRESS OF THE PRINTER CARD(S) 

AVAILABLE (LOCATED AT BEGINNING OF DATA SEGMENT, ^OQH ABSOLUTE, 3 WORDS) 



ASSUME CS: CODE, OS: DATA 



0000 






0000 


FB 




0001 


IE 




0002 


52 




0003 


56 




0004 


51 




0005 


53 




0006 


E8 


0000 E 


0009 


8B 


F2 


OOOB 


8A 


9C 0078 R 


GOOF 


D1 


E6 


0011 


SB 


94 0008 R 


0015 


OB 


02 


0017 


74 


OC 


0019 


OA 


E4 


001B 


74 


OE 


001D 


FE 


CC 


001 F 


74 


54 


0021 


FE 


CC 


0023 


74 


3C 


0025 






0025 


5B 




0026 


59 




0027 


5E 




0028 


5A 




0029 


IF 




002A 


CF 




002B 






002B 


50 




0020 


EE 




002D 


42 




002E 


53 




002 F 


EC 




0030 


A8 


80 


0032 


75 


05 


0034 


B8 


90FE 


0037 


CD 


15 


0039 






0039 


2A 


FF 


003B 


Dl 


03 


003D 


Dl 


03 



003 F 


?B 


C9 




0041 


FC 






0042 


8A 


FO 




0044 


AB 


80 




0046 


75 


OL 




0048 


F? 


H 




004A 


4B 






004B 


75 


F2 




004D 


5B 






004E 


80 


CC 


01 


0051 


80 


F4 


F9 


0054 


FB 


1/ 




0056 


5B 






0057 


BO 


OD 




0059 


4? 






005A 


tt 






005B 


BO 


OC 




005D 


EB 


00 




005F 


EE 






0060 


58 






0061 








0061 


50 






0062 








0062 


8B 


94 


0008 R 



PRINTER 10 1 


PROC FAR 


STI 




PUSH 


DS 


PUSH 


DX 


PUSH 


SI 


PUSH 


CX 


PUSH 


BX 


CALL 


DOS 


MOV 


SI,DX 


MOV 


BL, PRINT TIM OUT[ 


SHL 


Sl,1 


MOV 


DX, PRINTER BASE[S 


OR 


DX, DX 


JZ 


B1 


OR 


AH, AH 



POP 
POP 
POP 
POP 
POP 



PRINT THE CHARACTER IN (AL) 



ENTRY POINT FOR ORG 0EFD2H 
INTERRUPTS BACK ON 
SAVE SEGMENT 



GET PRINTER PARM 
LOAD TIMEOUT VALUE 
WORD OFFSET INTO TABLE 
GET BASE ADDRESS FOR PRINTER CARD 
TEST DX FOR ZERO, INDICATING NO PRINTE 
RETURN 

TEST FOR (AH)=0 
PRINT_AL 
TEST FOR (AH)=1 
INIT_PRT 
TEST FOR (AH)=2 
PRINTER STATUS 
RETURN 



RECOVER REGISTERS 
RECOVER REGISTERS 



- CHECK FOR PRINTER BUSY 

PUSH BX 

IN AL,DX 

TEST AL,80H 

JNZ B2_A 



INT 15 DEVICE BUSY 



SAVE VALUE TO PRINT 
OUTPUT CHAR TO PORT 
POINT TO STATUS PORT 



GET STATUS 

IS THE PRINTER CURRENTLY BUSY 

OUT_STROBE 



FUNCTION 90 PRINTER ID 



B2 A: 


--ADJUST 


GUTTER L 




SUB 


BH.BH 




RCL 


BX,1 




RCL 


BX,1 




-WAIT BUSY 


B3: 


SUB 


CX,CX 


B3 1: 


IN 


AL, DX 




MOV 


AH,AL 




TEST 


AL,80H 




JNZ 


B4 




LOOP 


B3 1 




DEC 


BX 




JNZ 


B3 



AND 


AH,0F9H 


JMP 


SHORT B7 


POP 


BX 


MOV 


AL,0DH 


INC 


DX 


OUT 


DX,AL 


MOV 


AL,0CH 


JMP 


SHORT $+2 


OUT 


DX.AL 


POP 


AX 



INNER LOOP (64K) 

GET STATUS 

STATUS TO AH ALSO 

IS THE PRINTER CURRENTLY BUSY 

OUT_STROBE 

LOOP IF NOT 

DROP OUTER LOOP COUNT 

MAKE ANOTHER PASS I F NOT ZERO 

RESTORE BX 



SET ERROR FLAG 

TURN OFF THE UNUSED BITS 

RETURN WITH ERROR FLAG SET 

RESTORE BX 

OUT_STROBE 

SET THE STROBE HIGH 



RECOVER THE OUTPUT CHAR 



PRINTER STATUS 



PUSH 
MOV 



AX ; SAVE AL REG 

DX, PRINTER_BASE[SI ] 



Printer 5-123 



0066 


^2 




0067 


EC 




0068 


8A 


EO 


006A 


80 


£4 F8 


006D 






006D 


5A 




006E 


8A 


C2 


0070 


80 


F4 ka 


0073 


EB 


BO 


0075 






0075 


50 




0076 


i|2 




0077 


42 




0078 


BO 


08 


007A 


EE 




007B 


88 


OFAO 


007E 






007E 


48 




007F 


75 


FD 


0081 


BO 


OC 


0083 


EE 




008U 


EB 


DC 


0086 






0086 







MOV 


AH,AL 


AND 


AH,0F8I 


POP 


DX 


MOV 


AL,DL 


XOR 


AH.I48H 


JMP 
INITIO 


B1 
VLIZE THE 



MOV 


AL,8 


OUT 


DX,AL 


MOV 


AX, 1000*U 


DEC 


AX 


JNZ 


B9 


MOV 


AL,OCH 


OUT 


DX,AL 


JMP 


B6 


PRINTER 10 1 


ENDP 


"CODE 


ENDS 




END 



; GET PRINTER STATUS 

; TURN OFF UNUSED BITS 

; STATUS_SET 

; RECOVER AL REG 

; GET CHARACTER INTO AL 

; FLIP A COUPLE OF BITS 

; RETURN FROM ROUTINE 



; SET IN IT LINE LOW 



I N I T_L0OP 

LOOP FOR RESET TO TAKE 

INIT_L0OP 

NO INTERRUPTS, NON AUTO LF, I N I T H I GH 

PRT_STATUS_1 



5-124 Printer 



TITLE DATE 07/06/83 RS232 

.LIST 

INCLUDE SEGMENT. SRC 

CODE SEGMENT BYTE PUBLIC 

EXTRN DDS:NEAR 
EXTRN AT: NEAR 
PUBLIC RS232_I0_1 



THIS ROUTINE PROVIDES BYTE STREAM I/O TO THE COMMUNICATIONS 
PORT ACCORDING TO THE PARAMETERS: 
(AH)=0 INITIALIZE THE COMMUNICATIONS PORT 
(AL) HAS PARMS FOR INITIALIZATION 



BAUD RATE 



-PARITY-- 



STOPBIT --WORD LENGTH-- 



(DX) : 



000 - no XO - NONE 0-1 10-7 BITS 

001 - 150 01 - ODD 1-2 11-8 BITS 
010 - 300 1 1 - EVEN 

Oil - 600 

100 - 1200 

101 - 2*400 
no - U800 
m - 9600 

ON RETURN, CONDITIONS SET AS IN CALL TO COMMO STATUS (AH=3) 

SEND THE CHARACTER IN (AL) OVER THE COMMO LINE 

(AL) REGISILR IS PRESERVED 

ON EXIT, BIT 7 OF AH IS SET IF THE ROUTINE WAS UNABLE TO 

TO TRANSMIT THE BYTE OF DATA OVER THE LINE. 

IF BIT 7 OF AH IS NOT SET, THE 

REMAINDER OF AH IS SET AS I N A STATUS REQUEST, 

REFELECTING THE CURRENT STATUS OF THF I INE. 
RECEIVE A CHARACTER IN (AL) FROM COMMO LINE BEFORE 

RETURNING TO CALLER 
ON EXIT, AH HAS THE CURRENT LINE STATUS, AS SET BY THE 

THE STATUS ROUTINE, EXCEPT THAT THE ONLY BITS 

LEFT ON ARE THE ERROR BITS (7,4,3,2,1) 

IF AH HAS BIT 7 ON (TIME OUT) THE REMAINING 

BITS ARE NOT PREDICTABLE. 

THUS, AH IS NON ZERO ONLY WHEN AN ERROR OCCURRED. 
RETURN THE COMMO PORT STATUS IN (AX) 
AH CONTAINS THE LINE CONTROL STATUS 
BIT 7 = TIME OUT 

BIT 6 = TRANS SHIFT REGISTER EMPTY 
BIT 5 = TRAN HOLDING REGISTER EMPTY 
BIT U = BREAK DETECT 
BIT 3 = FRAMING ERROR 
BIT 2 = PARITY ERROR 
BIT 1 = OVERRUN ERROR 
BIT = DATA READY 
AL CONTAINS THE MODEM STATUS 
BIT 7 = RECEVED LINE SIGNAL DETECT 
BIT 6 = RING INDICATOR 
BIT 5 = DATA SET READY 
BIT i+ = CLEAR TO SEND 

BIT 3 = DELTA RECEIVE LINE SIGNAL DETECT 
BIT 2 = TRAILING EDGE RING DETECTOR 
BIT 1 = DELTA DATA SET READY 
BIT - DELTA CLEAR TO SEND 

PARAMETER INDICATING WHICH RS232 CARD (0,1 ALLOWED) 



DATA AREA RS232_BASE CONTAINS THE BASE ADDRESS OF THE 8250 ON THE CARD 
LOCATION UOOH CONTAINS UP TO U RS232 ADDRESSES POSSIBLE 
DATA AREA LABLE RS232_T I M_OUT (BYTE) CONTAINS OUTER LOOP COUNT 
VALUE FOR TIMEOUT (DEFAULT=1) 
;OUTPUT 

AX MODIFIED ACCORDING TO PARMS OF CALL 
Al I OTHERS UNCHANGED 



ASSUME CS:CODE.DS:DATA 



RS232_IO_1 



VECTOR TO APPROPRIATE ROUTINE 



0000 


FB 




0001 


IE 




0002 


52 




0003 


56 




0004 


57 




0005 


51 




0006 


53 




0007 


8B 


F2 


0009 


8B 


FA 


OOOB 


01 


E6 


OOOD 


E8 


0000 E 


0010 


8B 


94 0000 R 


0014 


OB 


D2 


0016 


74 


13 


0018 


OA 


E4 


OOIA 


74 


16 


001C 


FE 


CC 


001 E 


74 


4B 


0020 


FE 


CC 


0022 


74 


70 


0024 






0024 


FE 


CC 


0026 


75 


03 


0028 


E9 


00B6 R 


002B 






002B 


5B 




002C 


59 




002D 


5F 




002E 


5E 




002F 


5A 




0030 


IF 




0031 


CF 




0032 






0032 


8A 


EO 


0034 


83 


C2 03 


0037 


BO 


80 


0039 


EE 




003A 


8A 


D4 


003C 


B1 


Oil 


003E 


D2 


C2 


0040 


81 


t2 OOOE 



PUSH 


DS 


PUSH 


DX 


PUSH 


SI 


PUSH 


Dl 


PUSH 


CX 


PUSH 


BX 


MOV 


SI,DX 


MOV 


DI.DX 


SHL 


Sl,1 


CALL 


DOS 


MOV 


DX,RS232 BASE[S 


OR 


DX,DX 



RS232 VALUE TO SI 

AND TO Dl (FOR TIMEOUTS) 

WORD OFFSET 

GET BASE ADDRESS 

TEST FOR BASE ADDRESS 

RETURN 

TEST FOR (AH)=0 

COMMUN I N I T 

TEST FOR (AH)=1 

SEND AL 

TEST FOR (AH)=2 

RFCEIVE INTO AL 

TEST FOR (AH)=3 



JMP A18 

POP BX 

POP CX 

POP Dl 

POP SI 

POP DX 

POP DS 
I RET 

INITIALIZE THE COMMUNICATIONS PORT 



RETURN TO CALLER, NO ACTION 



MOV AH,AL 

ADD DX,3 

MOV AL,80H 

OUT DX,AL 

■ DETERMINE BAUD RATE or 



MOV 
MOV 
ROL 
AND 



DL,AH 
CL,4 
DL,CL 
DX.OEH 



SET DLAB=1 



GET PARMS TO DL 



ISOLATE THEM 



RS232 5-125 



004U 


BF 


0000 E 


0047 


03 


FA 


00U9 


88 


94 0000 R 


004D 


42 




GOUE 


2E 


8A 45 01 


0052 


EE 




0053 


4A 




005U 


EB 


00 


0056 


2E 


8A 05 


0059 


EE 




005A 


83 


C2 03 


005D 


8A 


04 


005F 


24 


IF 


0061 


FE 




0062 


4A 




0063 


4A 




006U 


EB 


00 


0066 


BO 


00 


0068 


EE 




0069 


EB 


4B 


006B 






006B 


50 




006C 


83 


C2 04 


006 F 


BO 


03 


0071 


EE 




0072 


42 




0073 


42 




0074 


B7 


30 


0076 


E8 


00C5 R 


0079 


74 


08 


007B 






007B 


59 




007C 


8A 


01 


007E 






007E 


80 


CC 80 


0081 


EB 


A8 


0083 






0083 


4A 




0084 






0084 


B7 


20 


0086 


E8 


0005 R 


0089 


75 


FO 


008B 






008B 


83 


EA 05 


008E 


59 




008 F 


8A 


CI 


0091 


EE 




0092 


EB 


97 


0094 






0094 


83 


02 04 


0097 


BO 


01 


0099 


EE 




009A 


42 




009B 


42 




009C 






009C 


B7 


20 


009E 


E8 


0005 R 


OOAl 


75 


DB 


00A3 






00A3 


4A 




00A4 






00A4 


B7 


01 


00A6 


E8 


0005 R 


00A9 


75 


D3 


OOAB 






OOAB 


80 


E4 IE 


OOAE 


8B 


94 0000 R 


00B2 


EC 




00B3 


E9 


002B R 


00B6 






00B6 


8B 


94 0000 R 


OOBA 


83 


02 05 


OOBD 


EC 




OOBE 


8A 


EO 


OOCO 


42 




OOCl 


EC 




00C2 


E9 


002B R 



MOV 


Dt, OFFSET A1 


ADD 


D1,DX 


MOV 


DX.RS232 BASE[SI ] 


INC 


DX 


MOV 


AL,CS:[DI ]-t-1 


OUT 


DX,AL 


DEO 


DX 


JMP 


SHORT S+2 


MOV 


AL.CS:[DI ] 


OUT 


DX,AL 


ADD 


DX,3 


MOV 


AL,AH 


AND 


AL,01FH 


OUT 


DX,AL 


DEO 


DX 


DEO 


DX 


JMP 


SHORT $+2 


MOV 


AL,0 


OUT 


DX,AL 


JMP 


5H0KI A18 



BASE OF TABLE 

PUT INTO INDEX REGISTER 

POINT TO HIGH ORDER OF DIVISOR 



10 DELAY 

GET LOW ORDER OF DIVISOR 
SET LOW OF DIVISOR 

GET PARMS BACK 

STRIP OFF THE BAUD BITS 

1 INF CONTROI TO 8 BITS 



SEND CHARACTER IN (AL) OVER OOMMO LINE 



PUSH 


AX 


ADO 


DX,4 


MOV 


AL,3 


OUT 


DX,AL 


INO 


DX 


INC 


DX 


MOV 


BH,30H 


CALL 


WAIT FOR STATUS 


JE 


A9 


POP 


OX 


MOV 


AL, CL 



MOV 


BH.20H 


CALL 


WAIT FOR STATUS 


JNZ 


A7 


SUB 


DX,5 


POP 


OX 


MOV 


AL,CL 


OUT 


DX,AL 


JMP 


A3 



SAVE CHAR TO SEND 

MODEM CONTROL REGISTER 

DTR AND RTS 

DATA TERMINAL READY, REQUEST TO SEND 

MODEM STATUS REGISTER 

DATA SET READY & CLEAR TO SEND 

ARE BOTH TRUE 

YES, READY TO TRANSMIT CHAR 



RELOAD DATA BYTE 



CLEAR_TO_SEN0 

LINE STATUS REGISTER 

WAIT_SEND 

IS TRANSMITTER READY 

TEST FOR TRANSMITTER READU 

RETURN WITH TIME OUT SET 

OUT_CHAR 

DATA PORT 

RECOVER IN OX TEMPORARILY 

MOVE CHAR TO AL FOR OUT, STATUS IN AH 

OUTPUT CHARACTER 

RETURN 



RECEIVE CHARACTER FROM COMMO LINE 



ADD 
MOV 
OUT 
INC 
INC 


DX,4 
AL, 1 
DX,AL 
DX 
DX 


MOV 
CALL 
JNZ 


BH,20H 

WAIT FOR STATUS 

A8 


DEC 


DX 


MOV 
CALL 
JNZ 


BH,1 

WAIT FOR STATUS 

A8 


AND 
MOV 
IN 


AH, 0001 11108 
DX,RS232 BASE[S 
AL,DX 



COMMO PORT STATUS ROUTINE 



DX, RS232_BASE[SI ] 

DX,5 

AL,DX 

AH,AL 



JMP 



A3 



MODEM STATUS REGISTER 

WA I T_DSR 

DATA SET READY 

TEST FOR DSR 

RETURN WITH ERROR 

WAIT_DSR_ENO 

LINE STATUS REGISTER 

WAIT_RECV 

RECEIVE BUFFER FULL 

TEST FOR REG. BUFF. FULL 

SET TIME OUT ERROR 

OET_OHAR 

TEST FOR ERROR CONDITIONS ON REOV CHAR 

DATA PORT 

GET CHARACTER FROM LINE 

RETURN 



CONTROL PORT 

GET LINE CONTROL STATUS 

PUT IN AH FOR RETURN 

POINT TO MODEM STATUS REGISTER 

GET MODEM CONTROL STATUS 

RETURN 



WAIT FOR STATUS ROUTINE 
BH=STATUS BIT(S) TO LOOK FOR, 
OX=ADDR. OF STATUS REG 
ZERO FLAG ON = STATUS FOUND 
ZERO FLAG OFF = TIMEOUT. 
AH=LAST STATUS READ 



;LOAD OUTER LOOP COUNT 



0009 


55 




OOCA 


^^ 




OOCB 


5D 




OOCO 


«1 


E5 OOFF 


OODO 


01 


D5 


00D2 


Dl 


D5 


00D4 


?B 


09 


0006 


EO 




00D7 


8A 


EO 


00D9 


22 


C7 


OODB 


3 A 


07 


OODO 


74 


07 


OODF 


h2 


F5 


O0E1 


4D 




00E2 


75 


FO 


00E4 


OA 


FF 


00E6 






00E6 


5D 




00E7 


C3 




00E8 






00E8 











GUTTER LOO 
BP 




PUSH 




PUSH 


BX 




POP 


BP 




AND 


BP,OOFFH 




RCL 


BP, 1 




RCL 


BP, 1 


WFSO: 


SUB 


CX,CX 


WFS1: 


IN 


AL.DX 




MOV 


AH,AL 




AND 


AL,BH 




CMP 


AL.BH 




JE 


WFS END 




1 OOP 


WFS1 




DEC 


BP 




JNZ 


WFSO 




OR 


BH,BH 


WFS END: 






POP 


BP 




RET 




WAIT 


FOR STATUS ENDP 


RS232 


10 1 


ENDP 



SAVE BP 

SAVE BX 

USE BP FOR GUTTER LOOP COUNT 
STRIP HIGH BITS 
MULT GUTTER BY 4 



;GET STATUS 

MOVE TO AH 
; ISOLATE BITS TO TEST 
;EXAGTLY = TO MASK 
;RETURN WITH ZERO FLAG ON 
;TRY AGAIN 



;SET ZERO FLAG OFF 
; RESTORE BP 



5-126 RS232 



TITLE 08/18/83 VIDEO! 



are postequ.src, dseg.src 



EXTRN 
EXTRN 
EXTRN 



DDS:NEAR 

M5:W0RD 

M6:BYTE 

M7:BYTE 

CRT_CHAR_GEN:NEAR 

BEEP: NEAR 



(AH)=0 SET MODE (AL) CONTAINS MODE VALUE 
(AL)=0 40X25 BW (POWER ON DEFAULT) 
(AL)=1 40X25 COLOR 
(AL)=2 80X25 BW 
(AL)=3 80X25 COLOR 
GRAPHICS MODES 
(AL)='t 320X200 COLOR 
(AL)=5 320X200 BW 
(AL)=6 640X200 BW 

CRT MODE = 7 80X25 B&W CARD (USED INTERNAL TO VIDEO ONLY) 
*** NOTES -BW MODES OPERATE SAME AS COLOR MODES, BUT COLOR 
BURST IS NOT ENABLED 
-CURSOR IS NOT DISPLAYED IN GRAPHICS MODE 
(AH)=1 SET CURSOR TYPE 

(CM) = BITS U-O = START LINE FOR CURSOR 

»* HARDWARE WILL ALWAYS CAUSE BLINK 
**■ SETTING BIT 5 OR 6 WILL CAUSE ERRATIC BLINKING 
OR NO CURSOR AT ALL 
(CL) = BITS 4-0 = END LINE FOR CURSOR 
(All) = 2 SET CURSOR POSITION 

(DH,DL) = ROW, COLUMN (0,0) IS UPPER LEFT 
(BH) = PAGE NUMBER (MUST BE FOR GRAPHICS MODES) 
(AH)=3 READ CURSOR POSITION 

(BH) = PAGE NUMBER (MUST BE FOR GRAPHICS MODES) 
ON EXIT (DH.DL) = ROW, COLUMN OF CURRENT CURSOR 
(CH,CL) = CURSOR MODE CURRENTLY SET 
(AH)=4 READ LIGHT PEN POSITION 
ON EXIT: 

(AH) = -- LIGHT PEN SWITCH NOT DOWN/NOT TRIGGERED 
(AH) = 1 -- VALID LIGHT PEN VALUE IN REGISTERS 

(DH, DL) = ROW, COLUMN Of CHARACTER LP POSN 
(CH) = RASTER LINE (0-199) 
(BX) = PIXEL COLUMN (0-319,639) 
(AH)=5 SELECT ACTIVE DISPLAY PAGE (VALID ONLY FOR ALPHA MODES) 

(AL) = NEW PAGE VALUE (0-7 FOR MODES 0&1 , 0-3 FOR MODES 2&3 ) 
(AH) =6 SCROLL ACTIVE PAGE UP 

(AL) = NUMBER OF LINES, INPUT LINES BLANKED AT BOTTOM OF WINDOW 

AL = MEANS BLANK ENTIRE WINDOW 
(CH.CL) = ROW, COLUMN OF UPPER LEFT CORNER OF SCROLL 
(DH,DL) = ROW, COLUMN OF LOWER RIGHT CORNER OF SCROLL 
(BH) = ATTRIBUTE TO BE USED ON BLANK LINE 
(AH) =7 SCROLL ACTIVE PAGE DOWN 

(AL) = NUMBER OF LINES, INPUT LINES BLANKED AT TOP OF WINDOW 

AL = MEANS BLANK ENTIRE WINDOW 
(CH,CL) = ROW, COLUMN OF UPPER LEFT CORNER OF SCROLL 
(DH,DL) = ROW, COLUMN OF LOWER RIGHT CORNER OF SCROLL 
(BH) = ATTRIBUTE TO BC USED ON BLANK LINE 

CHARACTER HANDLING ROUTINES 



(AH) : 



(AH) : 



(AH) : 



8 READ ATTRIBUTE/CHARACTER AT CURRENT CURSOR POSITION 
(BH) = DISPLAY PAGE (VALID FOR ALPHA MODES ONLY) 
ON EXIT: 

(AL) = CHAR READ 

(AH) = ATTRIBUTE OF CHARACTER READ (ALPHA MODES ONLY) 
: 9 WRITE ATTRIBUTE/CHARACTER AT CURRENT CURSOR POSITION 
(BH) = DISPLAY PAGE (VALID FOR ALPHA MODES ONLY) 
(CX) = COUNT OF CHARACTERS- TO WRITE 
(AL) = CHAR TO WRITE 

(BL) = ATTRIBUTE OF CHARACTER ( ALPHA)/COLOR OF CHAR (GRAPHICS) 
SEE NOTE ON WRITE DOT FOR BIT 7 OF BL = 1. 
: 10 WRITE CHARACTER ONLY AT CURRENT CURSOR POSITION 
(8H) = DISPLAY PAGE (VALID FOR ALPHA MODES ONLY) 
(CX) = COUNT OF CHARACTERS TO WRITE 
(AL) = CHAR TO WRITE 

FOR READ/WRITE CHARACTER INTERFACE WHILE IN GRAPHICS MODE, THE 
CHARACTERS ARE FORMED FROM A CHARACTER GENERATOR IMAGE 
MAINTAINED IN THE SYSTEM ROM. ONLY THE 1ST 128 CHARS 
ARE CONTAINED THERE. TO READ/WRITE THE SECOND 128 CHARS, 
THE USER MUST INITIALIZE THE POINTER AT INTERRUPT 1 FH 
(LOCATION 0007CH) TO POINT TO THE IK BYTE TABLE CONTAINING 
THE CODE POINTS FOR THE SECOND 128 CHARS (128-255). 

FOR WRITE CHARACTER INTERFACE IN GRAPHICS MODE, THE REPLICATION FACTOR 
CONTAINED IN (CX) ON ENTRY WILL PRODUCE VALID RESULTS ONLY 
FOR CHARACTERS CONTAINED ON THE SAME ROW. CONTINUATION TO 
SUCCEEDING LINES WILL NOT PRODUCE CORRECTLY. 

GRAPHICS INTERFACE 

(AH) = n SET COLOR PALETTE 

(BH) = PALLETTE COLOR ID BEING SET (0-127) 

(BL) = COLOR VALUE TO BE USED WITH THAT COLOR ID 

NOTE: FOR THE CURRENT COLOR CARD, THIS ENTRY POINT HAS 
MEANING ONLY FOR 320X200 GRAPHICS. 
COLOR ID = SELECTS THE BACKGROUND COLOR (0-15) 
COLOR ID = 1 SELECTS THE PALLETTE TO BE USED: 

= GREEN(1 )/RED(2)/YELLOW(3) 

1 = CYAN(1 )/MAGENTA(2)/WHITE(3) 

IN 40X25 OR 80X25 ALPHA MODES, THE VALUE SET FOR 

PALLETTE COLOR INDICATES THE BORDER COLOR 
TO BE USED (VALUES 0-31, WHERE 16-31 SELECT THE 
HIGH INTENSITY BACKGROUND SET. 
(AH) = 12 WRITE DOT 

(DX) = ROW NUMBER 
(CX) = COLUMN NUMBER 
(AL) =- COLOR VALUE 

I F BIT 7 OF AL = 1, THEN THE COLOR VALUE IS EXCLUSIVE 
OR'D WITH THE CURRENT CONTENTS OF THE DOT 
(AH) = 13 READ DOT 

(DX) = ROW NUMBER 

(CX) = COLUMN NUMBER 

(AL) RETURNS THE DOT READ 



Video 5-127 



ASCII TELETYPE ROUTINE FOR OUTPUT 

(AH) = 14 WRITE TELETYPE TO ACTIVE PAGE 
(AL) == CHAR TO WRITE 

(BL) = FOREGROUND COLOR IN GRAPHICS MODE 
NOTE -- SCREEN WIDTH IS CONTROLLED BY PREVIOUS MODE SET 

(AH) = 15 CURRENT VIDEO STATE 

RETURNS THE CURRENT VIDEO STATE 

(AL) = MODE CURRENTLY SET ( SEE AH=0 FOR EXPLANATION) 

(AH) = NUMBER OF CHARACTER COLUMNS ON SCREEN 

(BH) = CURRENT ACTIVE DISPLAY PAGE 

(AH) = 15 RESERVED 
(AH) = 17 RESERVED 
(AH) = 18 RESERVED 

(AH) = 19 WRITE STRING 

ES:BP - POINTER TO STRING TO BE WRITTEN 

CX - LENGTH OF CHARACER STRING TO WRITTEN 

DX - CURSOR POSITION FOR STRING TO BE WRITTEN 

BH - PAGE NUMBER 



(AL) 
(AL) 



BL - ATTRIBUTE 
STRING IS 1 CHAR, CHAR, 
CURSOR NOT MOVED 

BL - ATTRIBUTE 
STRING IS J CHAR, CHAR, 
CURSOR IS MOVED 



,CHAR,ATTRl 



,CHAR,ATTR? 



0000 




0000 


0071 R 


0002 


01 4D R 


OOOU 


0174 R 


0006 


019E R 


0008 


07DF R 


OOOA 


01B5 R 


OOOC 


0222 R 


OOOE 


02C6 R 


0010 


0318 R 


0012 


035E R 


001 U 


0391 R 


0016 


0109 R 


0018 


046 F R 


001A 


045E R 


001C 


075B R 


001 E 


01 FF R 


0020 


0144 R 


0022 


0144 R 


0024 


0144 R 


0026 


03C3 R 


= 0028 


0028 




0028 


FB 


0029 


FC 


002A 


06 


002B 


IE 


002C 


52 


002D 


51 


002E 


53 


002 F 


56 


0030 


57 


0031 


55 


0032 


50 


0033 


8A C4 


0035 


32 E4 


0037 


D1 EO 


0039 


8B FO 


003B 


3D 0028 


003E 


72 04 


0040 


58 


0041 


E9 0144 R 


0044 




0044 


E8 0000 E 


0047 


88 B800 


004A 


8B 3E 0010 R 


004E 


81 E7 0030 


0052 


83 FF 30 


0055 


75 02 


0057 


84 80 


0059 


8E CO 


005B 


58 


0050 


80 FC 13 


005 F 


75 07 


0061 


55 


0062 


8B EC 


0064 


8E 46 10 



ASSUME CS: CODE, DS: DATA, ES: V I DE0_RAM 

PUBLIC SET_M0DE 
PUBLIC SET_CTYPE 
PUBLIC SCT_CPOS 
PUBLIC READ_CURSOR 
PUBLIC REAO_LPEN 
PUBLIC ACT_DISP_PAGE 
PUBLIC SCROLL_UP 
PUBLIC SCROLL_DOWN 
PUBLIC READ_AC_CURRENT 
PUBLIC WRITE_AC_CURRENT 
PUBLIC WRITE_C_CURRENT 
PUBLIC SET_COLOR 
PUBLIC WRITE_DOT 
PUBLIC READ_DOT 
PUBLIC WRITE_TTY 
PUBLIC VIDEO_STATE 
Ml LABEL WORD 



DW 
DW 



OFFSET 

orrscT 

OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
OFFSET 
$-Ml 



3ET_CTYPE 

SET_CPOS 

READ_CURSOR 

READ_LPEN 

ACT_DISP_PAGE 

SCROLL_UP 

SCROLL_DOWN 

READ_AC_CURRENT 

WRITE_AC_CURRENT 

WRITE_C_CURRENT 

SET_COLOR 

WRITE_DOT 

READ_DOT 

WRITE_TTY 

VIDEO_STATE 

VIDEO_RETURN 

VIDEO_RETURN 

VIDEO_RETURN 

WRITE_STRING 



STI 




CLD 




PUSH 


ES 


PUSH 


DS ; 


PUSH 


DX 


PUSH 


CX 


PUSH 


BX 


PUSH 


SI 


PUSH 


Dl 


PUSH 


BP 


PUSH 


AX ; 


MOV 


AL,AH ; 


XOR 


AH, AH ; 


SAL 


AX.l : 


MOV 


S 1 , AX ; 


CMP 


AX, MIL ; 


JB 


M2 ; 


POP 


AX ; 


JMP 


VIDEO_RETURN 


CALL 


DOS 


MOV 


AX,0B80OH ; 


MOV 


DI,EQUI P FLAG 


AND 


DI,30H 


CMP 


DI,30H ; 


JNE 


M3 


MOV 


AH,0B0H ; 


MOV 


ES,AX ; 


POP 


AX ; 


CMP 


AH,13H ; 


JNE 


MM3 ; 


PUSH 


BP ; 


MOV 


8P,SP ; 


MOV 


ES,[BP1.ES POS ; 



ENTRY POINT FOR ORG 0F065H 
INTERRUPTS BACK ON 
SET DIRECTION FORWARD 

SAVE SEGMENT REGISTERS 



SAVE AX VALUE 
GET INTO LOW BYTE 
ZERO TO HIGH BYTE 
*2 FOR TABLE LOOKUP 
PUT INTO SI FOR BRANCH 
TEST FOR WITHIN RANGE 
BRANCH AROUND BRANCH 
THROW AWAY THE PARAMETER 

; DO NOTHING I F NOT IN RANGE 



SEGMENT FOR COLOR CARD 
GET EQUIPMENT SETTING 
ISOLATE CRT SWITCHES 
IS SETTING FOR BW CARD? 

SEGMENT FOR BW CARD 

SET UP TO POINT AT VIDEO RAM AREAS 

RECOVER VALUE 



TEST FOR WRITE STRING OP 



5-128 Video 



0067 


5D 




POP 


0068 




MM3: 




0068 


8A 26 0049 R 




MOV 


006C 


2E: FF Ah 0000 R 




JMP 


0071 




VIDEO_ 


10 1 



AH,CRT_MODE ; GET CURRENT MODE INTO AH 

WORD PTR CS: [Sl+OFFSET Ml] 

ENDP 



SET MODE 

~ THIS ROUTINE INITIALIZES THE ATTACHMENT TO 

THE SELECTED MODE. THE SCREEN IS BLANKED. 
INPUT 

(AL) = MODE SELECTED (RANGE 0-9) 
OUTPUT 

NONE 



0071 








0071 


BA 


03D4 


007U 


B3 


00 




0076 


83 


FF 


30 


0079 


75 


07 




007B 


BO 


07 




007D 


BA 


03B4 


0080 


FE 


03 




0082 


8A 


EO 




0084 


A2 


0049 R 


0087 


89 


16 


0063 R 


008B 


IE 






008C 


50 






008D 


52 






008E 


83 


C2 


04 


O091 


8A 


03 




0093 


EE 






009U 


5A 






0095 


28 


CO 




0097 


8E 


D8 




0099 


05 


IE 


0074 R 


0090 


58 






009E 


B9 


0010 


O0A1 


80 


FC 


02 


OOAU 


72 


10 




00A6 


03 


D9 




00A8 


80 


FC 


04 


OOAB 


72 


09 




OOAD 


03 


D9 




OOAF 


80 


FC 


07 


00B2 


72 


02 




00B4 


03 


D9 




0086 








00B6 


50 






00B7 


06 






00B8 


33 


CO 




00 BA 


8E 


CO 




ODBC 


8B 


47 


OA 


OOBF 


86 


EO 




00C1 


26 


A3 


0460 


00C5 


07 






00C6 


32 


E4 




00C8 








00C8 


8A 


C4 




OOCA 


EE 






OOCB 


42 






OOCC 


FE 


C4 




OOCE 


8A 


07 




OODO 


EE 






00D1 


43 






0OD2 


4A 






00D3 


t2 


F3 




00D5 


58 






00D6 


IF 







SET. 


MODE 


PROC NEAR 




MOV 


DX,03D4H 




MOV 


BL,0 




CMP 


DI.30H 




JNE 


M8 




MOV 


AL,7 




MOV 


DX.03B4H 




INC 


BL 


M8: 


MOV 


AH,AL 




MOV 


CRT MODE.AL 




MOV 


ADDR 6845, DX 




PUSH 


OS ~ 




PUSH 






PUSH 


DX 




ADD 


DX,4 




MOV 


AL,BL 




OUT 


DX,AL 




POP 


DX 




SUB 


AX, AX 




MOV 


OS, AX 




ASSUME 


DS:ABSO 




LDS 


BX, PARM PTR 




POP 


AX 




ASSUME 


DS:CODE 




MOV 


CX, M4 




CMP 


AH, 2 




JC 


M9 




ADD 


BX,CX 




CMP 


AH,U 




JC 


M9 




ADD 


BX,CX 




CMP 


AH, 7 




JC 


M9 




ADD 
— - BX POINT 


BX.CX 
S TO CORRECT 



ADDRESS OF COLOR CARD 
MODE SET FOR COLOR CARD 
IS BW CARD INSTALLED 
OK WITH COLOR 
INDICATE BW CARD MODE 
ADDRESS OF BW CARD 
MODE SET FOR BW CARD 

SAVE MODE IN AH 

SAVE IN GLOBAL VARIABLE 

SAVE ADDRESS OF BASE 

SAVE POINTER TO DATA SEGMENT 

SAVE MODE 

SAVE OUTPUT PORT VALUE 

POINT TO CONTROL REGISTER 

GET MODE SET FOR CARD 

RESET VIDEO 

BACK TO BASE REGISTER 

SET UP FOR ABSO SEGMENT 

ESTABLISH VECTOR TABLE ADDRESSING 



LENGTH OF EACH ROW OF TABLE 
DETERMINE WHICH ONE TO USE 

; MODE I S OR 1 

; MOVE TO NEXT ROW OF IN 



PUSH 

PUSH 

XOR 

MOV 

MOV 

XCHG 

ASSUME 

MOV 

ASSUME 

POP 

XOR 



ES 

AX, AX 

ES,AX 

AX, WORD PTR [BX+10] 

AH,AL 

ES:ABSO 

ESrWORD PTR DATA_AREA[ CURSOR_MODE-DATA] , AX 

ES:VIDEO_RAM 

ES ; RESTORE THE SCREEN BUFFER 



AH, AH 



00D7 


33 


FF 


00D9 


89 


3E 004E R 


OODD 


C6 


06 0062 R 00 


00 E2 


89 


2000 


00E5 


80 


FC 04 


00 E8 


72 


OB 


00 EA 


80 


FC 07 


OOED 


74 


04 


OOEF 


33 


CO 


0OF1 


EB 


05 


00F3 






OOFS 


B5 


08 


00F5 






00F5 


88 


0720 


OOFS 






0OF8 


F3/ AB 


OOFA 


AO 


0049 R 


OOFD 


32 


E4 


OOFF 


8B 


FO 


0101 


8B 


16 0063 R 


0105 


83 


C2 04 


0108 


2E 


8A 84 0000 


010D 


EE 




010E 


A2 


0065 R 



M10: 


- LOOP THf 


lOUGH TABLE, OUTPUTT 




MOV 


AL.AH 




OUT 


DX,AL 




INC 


DX 




INC 


AH 




MOV 


AL, [BX] 




OUT 


DX,AL 




INC 


BX 




DEC 


DX 




LOOP 


M10 




POP 


AX 




POP 


DS 




ASSUME 


DS;DATA 




— FILL REGEN AREA WITH BLANK 




XOR 


DI,DI 




MOV 


CRT START, 01 




MOV 


ACTIVE PAGE,0 




MOV 


CX,8192 




CMP 


AH, 4 




JC 


M12 




CMP 


AH, 7 




JE 


Mil 




XOR 


AX, AX 




JMP 


SHORT Ml 3 


Mil: 








MOV 


CH,08H 


M12: 








MOV 


AX, ' ' +7*256 


M13: 








REP 
- ENABLE V 


STOSW 
MDEO AND CORRECT PO 



MOV AL,CRT_MODE 

XOR AH, AH 

MOV SI, AX 

MOV DX,ADDR_6845 

ADD DX,4 



SEGMENT 

AH WILL SERVE AS REGISTER NUMBER DURING LOOP 
TING REG ADDRESS, THEN VALUE FROM TABLE 



POINT TO DATA PORT 

NEXT REGISTER VALUE 

GET TABLE VALUE 

OUT TO CHIP 

NEXT IN TABLE 

BACK TO POINTER REGISTER 

DO THE WHOLE TABLE 

GET MODE BACK 

RECOVER SEGMENT VALUE 



SET UP POINTER FOR REGEN 

START ADDRESS SAVED IN GLOBAL 

SET PAGE VALUE 

NUMBER OF WORDS IN COLOR CARD 

TEST FOR GRAPHICS 

NO_GRAPHICS_INIT 

TEST FOR BW CARD 

BW_CARD_ I N I T 

FILL FOR GRAPHICS MODE 

CLEAR_BUFFER 

BW_CARD_ I N I T 

BUFFER SIZE ON BW CARD (2048) 

NO_GRAPHICS_INlT 

FILL CHAR FOR ALPHA 

CLEAR_BUFFER 

FILL THE REGEN BUFFER WITH BbANKS 



GET THE MODE 

INTO AX REGISTER 
TABLE POINTER, INDEXED BY MODE 
PREPARE TO OUTPUT TO VIDEO ENABLE PORT 



AL,CS:[SI + OFFSET BYTE PTR M7 ] 



0111 2E: 8A 84 0000 
0116 32 E4 
0118 A3 004A R 



011B 81 E6 OOOE 



MOV AL,CS:[SI + OFFSET BYTE PTR M6] 

XOR AH, AH 

MOV CRT_COLS,AX ; NUMBER OF COLUMNS IN THIS SCREEN 

SET CURSOR POSITIONS 

AND SI.OEH 



WORD OFFSET INTO CLEAR LENGTH TABLE 



Video 5-129 



OIIF 2E: 8B 8C 0000 E 



0124 


89 OE 004C R 


0128 


89 0008 


012B 


BF 0050 R 


012E 


IE 


m2F 


07 


0130 


33 CO 


0132 


F3/ AB 



MOV 


CX,CS: [SI + OFFSET M5 


MOV 


CRT LEN,CX 


MOV 


CX,8 


MOV 


Dl, OFFSET CURSOR POSN 


PUSH 


OS 


POP 


ES 


XOR 


AX, AX 


REP 


STOSW 



SET UP OVERSCAN REGISTER 



0135 


BO 


30 




0137 


80 


3E 0049 


R 06 


01 3C 


y^ 


02 




013E 


BO 


3F 




0140 


Ft: 






01U1 


A2 


0066 R 




OlilU 








0144 


51) 






0145 


5F 






0146 


'>F 






0147 


5B 






0148 








0148 


59 






0149 


5A 






014A 


U 






01 4B 


0/ 






0140 


CK 






0140 









MOV 


AL,30H 


CMP 


CRT MODE, 6 


JNZ 


M14 


MOV 


AL,3FH 


OUT 


DX,AL 


MOV 


CRT_PALLETTE,AL 



LENGTH TO CLEAR 



SET OVERSCAN PORT TO A DEFAULT 
VALUE OF 30H FOR ALL MODES EXCEPT 640X200 
SEE JF THE MODE IS 640X200 BW 
IF IT ISNT 640X200, THEN GOTO REGULAR 
IF IT IS 640X200, THEN PUT IN 3FH 
OUTPUT THF CORRFCT VAI UF TO 309 PORT 
SAVE THE VALUE FOR FUTURE USE 



; NORMAL RETURN FROM ALL VIDEO RETURNS 

VIDEO_RETURN: 



POP 
POP 
POP 
POP 
I RET 



VIDEO_RETURN_C 



ENDP 



SET_CTYPE 

THIS ROUTINE SETS THE CURSOR VALUE 
INPUT 

(CX) HAS CURSOR VALUE CH-START LINE, CL-STOP LINE 
OUTPUT 

NONE 



014D 






01 4D 


B4 


OA 


014F 


89 


OE 0060 R 


0153 


t8 


0158 R 


0156 


EB 


EC 


0158 






0158 


HH 


16 0063 R 


015C 


8A 


C4 


015E 


EL 




015F 


42 




0160 


FB 


00 


0162 


SA 


C5 


0164 


EE 




0165 


4A 




0166 


FB 


00 


0168 


8A 


C4 


01 6A 


FE 


CO 


016C 


FF 




016D 


42 




016E 


FB 


00 


0170 


8A 


CI 


0172 


FF 




0173 


C3 




0174 







6845 REGISTER FOR CURSOR SET 
SAVE IN DATA AREA 
OUTPUT CX REG 



■PE PROC NEAR 

MOV AH, 10 

MOV CURSOR_MODE,CX 

CALL M16 

JMP VIDEO_RETURN 

THIS ROUTINE OUTPUTS THE CX REGISTER TO THE 6845 REGS NAMED IN AH 



ADDRESS REGISTER 
GET VALUE 
REGISTER SET 
DATA REGISTER 
10 DELAY 
DATA 



. THIS 

M16: 


ROUTINE C 


UTPUTS 


MOV 


DX,ADDR 6845 


MOV 


AL,AH 




OUT 


DX,AL 




INC 


DX 




JMP 


SHORT 


$+2 


MOV 


AL,CH 




OUT 


DX,AL 




DEC 


DX 




JMP 


SHORT 


$+2 


MOV 


AL,AH 




INC 


AL 




OUT 


DX,AL 




INC 


DX 




JMP 


SHORT 


$+2 


MOV 


AL,CL 




OUT 


DX,AL 




RET 






SET CTYPE 


ENDP 





SET_CPOS 

THIS ROUTINE SETS THE CURRENT CURSOR POSITION TO THE 

NEW X-Y VALUES PASSED 
INPUT 

DX - ROW, COLUMN OF NEW CURSOR 

BH - DISPLAY PAGE OF CURSOR 
OUTPUT 

CURSOR IS SET AT 6845 IF DISPLAY PAGE IS CURRENT DISPLAY 



0174 




0174 


8A CF 


0176 


32 ED 


0178 


Dl El 


01 7A 


8B FT 


017C 


89 94 0050 R 


0180 


38 3E 0062 R 


0184 


75 05 


0186 


8B C2 


0188 


E8 018D R 



MOV 
XOR 
SAL 
MOV 
MOV 



PROC 
CL.BII 
CH.CH 



NEAR 



M17: 

jr 

SET_CPOS 



ESTABLISH LOOP COUNT 

WORD OFFSET 

USE I NDEX REGISTER 
[SI+OFFSET CURSOR_POSN],DX ; SAVE THE POINTER 
ACTIVE_PAGE,BH 

SET_CPOS_RETURN 
AX,DX ; GET ROW/COLUMN TO AX 

CURSOR_SET 

SET_CPOS__RETURN 



SET CURSOR POSITION, AX HAS ROW/COLUMN FOR CURSOR 



018D 


E8 0211 R 


0190 


8B C8 


0192 


03 OE 004E R 


0196 


Dl F9 


0198 


B4 OE 


019A 


E8 0158 R 


019D 


C3 


019E 





PROC 

CALL 

MOV 

ADD 

SAR 

MOV 

CALL 

RET 

ENDP 



NEAR 

POSITION 

CX,AX 

CX,CRT_START 

CX, 1 

AH, 14 

M16 



DETERMINE LOCATION IN REGEN BUFFER 

ADD IN THE START ADDRESS FOR THIS PAGE 
DIVIDE BY 2 FOR CHAR ONLY COUNT 
REGISTER NUMBER FOR CURSOR 
OUTPUT THE VALUE TO THE 6845 



READ_CURSOR 

THIS ROUTINE READS THE CURRENT CURSOR VALUE FROM TH 

6845, FORMATS IT, AND SENDS IT BACK TO THE CALLER 
INPUT 

BH - PAGE OF CURSOR 
OUTPUT 

DX - ROW, COLUMN OF THE CURRENT CURSOR POSITION 

CX - CURRENT CURSOR MODE 



019E 




READ CURSOR 


019E 


8A OF 


MOV 


01 AO 


32 FF 


XOR 


01A2 


Dl E3 


SAL 


01 A4 


8B 97 0050 R 


MOV 


01A8 


8B OE 0060 R 


MOV 


01AC 


5D 


POP 


01AD 


5F 


POP 


01AE 


5E 


POP 


01AF 
01 BO 


5B 
58 


POP 
POP 



PROC NEAR 

BL,BH 

BH,BH 

BX, 1 ; WORD OFFSET 

DX, [ BX+OFFSET CURS0R_P0SN1 

CX,CURS0R__M0DE 

BP 

Dl 



DISCARD SAVED CX AND DX 



'n-I^O Vi'Hp^n 



01B1 
01B2 
01B3 



;ead_cursor endp 

act_disp_page 

this routine sets the active display page, allowing 

the full use of the ram set aside for the video attachment 

INPUT 

AL HAS THE NEW ACTIVE DISPLAY PAGE 
OUTPUT 

THE 6845 IS RESET TO DISPLAY THAT PAGE 



01B5 






01B5 


A? 


0062 R 


01B8 


as 


OE 004C 


OIBC 


9R 




OIBD 


^0 




GIBE 


i-f 


El 


01C0 


A3 


004E R 


01C3 


m 


C8 


01C5 


m 


F9 


01C7 


R4 


OC 


01C9 


t-R 


0158 R 


Dice 


^Q 




01CD 


01 


E3 


01CF 


m 


87 0050 


01D3 


E8 


018D R 


01 D6 


m 


01UU R 


01D9 







ACT_DISP_PAGE PROC 



NEAR 



MOV 


ACTIVE PAGE,AL 


MOV 


CX,CRT LEN 


CBW 




PUSH 


AX 


MUL 


CX 


MOV 


CRT START, AX 


MOV 


CX.AX 


SAR 


CX, 1 


MOV 


AH, 12 


CALL 


M16 


POP 


BX 


SAL 


BX, 1 


MOV 


AX, [BX + OFFSE 


CALL 


M18 


JMP 


VIDEO_RETURN 



SAVE ACTIVE PAGE VALUE 

GET SAVED LENGTH OF REGEN BUFFER 

CONVERT AL TO WORD 

SAVE PAGE VALUE 

DISPLAY PAGE TIMES REGEN LENGTH 

SAVE START ADDRESS FOR LATER REQUIREMENTS 

START ADDRESS TO CX 

DIVIDE BY 2 FOR 6845 HANDLING 

6845 REGISTER FOR START ADDRESS 

RECOVER PAGE VALUE 
*2 FOR WORD OFFSET 
;URSOR_POSN] ; GET CURSOR FOR THIS PAGE 
SET THE CURSOR POSITION 



ACT_DISP_PAGE 



SET COLOR 

THIS ROUTINE WILL ESTABLISH THE BACKGROUND COLOR, THE OVERSCAN COl OR, 
AND THE FOREGROUND COLOR SET FOR MEDIUM RESOLUTION GRAPHICS 



SET 



(BH) HAS COLOR ID 

IF BH=0, THE BACKGROUND COLOR VALUE 

FROM THE LOW BITS OF BL (0-31) 
IF BH=1, THE PALLETTE SELECTION IS MADE 
BASED ON THE LOW BIT OF BL: 

= GREEN, RED, YELLOW FOR COLORS 1,2,3 

1 = BLUE, CYAN, MAGENTA FOR COLORS 1,2,3 
(BL) HAS THE COLOR VALUE TO BE USED 

THE COLOR SELECTION IS UPDATED 



01D9 






01 D9 


«B 


16 0063 


01 DD 


«,3 


C2 05 


01 EG 


An 


0066 R 


01E3 


(lA 


FF 


01 E5 


75 


OE 


01 E7 


24 


ED 


01 E9 


«() 


E3 IF 


01 EC 


OA 


C3 


01EE 






01 EE 


FF 




01EF 


A? 


0066 R 


01 F2 


E9 


0144 R 


01 F5 






01 F5 


24 


DF 


01 F7 


DO 


EB 


01 F9 


/,3 


F3 


01 FB 


no 


20 


01 FD 


FB 


EF 


01FF 







SET_C0L0R 

MOV 
ADD 
MOV 



PROC NEAR 

DX,ADDR_6845 

DX,5 

AL,CRT_PALLETTE 

BH,BH 

M20 



I/O PORT FOR PALETTE 

OVERSCAN PORT 

GET THE CURRENT PALLETTE VALUE 

IS THIS COLOR 0? 

OUTPUT COLOR 1 



HANDLE COLOR BY SETTING THE BACKGROUND COLOR 



OUT 
MOV 
JMP 



AL, OEOH 
BL,01 FH 
AL,BL 

DX,AL 

CRT_PALLETTE,AL 

VIDEO_RETURN 



TURN OFF LOW 5 BITS OF CURRENT 

TURN OFF HIGH 3 BITS OF INPUT VALUE 

PUT VALUE INTO REGISTER 

OUTPUT THE PALLETTE 

OUTPUT COLOR SELECTION TO 3D9 PORT 

SAVE THE COLOR VALUE 



HANDLE COLOR 1 BY SELECTING THE PALLETTE TO BE USED 



AND 

SHR 
JNC 



AL,20H 

M19 

ENDP 



TURN OFF PALLETTE SELECT BIT 
TEST THE LOW ORDER BIT OF BL 
ALREADY DONE 

TURN ON PALLETTE SELECT BIT 
GO DO IT 



VIDEO STATE 
RETURNS THE CURRENT VIDEO STATE IN AX 
AH = NUMBER OF COLUMNS ON THE SCREEN 
AL = CURRENT VIDEO MODE 
BH = CURRENT ACTIVE PAGE 



01 FF 


8A 26 004A R 


0203 


AO 0049 R 


0206 


8A 3E 0062 R 


020A 


5D 


020B 


5F 


020C 


5E 


020D 


59 


020E 


E9 0148 R 


0211 





VIDEO STATE 


PROC NEAR 


MOV 


AH, BYTE PTR CRT COLS 


MOV 


AL,CRT MODE 


MOV 


BH, ACTIVE PAGE 


POP 


BP 


POP 


Dl 


POP 


SI 


POP 


CX 


JMP 


Ml 5 


VIDEO STATE 


ENDP 







GET NUMBER OF COLUMNS 
CURRENT MODE 
GET CURRENT ACTIVE PAGE 
RECOVER REGISTERS 



POSITION 

THIS SERVICE ROUTINE CALCULATES THE REGEN BUFFER ADDRESS 

OF A CHARACTER IN THE ALPHA MODE 
INPUT 

AX = ROW, COLUMN POSITION 
OUTPUT 

AX = OFFSET OF CHAR POSITION IN REGEN BUFFER 



0211 




0211 


53 


0212 


8B D8 


0214 


8A C4 


0216 


F6 26 004A R 


021A 


32 FF 


021C 


03 C3 


021E 


Dl EO 


0220 


5B 


0221 


C3 


0222 





PUSH 
MOV 
MOV 
MUL 
XOR 
ADD 
SAL 
POP 
RET 



PROC NEAR 

BX ; SAVE REGISTER 

BX,AX 

AL,AH ; ROWS TO AL 

BYTE PTR CRT_COLS ; DETERMINE BYTES TO ROW 

BH,BH 

AX,BX ; ADD IN COLUMN VALUE 

AX, 1 ; * 2 FOR ATTRIBUTE BYTES 

BX 

ENDP 



SCROLL UP 

THIS ROUTINE MOVES A BLOCK OF CHARACTERS UP 
ON THE SCREEN 

INPUT 

(AH) = CURRENT CRT MODE 

(AL) = NUMBER OF ROWS TO SCROLL 

(CX) = ROW/COLUMN OF UPPER LEFT CORNER 

(DX) = ROW/COLUMN OF LOWER RIGHT CORNER 

(BH) = ATTRIBUTE TO BE USED ON BLANKED LINE 

(DS) = DATA SEGMENT 

(ES) = REGEN BUFFER SEGMENT 

OUTPUT 

NONE -- THE REGEN BUFFER IS MODIFIED 



ASSUME CS: CODE, DS: DATA, ES: DATA 



Video 5-131 



0222 








0222 


E8 


0303 R 




0225 


80 


FC 04 




0228 


72 


08 




022A 


80 


FC 07 




022D 


74 


03 




022F 


E9 


04D5 R 




0232 








0232 


53 






0233 


88 


01 




0235 


E8 


026F R 




0238 


74 


31 




023A 


03 


FO 




023C 


8A 


E6 




023E 


2A 


E3 




0240 








02UO 


E8 


02B6 R 




0243 


03 


F5 




02145 


03 


FD 




0247 


FE 


CO 




02U9 


75 


F5 




02UB 








0246 


58 






024C 


BO 


20 




02UE 








024E 


E8 


02BF R 




0251 


03 


FD 




0253 


FE 


CB 




0255 


75 


F7 




0257 








0257 


E8 


0000 E 




025A 


80 


3E 0049 R 


07 


025 F 


74 


07 




0261 


AO 


0065 R 




0264 


BA 


03D8 




0267 


EE 






0268 








0268 


E9 


0144 R 




0268 








026B 


8A 


DE 




026D 


EB 


DC 




026 F 








026 F 








026 F 


80 


3E 0049 R 


02 


0274 


72 


19 




0276 


80 


3E 0049 R 


03 


027B 


77 


12 




027D 


52 






027E 


BA 


03DA 




0281 


50 






0282 








0282 


EC 






0283 


A8 


08 




0285 


74 


FB 




0287 


BO 


25 




0289 


BA 


03D8 




028C 


EE 






028D 


58 






028E 


5A 






028F 


E8 


021 1 R 




0292 


03 


06 004E R 




0296 


8B 


F8 




0298 


8B 


FO 




029A 


2B 


D1 




029C 


FE 


C6 




029E 


FE 


02 




02AO 


32 


ED 




02A2 


88 


2E 004A R 




02A6 


03 


FD 




02A8 


8A 


03 




02AA 


F6 


26 004A R 




02AE 


03 


CO 




02BO 


06 






02B1 


1 F 






02B2 


80 


FB 00 




02B5 


C3 






02B6 








02B6 








02B6 


8A 


CA 




02B8 


56 






02B9 


57 






02 BA 


F3/ A5 




02BC 


5F 






02BD 


5E 






02BE 


C3 






02BF 








02BF 








02BF 


8A 


CA 




02C1 


57 






02C2 


F3/ AB 




02C4 


5F 






02C5 


C3 






02C6 









SCR0LL_UP PROC NEAR 

CALL TEST_LINE_COUNT ; 





JMP 


GRAPH ICS_UP 


N1 : 








PUSH 


BX 




MOV 


AX, OX 




CALL 


SCROLL POSITION 




JZ 


N7 




ADD 


SI. AX 




MOV 


AH,DH 




SUB 


AH,BL 


N2: 








CALL 


N10 




ADO 


SI ,BP 




ADD 


Dl ,8P 




DEC 


AH 




JNZ 


N2 


N3: 








POP 


AX 




MOV 


AL, ' ' 


N4: 








CALL 


Nil 




ADD 


01 ,BP 




DEC 


BL 




JNZ 


N4 


N5: 








CALL 


DPS 




CMP 


CRT MODE. 7 




JE 


N6 




MOV 


AL.CRT MODE SET 




MOV 


DX.03D8H 




OUT 


DX.AL 


N6: 








JMP 


VIDEO_RETURN 


N7: 








MOV 


BL.DH 




JMP 


N3 


SCROLL. 


_UP 
HANDLE 


ENDP 
COMMON SCROLL SET 



TEST FOR GRAPHICS MODE 
HANDLE SEPARATELY 
TEST FOR BW CARD 



UP_CONTINUE 

SAVE FILL ATTRIBUTE IN BH 

UPPER LEFT POSITION 

DO SETUP FOR SCROLL 

BLANK__FIELD 

FROM ADDRESS 

// ROWS IN BLOCK 

// ROWS TO BE MOVED 

ROW_LO0P 

MOVE ONE ROW 

POINT TO NEXT LINE IN BLOCK 

COUNT OF LINES TO MOVE 

ROW_LOOP 

CLEAR_ENTRY 

RECOVER ATTRIBUTE IN AH 

FILL WITH BLANKS 

OLEAR_LOOP 

CLEAR THE ROW 

POINT TO NEXT LINE 

COUNTER OF LINES TO SCROLL 

CLEAR_LOOP 

SCROLL_END 

IS THIS THE BLACK AND WHITE CARD 
IF SO, SKIP THE MODE RESET 
GET THE VALUE OF THE MODE SET 
ALWAYS SET COLOR CARD PORT 

VIDEO_RET_HERE 

BLANK_FIELD 

GET ROW COUNT 

GO CLEAR THAT AREA 



CRT_M00E,3 



80X25 COLOR CARD SCROLL 

PUSH DX 

MOV DX.3DAH 

PUSH AX 





MOV 


AL.25H 




MOV 


DX.03D8H 




OUT 


DX.AL 




POP 


AX 




POP 


DX 


N9: 


CALL 


POSITION 




ADD 


AX. CRT START 




MOV 


Dl .AX 




MOV 


SI ,AX 




SUB 


DX.CX 




INC 


DH 




INC 


DL 




XOR 


CH.CH 




MOV 


BP.CRT COLS 




ADD 


BP.BP 




MOV 


AL.BL 




MUL 


BYTE PTR CRT 




ADD 


AX, AX 




PUSH 


ES 




POP 


DS 




CMP 


BL,0 




RET 




SCROLL, 


.POSITION ENOP 




MOVE 


ROW 


N10 


PROC 


NEAR 




MOV 


CL.DL 




PUSH 


SI 




PUSH 


Dl 




REP 


MOVSW 




POP 


Dl 




POP 


SI 




RET 




N10 


ENDP 






CLEAR 


ROW 


Nil 


PROC 


NEAR 




MOV 


CL.DL 




PUSH 


Dl 




REP 


STOSW 




POP 


Dl 




RET 




Nil 


ENDP 





GUARANTEED TO BE COLOR CARD HERE 

WAIT_DISP_ENABLE 

GET PORT 

WAIT FOR VERTICAL RETRACE 

WAIT_DISP_ENABLE 



CONVERT TO REGEN POIMTER 
OFFSET OF ACTIVE PAGE 
TO ADDRESS FOR SCROLL 
FROM ADDRESS FOR SCROLL 
DX = #ROWS, #COLS IN BLOCK 

INCREMENT FOR OR I G I N 

SET HIGH BYTE OF COUNT TO ZERO 

GET NUMBER OF COLUMNS IN DISPLAY 

TIMES 2 FOR ATTRIBUTE BYTE 

GET LINE COUNT 

; DETERMINE OFFSET TO FROM ADDRESS 
*2 FOR ATTRIBUTE BYTE 
ESTABLISH ADDRESSING TO REGEN BUFFER 

FOR BOTH POINTERS 
SCROLL MEANS BLANK FIELD 
RETURN WITH FLAGS SET 



GET ft OF COLS TO MOVE 



RECOVER ADDRESSES 



GET ff COLUMNS TO CLEAR 
STORE THE FILL CHARACTER 



SCROLL_DOWN 

THIS ROUTINE MOVES THE CHARACTERS WITHIN A DEFINED 

BLOCK DOWN ON THE SCREEN, FILLING THE TOP LINES 

WITH A DEFINED CHARACTER 
INPUT 

(AH) = CURRENT CRT MODE 

(AL) = NUMBER OF LINES TO SCROLL 

(CX) = UPPER LEFT CORNER OF REGION 

(DX) = LOWER RIGHT CORNER OF REGION 

( BH) = FILL CHARACTER 

( DS) = DATA SEGMENT 

( ES) = REGEN SEGMENT 
OUPUT 

NONE -- SCREEN IS SCROLLED 



02C6 

02C6 FD 

02C7 E8 0303 R 

02CA 80 FC 04 

02CD 72 08 



SCR0LL_DOWN PROC NEAR 
STD 

CALL TEST_LINE_GOUNT 

CMP AH. 4 

JC N12 



DIRECTION FOR SCROLL DOWN 
TEST FOR GRAPHICS 



5-132 Video 



02CF 


SO 


FC 07 


02D2 


71 


03 




0201 


h.y 


052E 


K 


02D7 








02D7 


■,3 






02D8 


aB 


C2 




02DA 


F8 


026 F 


K 


02DD 


71 


20 




02DF 


?R 


FO 




02E1 


8A 


E6 




02E3 


2A 


E3 




02E5 








02E5 


l« 


02B6 


K 


02E8 


?B 


F5 




02EA 


?R 


FD 




02EC 


FF 


CC 




02EE 


75 


F5 




02F0 








02F0 


■>8 






02F1 


BO 


20 




02F3 








02F3 


FB 


02BF 


R 


02F6 


2B 


FD 




02F8 


FF 


CB 




02FA 


1^ 


F7 




02FC 


E9 


0257 


R 


02FF 








02FF 


«A 


DE 




0301 


PR 


ED 




0303 









PUSH 

MOV 

CALL 

JZ 

SUB 

MOV 

SUB 

CALL 

SUB 

SUB 

DEC 

JNZ 



CALL 

SUB 

DEC 

JNZ 

JMP 



AH, 7 
N12 
GRAPHICS_D0WN 



AX.DX 

SCR0LL_P0SITION 

N16 

SI .AX 

AH.DH 

AH,BL 



TEST FOR BW CARD 



C0NT1NUE_D0WN 
SAVE ATTRIBUTE IN BH 
LOWER RIGHT CORNER 
GET REGEN LOCATION 

SI IS FROM ADDRESS 

GET TOTAL # ROWS 

COUNT TO MOVE IN SCROLL 



MOVE ONE ROW 



RECOVER ATTRIBUTE IN AH 



SCROLL_END 



MOV 

JMP 

SCROLL_DOWN 



BL,DH 

Nil 

ENDP 



0303 

0303 
0305 
0307 
0309 
030A 
030C 
030E 
0310 
0312 
0313 
0315 
0317 
0317 
0318 



TEST_L1NE_C0UNT PROG 



8A 08 
OA CO 
71 OE 



2A C5 
FE CO 
3A C3 



0318 


80 


FC 01 


031B 


72 


08 


031D 


80 


FC 07 


0320 


71 


03 


0322 


E9 


0669 R 


0325 






0325 


E8 


0312 R 


0328 


8B 


F3 


032A 


8B 


16 0063 R 


032E 


83 


C2 06 


0331 


06 




0332 


IF 




0333 






0333 


EC 




0331 


A8 


01 


0336 


75 


FB 


0338 


FA 




0339 






0339 


EC 




033A 


A8 


01 


033C 


71 


FB 


033E 


AD 




033F 


E9 


0111 R 


0312 






0312 






0312 


8A 


CF 


0311 


32 


ED 


0316 


88 


F1 


0318 


D1 


E6 


031A 


8B 


81 0050 R 


031E 


33 


DB 


0350 


E3 


06 


0352 






0352 


03 


IE 001C R 


0356 


E2 


FA 


0358 






0358 


E8 


0211 R 


035B 


03 


D8 


035D 


03 




035E 







MOV 


BL,AL 


OR 


AL,AL 


JZ 


BL SET 


PUSH 


AX 


MOV 


AL.DH 


SUB 


AL,CH 


INC 


AL 


CMP 


AL,BL 


POP 


AX 


JNE 


BL SET 


SUB 


BL,BL 


BL SET: 





TEST_LINE„COUNT ENDP 



SAVE LINE COUNT IN BL 

TEST I F AL IS ALREADY ZERO 

IF IT IS THEN RETURN. . . 

SAVE AX 

SUBTRACT LOWER ROW FROM UPPER ROW 

ADJUST DIFERENCE BY 1 

TEST IF LINE COUNT = AMOUNT OF ROWS 

RESTORE AX 

I F NOT THEN WE'RE ALL SET 

OTHERWISE SET BL TO ZERO 

RETURN 



READ_AC_CURRENT 

THIS ROUTINE READS THE ATTRIBUTE AND CHARACTER AT THE CURRENT 

CURSOR POSITION AND RETURNS THEM TO THE CALLER 
INPUT 

(AH) = CURRENT CRT MODE 

(BH) = DISPLAY PAGE ( ALPHA MODES ONLY ) 

(DS) = DATA SEGMENT 

( ES) = REGEN SEGMENT 



ASSUME CS:CODE,DS: DATA, ES: DATA 



GRAPHICS_READ 



FIND_POSITION 



WAIT FOR HORIZONTAL RETRACE 

MOV DX,ADDR_6815 

ADD DX,6 

PUSH ES 

POP DS 



VIDEO_RETURN 



READ_AC_CURRENT ENDP 
F1ND_P0SITI0N 



MOV 
XOR 
MOV 
SAL 
MOV 
XOR 
JCXZ 



CALL 
ADD 
RET 



CL,BH 
CH,CH 
SI,CX 



IS THIS GRAPH I CS 
IS THIS BW CARD 

READ_AC_CONTINUE 
ESTABLISH ADDRESSING IN SI 



GET SEGMENT FOR QUICK ACCESS 

WAIT FOR RETRACE LOW 

GET STATUS 

IS HORZ RETRACE LOW 

WAIT UNTIL IT IS 

NO MORE INTERRUPTS 

WAIT FOR RETRACE HIGH 

GET STATUS 

IS IT HIGH 

WAIT UNTIL IT IS 

GET THE CHAR/ATTR 



DISPLAY PAGE TO CX 



; MOVE TO SI FOR INDEX 

; * 2 FOR WORD OFFSET 

OFFSET CURSOR_POSN] ; GET ROW/COLUMN OF THAT PAGE 



BX,CRT_LEN 



SET START ADDRESS TO ZERO 
NO_PAGE 
PAG E_ LOOP 
LENGTH OF BUFFER 

NO_PAGE 

DETERMINE LOCATION IN REGEN 

ADD TO START OF REGEN 



FIND_POSITION 



WRITE_AC_CURRENT 

THIS ROUTINE WRITES THE ATTRIBUTE AND CHARACTER AT 

THE CURRENT CURSOR POSITION 
INPUT 

(AH) = CURRENT CRT MODE 

(BH) = DISPLAY PAGE 

(CX) = COUNT OF CHARACTERS TO WRITE 

(AL) - CHAR TO WRITE 

(BL) = ATTRIBUTE OF CHAR TO WRITE 

(DS) = DATA SEGMENT 

(ES) =: REGEN SEGMENT 




Video 5-133 



035E 






035E 


80 


FC 04 


0361 


72 


08 


0363 


80 


FC 07 


0366 


74 


03 


0368 


F9 


05B8 R 


036B 






036B 


ftA 


E3 


036D 


"JO 




036E 


^1 




036F 


K« 


0342 R 


0372 


8B 


FB 


037U 


W 




0375 


SB 




0376 






0376 


RB 


16 0063 R 


037A 


83 


02 06 


037D 






037D 


FC 




037E 


A8 


01 


0380 


Ti 


FB 


0383 


FA 




0383 






0383 


FC 




0384 


A8 


01 


0386 


74 


FB 


0388 


8B 


C3 


038A 


AB 




038B 


FB 




038C 


?>> 


E8 


038E 


E9 


0144 R 


0391 







WRITE_AC_CURRENT 



GRAPHICS_WRITE 



FIND_POSITION 



JMP 

MOV 
PUSH 
PUSH 
CALL 
MOV 
POP 
POP 



■WAIT FOR HORIZONTAL RETRACE 



MOV 


DX,ADDR 6845 


ADD 


DX.6 


IN 


AL,DX 


TEST 


AL, 1 


JNZ 


P8 


CLI 




IN 


AL.DX 


TEST 


AL, 1 


JZ 


P9 


MOV 


AX,BX 


STOSW 




STI 




LOOP 


P7 


JMP 


V1DE0_RETURN 



IS THIS GRAPHICS 
IS THIS BW CARD 



WRITE_AC_CONTINUE 
GET ATTRIBUTE TO AH 
SAVE ON STACK 
SAVE WRITE COUNT 

ADDRESS TO 01 REGISTER 
WRITE COUNT 
CHARACTER IN BX REG 
WRITE_LOOP 



GET STATUS 
IS IT LOW 
WAIT UNTIL IT IS 
NO MORE INTERRUPTS 

GET STATUS 
IS IT HIGH 
WAIT UNTIL IT IS 
RECOVER THE CHAR/ATTR 
PUT THE CHAR/ATTR 
INTERRUPTS BACK ON 
AS MANY TIMES AS REQUESTED 



WRITE_AC_CURRENT 



WRITE_C_CURRENT 

THIS ROUTINE WRITES THE CHARACTER AT 

THE CURRENT CURSOR POSITION, ATTRIBUTE UNCHANGED 



(AH) : 
(BH) ^ 
(CX) : 
(AL) : 

(DS) : 

(ES) : 

IT 
NONE 



: CURRENT CRT MODE 

: DISPLAY PAGE 

: COUNT OF CHARACTERS TO WRITE 

: CHAR TO WRITE 

: DATA SEGMENT 

: REGEN SEGMENT 



0391 






0391 


80 


FC 04 


0394 


72 


08 


0396 


80 


FC 07 


0399 


74 


03 


039B 


F9 


05B8 R 


039E 






039E 


50 




039F 


51 




03AO 


hK 


0342 R 


03A3 


8B 


FB 


03A5 


59 




03A6 


5B 




03A7 






03A7 


SB 


16 0063 


03AB 


83 


C2 06 


03AE 






03AE 


F(; 




03AF 


A8 


01 


03B1 


75 


FB 


03B3 


FA 




03B4 






03B4 


hC 




03B5 


A8 


01 


03B7 


74 


FB 


03B9 


8A 


C3 


03BB 


FB 




03BC 


AA 




03BD 


47 




03BE 


F2 


E7 


03 CO 


E9 


0144 R 


03C3 







WRITE_C_CURRENT PROC NEAR 

CMP AH, 4 

JC P10 

CMP AH, 7 

JE P10 

GRAPHICS_WRITE 



JMP 

PUSH 

PUSH 

CALL 

MOV 

POP 

POP 



AX 
CX 
FIND_POSITION 



WAIT FOR HORIZONTAL RETRACE 



AL,DX 

AL,1 

P12 



AL,DX 
AL, 1 
P13 
AL,BL 



LOOP 

JMP 

WRITE_C_CURRENT ENDP 
page 



DEO_RETURN 



IS THIS GRAPHICS 
IS THIS BW CARD 



ADDRESS TO Dl 

WRITE COUNT 

BL HAS CHAR TO WRITE 

WRITE_LOOP 



GET STATUS 
IS IT LOW 
WAIT UNTIL IT IS 
NO MORE INTERRUPTS 

GET STATUS 
IS IT HIGH 
WAIT UNTIL IT IS 
RECOVER CHAR 
ENABLE I NTS. 
PUT THE CHAR/ATTR 
BUMP POINTER PAST ATTRIBUTE 
AS MANY TIMES AS REQUESTED 



WRITE_STRING 



(AL) 
(BH) 
(CX) 
(BL) 
(ES) 
(BP) 



WRITE STRING COMMAND 0-3 

DISPLAY PAGE 

COUNT OF CHARACTERS TO WRITE, 

ATTRIBUTE OF CHAR TO WRITE IF 

STRING SEGMENT 

STRING OFFSET 



WRITE_STRING 



03C3 


3C 


04 


03C5 


72 


03 


03C7 


E9 


045B R 


03CA 


Ob 


C9 


03CC 


75 


03 


03CE 


F9 


045B R 


03D1 


53 




03D2 


8A 


DF 


03 D4 


32 


FF 


03 D6 


m 


E3 


03D8 


8B 


B7 0050 R 


03DC 


5B 




03DD 


56 




03DE 


50 




03DF 


B« 


0200 


03 E2 


CI) 


10 


03E4 


58 




03E5 






03E5 


51 




03E6 


53 





JMP 


DONE ; 


: OR 


CX,CX ; 


JNZ 


Wi ; 


JMP 


DONE ; 


PUSH 


BX ; 


MOV 


BL,BH ; 


XOR 


BH.BH ; 


SAL 


BX, 1 ; 


MOV 


SI, [BX+OFFSET CURSOR POSN ] 


POP 


BX ; 


PUSH 


SI ; 


PUSH 


AX ; 


MOV 


AX,0200H ; 


INT 


10H 


POP 


AX ; 


ITE CHAR: 




PUSH 


CX 


PUSH 


BX 



TEST FOR ZERO LENGTH STRING 

IF ZERO LENGTH STRING THEN RETURN 
SAVE PAGE AND POSSIBLE ATTRIBUTE 
GET CURRENT CURSOR POSITION 



RESTORE WRITE STRING OPTION 



5-134 Video 



03E7 


50 


03E8 


06 


03E9 


86 EO 


03EB 


26: 8A 46 00 


03 EF 


45 


03F0 


3C 08 


03F2 


74 OC 


03FU 


3C OD 


03F6 


74 08 


03F8 


3C OA 


03 FA 


74 04 


03FC 


3C 07 


03FE 


75 13 


OUOO 




OUOO 


B4 OE 


0U02 


CD 10 


0404 


8A DF 


0U06 


DO E7 


0408 


8B 97 0050 R 


040C 


07 


OUOD 


58 


040E 


5B 


040F 


59 


0410 


EB 32 90 


0413 




0413 


B9 0001 


0416 


80 FC 02 


0419 


72 05 


041B 


26: 8A 5E 00 


041 F 


45 


0420 




0420 


B4 09 


0422 


CD 10 


0424 


07 


0425 


58 


0426 


5B 


0427 


59 


0428 


FE C2 


042A 


3A 16 004A R 


042E 


72 14 


0430 


FE 06 


0432 


2A U2 


0434 


80 FE 19 


0437 


72 OB 


0439 


06 


043A 


50 


043B 


B8 OEOA 


043E 


CD 10 


0440 


FE CE 


0442 


58 


0443 


07 


0444 




0444 




0444 


50 


0445 


B8 0200 


0448 


CD 10 


044A 


58 


044B 


E2 98 


044D 


5A 


044 E 


3C 01 


0450 


74 09 


0452 


3C 03 


0454 


74 05 


0456 


B8 0200 


0459 


CD 10 


045B 




045B 


E9 0144 R 



TEST FOR SPECIAL CHARACTER'S 



CMP 


AL,8 


JE 


DO TTY 


CMP 


AL,0DH 


JE 


DO TTY 


CMP 


AL,OAH 


JE 


DO TTY 


CMP 


AL,07H 


JNE 


GET_ATTRIBUTE 


DO TTY: 




MOV 


AH, 14 


INT 


10H 


MOV 


BL,BH 


SAL 


BH, 1 


MOV 


DX, [BX+OFFSET 


POP 


ES 


POP 


AX 


POP 


BX 


POP 


CX 


JMP 


ROWS_SET 


GET ATTRIBUTE: 




MOV 


CX, 1 


CMP 


AH, 2 


JB 


GOT IT 


MOV 


BL,ES: [BP] 



PUT THE WRITE STRING OPTION INTO AH 
GET CHARACTER FROM INPUT STRING 
BUMP POINTER TO CHARACTER 



IS IT A BACKSPACE 

BAG K_S PACE 

IS IT CARRIAGE RETURN 

CAR_RET 

IS IT A LINE FEED 

LINE_FEED 

IS IT A BELL 

IF NOT THEN DO WRITE CHARACTER 

WRITE TTY CHARACTER TO THE CRT 



POP 
POP 
POP 
POP 



DL, BYTE PTR CRT_COLS 



045E 




045E 


E8 0492 R 


0461 


26: 8A 04 


0464 


22 C4 


0466 


D2 EO 


0468 


8A CE 


046A 


D2 CO 


046C 


E9 0144 R 


046 F 




046F 




046 F 


50 


0470 


50 


0471 


E8 0492 R 


0474 


D2 E8 


0476 


22 C4 


0478 


26: 8A OC 


047B 


5B 


047C 


F6 C3 80 


047F 


75 OD 


0481 


F6 D4 


0483 


22 CC 


0485 


OA CI 


0487 




0487 


26: 88 04 


048A 


58 


048B 


E9 0144 R 


048E 




048E 


32 CI 





JB 


COLUMNS SET 




INC 


DH 




SUB 


DL,DL 




CMP 


DH,25 




JB 


ROWS_SET 




PUSH 


ES 




PUSH 


AX 




MOV 


AX,0E0AH 




INT 


10H 




DEC 


DH 




POP 


AX 




POP 


ES 


ROWS 


SET: 




COLUMNS_,SET: 






PUSH 


AX 




MOV 


AX,0200H 




INT 


10H 




POP 


AX 




LOOP 


WR1TE_CHAR 




POP 


DX 




CMP 


AL, 1 




JE 


DONE 




CMP 


AL,3 




JE 


DONE 




MOV 


AX,0200H 




INT 


10H 


DONE: 








JMP 


VIDEO_RETUR 


WRITE 


_STRING 


ENDP 


page 







RESTORE REGISTERS 



SET CHARACTER WRITE AMOUNT TO ONE 

IS THE ATTRIBUTE IN THE STRING 

I F NOT THEN JUMP 

ELSE Gtl IT 

BUMP STRING POINTER 



WRITE CHARACTER TO THE CRT 



RESTORE REGISTERS 



INCREMENT COLUMN COUNTER 

IF COLS ARE WITHIN RANGE FOR 

THIS MODE THEN 

GOTO COLS SET 
BUMP ROW COUNTER BY ONE 
SET COLUMN COUNTER TO ZERO 
IF ROWS ARE < 25 THEN 

GOTO ROWS_SET 
SAVE WRITE STRING PARAMETER REGS 
SAVE REG'S THAT GET CLOBBERED 



RESTORE REG'S 



DO IT ONCE MORE UNTIL CX = ZERO 

RESTORE OLD CURSOR COORDINATES 
I F CURSOR WAS TO BE MOVED THEN 
WE'RE DONE 



ELSE RESTORE OLD CURSOR POSITION 
RETURN TO CALLER 



READ DOT -- WRITE DOT 

THESE ROUTINES WILL WRITE A DOT, OR READ THE 

DOT AT THE INDICATED LOCATION 
ENTRY -- 

DX = ROW (0-199) (THE ACTUAL VALUE DEPENDS ON THE MODE) 
CX = COLUMN ( 0-639) ( THE VALUES ARE NOT RANGE CHECKED ) 
AL = DOT VALUE TO WRITE (1,2 OR 4 BITS DEPENDING ON MODE, 
REQ'D FOR WRITE DOT ONLY, RIGHT JUSTIFIED) 

BIT 7 OF AL = 1 INDICATES XOR THE VALUE INTO THE LOCATION 
DS = DATA SEGMENT 
ES = REGfN SEGMENT 



EXIT 



AL = DOT VALUE READ, RIGHT JUSTIFIED, READ ONLY 



ASSUME 


CS:CODE,DS:D/ 


READ DOT 


PROC NEAR 


CALL 


R3 


MOV 


AL,ES:[S1 ] 


AND 


AL,AH 


SHL 


AL.CL 


MOV 


CL, DH 


ROL 


AL,CL 


JMP 


VIDEO RETURN 


READ_DOT 


ENDP 


WRITF DOT 


PROC NEAR 


PUSH 


AX 


PUSH 


AX 


CALL 


R3 


SHR 


AL.CL 


AND 


AL,AH 


MOV 


CL,ES:[SI ] 


POP 


BX 


TEST 


BL,80H 


JNZ 


R2 


NOT 


AH 


AND 


CL,AH 


OR 


AL.CL 


R1 : 




MOV 


ES:[SI ],AL 


POP 


AX 


JMP 


VIDEO RETURN 



DETERMINE BYTE POSITION OF DOT 

; GET THE BYTE 
MASK OFF THE OTHER BITS IN THE BYTE 
LEFT JUSTIFY THE VALUE 
GET NUMBER OF BITS IN RESULT 
RIGHT JUSTIFY THE RESULT 
RETURN FROM VIDEO 10 



SAVE DOT VALUE 

TWICE 
DETERMINE BYTE POSITION OF THE DOT 
SHIFT TO SET UP THE BITS FOR OUTPUT 
STRIP OFF THE OTHER BITS 
GET THE CURRENT BYTE 
RECOVER XOR FLAG 
IS IT ON 

YES, XOR THE DOT 
SET THE MASK TO REMOVE THE INDICATED BITS 

OR IN THE NEW VALUE OF THOSE BITS 

FINISHDOT 

RESTORE THE BYTE IN MEMORY 



RETURN FROM VIDEO 10 

XOR_DOT 

EXCLUSIVE OR THE DOTS 



Video 5-135 



0it92 
0492 
0U93 



ENDP 



FINISH UP THE WRITING 



THIS SUBROUTINE DETERMINES THE REGEN BYTE LOCATION OF THE 

INDICATED ROW COLUMN VALUE IN GRAPHICS MODE. 

ENTRY -- 
DX = ROW VALUE (0-199) 
CX = COLUMN VALUE (0-639) 

EXIT -- 
SI = OFFSET INTO REGEN BUFFER FOR BYTE OF INTEREST 
AH = MASK TO STRIP OFF THE BITS OF INTEREST 
CL = BITS TO SHIFT TO RIGHT JUSTIFY THE MASK IN AH 
OH = // BITS IN RESULT 

;3 PROC NEAR 
PUSH BX 
PUSH AX 



0494 


BO 28 


0496 


52 


0497 


80 E2 FE 


049A 


F6 E2 


049C 


5A 


049D 


F6 C2 01 


04A0 


74 03 


04A2 


05 2000 


04A5 




04A5 


88 FO 


04A7 


58 


04A8 


8B D1 



MOV 


AL.40 




PUSH 


DX 


SAVE ROW VALUE 


AND 


DL,OFEH 


STRIP OFF ODD/EVEN BIT 


MUL 


DL 


AX HAS ADDRESS OF 1ST BYTE OF 


POP 


DX 


RECOVER IT 


TEST 


DL,1 


TEST FOR EVEN/ODD 


JZ 


R4 


JUMP IF EVEN ROW 


ADD 
4: 


AX,?OOOH 


OFFSET TO LOCATION OF ODD ROWS 
EVEN ROW 


MOV 


SI, AX 


MOVE POINTER TO SI 


POP 


AX 


RECOVER AL VALUE 


MOV 
OETERM 


DX,CX 
INE GRAPHICS MODE ( 


COLUMN VALUE TO DX 
:URRENTLY IN EFFECT 



ND I GATED ROW 



04AA 


BB 


02C0 


04AD 


By 


0302 


04B0 


80 


3E 0049 R 06 


04B5 


/•2 


06 


04B7 


BB 


0180 


04BA 


B9 


0703 


048D 






04BD 


22 


EA 


04BF 


D3 


EA 


04C1 


03 


F2 


04C3 


8A 


F7 


04C5 


2A 


09 


04C7 






04C7 


DO 


C8 


04C9 


0^ 


CD 


04CB 


FF 


CF 


04CD 


/"> 


F8 


04CF 


8A 


E3 


04D1 


02 


EC 


04D3 


'jB 




04D4 


C3 




04D5 







0405 

04D5 8A D8 

04D7 8B CI 



SET UP THE REGISTERS ACCORDING TO THE MODE 

CH = MASK FOR LOW OF COLUMN ADDRESS ( 7/3 FOR HIGH/MED RES) 

CL = # OF ADDRESS BITS IN COLUMN VALUE ( 3/2 FOR H/M) 

BL = MASK TO SELECT BITS FROM POINTED BYTE ( 80H/C0H FOR H/M) 

BH = NUMBER OF VALID BITS IN POINTED BYTE ( 1/2 FOR H/M) 



SET PARMS FOR MED RES 
HANDLE I F MED ARES 
SET PARMS FOR HIGH RES 
N BYTE FROM COLUMN MASK 

; ADDRESS OF PEL WITHIN BYTE TO CH 
N COLUMN 



MOV 


BX,2C0H 


MOV 


CX,302H 


CMP 


CRT MODE, 6 


JC 


R5 


MOV 


BX, 180H 


MOV 


CX,703H 



DETERMINE BIT OFFSET 

AND CH,DL 

DETERMINE BYTE OFFSET FOR THIS LOCATION 

DX,CL 
SI ,DX 
DH,BH 

MULTIPLY BH (VALID BITS 



SHR 
ADD 
MOV 



SHIFT BY CORRECT AMOUNT 

INCREMENT THE POINTER 

GET THE # OF BITS IN RESULT TO DH 



SUB 

ROR 
ADD 
DEC 
JN2 
MOV 
SHR 
POP 
RET 
ENDP 



CL,CL 



N BYTE) BY CH (BIT OFFSET) 

ZERO INTO STORAGE LOCATION 

LEFT JUSTIFY THE VALUE IN AL (FOR WRITE) 

ADD IN THE BIT OFFSET VALUE 

LOOP CONTROL 

ON EXIT, CL HAS SHIFT COUNT TO RESTORE BITS 

GET MASK TO AH 

MOVE THE MASK TO CORRECT LOCATION 

RECOVER REG 

RETURN WITH EVERYTHING SET UP 



SCROLL UP 
THIS ROUTINE SCROLLS UP THE INFORMATION ON THE CRT 
ENTRY -- 

CH.CL = UPPER LEFT CORNER OF REGION TO SCROLL 

DH.DL = LOWER RIGHT CORNER OF REGION TO SCROLL 
BOTH OF THE ABOVE ARE IN CHARACTER POSITIONS 

BH = FILL VALUE FOR BLANKED LINES 

AL = # LINES TO SCROLL (AL=0 MEANS BLANK THE ENTIRE FIELD) 

OS = DATA SEGMENT 

ES = KEGtN SEGMENT 
EXIT -- 

NOTHING, THE SCREEN IS SCROLLED 



PROC 

BL,AL 

AX,CX 



NEAR 

; SAVE LINE COUNT IN BL 

; GET UPPER LEFT POSITION INTO AX REG 



04DE 


?B 


D1 


04 EO 


81 


C2 0101 


04E4 


DO 


E6 


04E6 


DO 


E6 


04ES 


80 


3E 0049 R 06 


04ED 


73 


04 


04EF 


DO 


E2 


04F1 


D1 


E7 


04F3 






04F3 


06 




04 F4 


U 




04F5 


?A 


ED 


04F7 


DO 


E3 


04F9 


DO 


E3 


04FB 


74 


2D 


04FD 


8A 


C3 


04FF 


B4 


50 


0501 


F6 


E4 


0503 


«B 


F7 


0505 


03 


FO 


0507 


8A 


E6 



CALL 


GRAPH POSN 


MOV 


01 ,AX 


DETERM 


NE SIZE OF V 


SUB 


DX,CX 


ADD 


DX,101H 


SAL 


DH,1 


SAL 


DH.1 


DETERMINE CRT MODE 


CMP 


CRT MODE, 6 


JNC 


R7 


MEDIUM 


RES UP 


SAL 


DL.1 


SAL 


Dl,1 


DETERM 


NE THE SOURC 


PUSH 


ES 


POP 


DS 


SUB 


CH,CH 


SAL 


BL, 1 


SAL 


BL, 1 


JZ 


R11 


MOV 


AL,BL 


MOV 


AH, 80 


MUL 


AH 


MOV 


SI,DI 


ADD 


SI ,AX 


MOV 


AH.DH 



SAVE RESULT AS DESTINATION ADDRESS 



ADJUST VALUES 

MULTIPLY # ROWS BY 4 SINCE i 
AND EVEN/ODD ROWS 



VERT DOTS/CHAR 



GET SEGMENTS BOTH POINTING TO REGEN 



IF ZERO, THEN BLANK ENTIRE FIELD 

GET NUMBER OF LINES IN AL 

80 BYTE 3/ ROW 

DETERMINE OFFSET TO SOURCE 

SET UP SOURCE 

ADD IN OFFSET TO IT 
NUMBER OF ROWS IN FIELD 



5-136 Video 



0509 2A E3 



050B 






O^OB 


ES 


058E R 


050E 


fli 


EE 1FB0 


0512 


«1 


EF 1FB0 


0516 


FE 


CC 


0518 


73 


F1 


051A 






051A 


flA 


C7 


051C 






051C 


t« 


05A7 R 


051 F 


«1 


EF 1FB0 


0523 


FF 


CB 


0525 


75 


F5 


0527 


L9 


0141* R 


052A 






052A 


8A 


DE 


052C 


tB 


EC 


052E 







052E 

052E FD 

052 F 8A D8 

0531 8B C2 



SUB AH.BL ; DETERMINE NUMBER TO MOVE 

LOOP THROUGH, MOVING ONE ROW AT A TIME, BOTH EVEN AND ODD FIELDS 



R17 

SI,2000H-80 

Dl,2000H-80 



CALL 
SUB 
SUB 
DEC 
JNZ 



FILL IN THE VACATED LINE(S) 



R0W_L00P 
MOVE ONE ROW 
MOVE TO NEXT ROW 



CALL 
SUB 
DEC 
JNZ 



R11: 

MOV 
JMP 

GRAPHICS_UP 



VIDEO_RETURN 



ENDP 



CLEAR THAT ROW 
POINT TO NEXT LINE 
NUMBER OF LINES TO FILL 
CLEAR_LO0P 
EVERYTHING DONE 

BLANK_FIELD 

SET BLANK COUNT TO EVERYTHING IN FIELD 

CLEAR THE FIELD 



SCROLL DOWN 

THIS ROUTINE SCROLLS DOWN THE INFORMATION ON THE CRT 
ENTRY -- 

CH,CL = UPPER LEFT CORNER OF REGION TO SCROLL 

DH,OL = LOWER RIGHT CORNER OF REGION TO SCROLL 
BOTH OF THE ABOVE ARE IN CHARACTER POSITIONS 

BH = FILL VALUE FOR BLANKED LINES 

AL = # LINES TO SCROLL (AL=0 MEANS BLANK THE ENTIRE FIELD) 

DS = DATA SEGMENT 

ES = REGEN SEGMENT 
EXIT -- 

NOTHING. THE SCREEN IS SCROLLED 



NEAR 

SET DIRECTION 

SAVE LINE COUNT IN BL 

GET LOWER RIGHT POSITION INTO AX REG 



0533 


E8 


0748 R 


0536 


8B 


F8 


0538 


2B 


D1 


053A 


81 


C2 0101 


053E 


00 


E6 


051*0 


00 


E6 


0542 


80 


3E 0049 R 06 


05U7 


73 


05 


0549 


DO 


E2 


054B 


D1 


E7 


054D 


47 




054E 






054E 


06 




054F 


IF 




0550 


2A 


ED 


0552 


81 


C7 00 FO 


0556 


DO 


E3 


0558 


DO 


E3 


055A 


74 


2E 


055C 


8A 


C3 


055E 


B4 


50 


0560 


F6 


E4 


0562 


8B 


F7 


0564 


2B 


FO 


0566 


8A 


E6 


0568 


2A 


E3 


056A 






056A 


E8 


058E R 


056D 


81 


EE 2050 


0571 


81 


EF 2050 


0575 


FE 


CC 


0577 


75 


F1 


0579 






0579 


8A 


07 


0578 






0578 


E8 


05A7 R 


057E 


81 


EF 2050 


0582 


FE 


CB 


0584 


75 


F5 


0586 


FC 




0587 


E9 


0144 R 


058A 






058A 


8A 


OE 


0580 


EB 


EB 


058E 






058E 






058E 


8A 


CA 


0590 


56 




0591 


57 




0592 


F3/ A4 


0594 


5F 




0595 


5E 




0596 


81 


C6 2000 


059A 


81 


C7 2000 


059E 


56 




059F 


57 




05AO 


8A 


CA 


05A2 


F3/ A4 


05A4 


5F 




05A5 


5E 




05A6 


C3 





GRAPH_POSN 



SAVE RESULT AS DESTINATION ADDRESS 



DETERMINE SIZE OF WINDOW 



SUB 
ADD 
SAL 
SAL 



DX.CX 
DX, 101H 
DH, 1 
DH,1 



ADJUST VALUES 
MULTIPLY # ROWS BY 4 
AND EVEN/ODD ROWS 



SINCE 8 VERT DOTS/CHAR 



DETERMINE CRT MODE 



MEDIUM RES DOWN 



# COLUMNS * 2, SINCE 2 BYTES/CHAR (OFFSET OK) 
OFFSET *2 SINCE 2 BYTES/CHAR 
POINT TO LAST BYTE 



DETERMINE THE SOURCE ADDRESS IN THE BUFFER 



PUSH 
POP 
SUB 
ADD 
SAL 
SAL 



JZ 



MOV 
SUB 
MOV 
SUB 



CH,CH 
Dl,240 
BL, 1 
BL, 1 
R16 
AL.BL 
AH, 80 
AH 

SI,DI 
SI, AX 
AH.DH 
AH,BL 



ZERO TO HIGH OF COUNT REG 
POINT TO LAST ROW OF PIXELS 
MULTIPLY NUMBER OF LINES BY 4 

IF ZERO, THEN BLANK ENTIRE F I El 

GET NUMBER OF LINES IN AL 

80 BYTES/ROW 

DETERMINE OFFSET TO SOURCE 

SET UP SOURCE 

SUBTRACT THE OFFSET 
NUMBER OF ROWS IN FIELD 
DETERMINE NUMBER TO MOVE 



LOOP THROUGH, MOVING ONE ROW AT A TIME, BOTH EVEN AND ODD FIELDS 



R17 

SI,2000H+80 

DI,2000H+80 



R14: 
R15: 



CALL 
SUB 
SUB 
DEC 
JNZ 



FILL IN THE VACATED LINE(S) 



ROW_LOOP_DOWN 
MOVE ONE ROW 
MOVE TO NEXT ROW 



MOV 

CALL 
SUB 
DEC 
JNZ 
OLD 
JMP 



AL, BH 

DI,2000H+80 

BL 

R15 

VIDEO_RETURN 



R16: 

MOV BL, DH 

JMP R14 

GRAPHICS_DOWN ENDP 



CLEAR_ENTRY_DOWN 

ATTRIBUTE TO FILL WITH 

CLEAR_LOOP_D0WN 

CLEAR A ROW 

POINT TO NEXT LINE 

NUMBER OF LINES TO FILL 

CLEAR_LOOP_DOWN 

RESET THE DIRECTION FLAG 

EVERYTHING DONE 

BLANK_FIELD_DOWN 

SET BLANK COUNT TO EVERYTHING 

CLEAR THE FIELD 



ROUTINE TO MOVE ONE ROW OF INFORMATION 



PROC 
MOV 
PUSH 
PUSH 
REP 
POP 
POP 
ADD 
ADD 
PUSH 
PUSH 
MOV 
REP 
POP 
POP 
RET 



NUMBER OF BYTES IN THE ROW 



; POINT TO THE ODD FIELD 

SAVE THE POINTERS 

COUNT BACK 

MOVE THE ODD FIELD 



Video 5-137 



05A7 




05A7 


8A CA 


05A9 


57 


05AA 


F3/ AA 


05AC 


5F 


05AD 


81 C7 2000 


05B1 


57 


05B2 


8A CA 


05B4 


F3/ AA 


05B6 


5F 


05B7 


C3 


05B8 





05B8 B4 GO 



05C0 58 
05C1 3C 80 
05C3 73 06 



05C5 BE 0000 E 
05C8 OE 
05C9 EB OF 



05CB 


2C 80 


05CD 


IE 


05CE 


2B F6 


05 DO 


8E DE 


0502 


C5 36 007C R 


05D6 


8C DA 


05D8 


IF 


05uy 


52 


05DA 




05DA 


Dl EO 


05DC 


01 EO 


05DE 


01 EO 


05EO 


03 FO 


05E2 


80 3E 00tt9 R 06 


05E7 


IF 


05E8 


72 2C 


05EA 




05EA 


57 


05EB 


56 


05EC 


B6 Oi* 


05EE 




05EE 


AC 


05EF 


F6 C3 80 


05 F2 


75 16 


05FU 


AA 


05F5 


AC 


05F6 




05F6 


26: 88 85 1 FFF 


05FB 


83 C7 UF 


05FE 


FE CE 


0600 


75 EC 


0602 


5E 


0603 


5F 


0604 


't7 


0605 


E2 E3 


0607 


E9 OIUU R 


060A 




060A 


26: 32 05 


060D 


AA 


060E 


AC 


060F 


26: 32 85 1FFF 


061U 


EB EO 


0616 




0616 


8A D3 



17 


ENDP 










CLEAR A 


SINGLE 


ROW 




18 


PROC 


NEAR 








MOV 


CL,DL 




NUMBER OF BYTES IN F 1 ELD 




PUSH 


Dl 




SAVE POINTER 




REP 


STOSB 




STORE THE NEW VALUE 




POP 


Dl 




POINTER BACK 




ADD 


DI,2000H 


; POINT TO ODD FIELD 




PUSH 


Dl 








MOV 


CL,DL 








REP 


STOSB 




FILL THE ODD FILELD 




POP 


01 








RET 






RETURN TO CALLER 


18 


ENDP 








GRAPHICS WRITE 






THIS 


ROUTINE 


WRITES 


THE ASCI 1 


CHARACTER TO THE CURRENT 


POSI 


TION ON 


THE SCREEN. 




ENTRY 










AL = 


CHARACTER TO WRITE 





BL = COLOR ATTRIBUTE TO BE USED FOR FOREGROUND COLOR 

IF BIT 7 IS SET, THE CHAR IS XOR'D INTO THE REGEN BUFFER 
(0 IS USED FOR THE BACKGROUND COLOR) 
CX = NUMBER OF CHARS TO WRITE 
DS = DATA SEGMENT 
ES = REGEN SEGMENT 
EXIT -- 
NOTHING IS RETURNED 

GRAPHICS READ 

THIS ROUTINE READS THE ASCII CHARACTER AT THE CURRENT CURSOR 
POSITION ON THE SCREEN BY MATCHING THE DOTS ON THE SCREEN TO THE 
CHARACTER GENERATOR CODE POINTS 
ENTRY — 

NONE (0 IS ASSUMED AS THE BACKGROUND COLOR) 
EXIT -- 
AL = CHARACTER READ AT THAT POSITION (0 RETURNED IF NONE FOUND) 

FOR BOTH ROUTINES, THE IMAGES USED TO FORM CHARS ARE CONTAINED IN ROM 
FOR THE 1ST 128 CHARS. TO ACCESS CHARS IN THE SECOND HALF, THE USER 
MUST INITIALIZE THE VECTOR AT INTERRUPT 1 FH (LOCATION 0007CH) TO 
POINT TO THE USER SUPPLIED TABLE OF GRAPHIC IMAGES (8X8 BOXES). 
FAILURE TO DO SO WILL CAUSE IN STRANGE RESULTS 



ASSUME CS: CODE, DS: DATA, ES: DATA 

GRAPHICS_WRITE PROC NEAR 

MOV All,0 ; ZERO TO HIGH OF CODE POINT 

PUSH AX ; SAVE CODE POINT VALUE 



AL,80H 



IN REGEN BUFFER TO PUT CODE POINTS 



RECOVER CODE POINT 
IS IT IN SECOND HALF 
YES 



■ DETERMINE POSITION 

CALL S26 
MOV D I , AX 

• DETERMINE REGION TO GET CODE POINTS FROM 

POP 
CMP 
JAE 

• IMAGE IS IN FIRST HALF, CONTAINED IN ROM 



MOV 
PUSH 
JMP 



SI, OFFSET CKr_CHAR_GEN 
CS 



OFFSET OF IMAGES 
SAVE SEGMENT ON STACK 
DETERMINE_MODE 



IN SECOND HALF, IN USER RAM 



SUB 


AL,80H 


PUSH 


DS 


SUB 


SI, SI 


MOV 


DS,SI 


ASSUME 


DS:ABSO 


LDS 


SI, EXT PTR 


MOV 


DX,DS 


ASSUME 


DS:OATA 


POP 


DS 


PUSH 


DX 



EXTEND_CHAR 

ZERO ORIGIN FOR SECOND HALF 

SAVE DATA PCI NTER 

ESTABLISH VECTOR ADDRESSING 



DETERMINE GRAPHICS MODE IN OPERATION 



SAL 


AX, 1 


SAL 


AX, 1 


SAL 


AX, 1 


ADD 


SI ,AX 


CMP 


CRT MODE 


POP 


DS 



HIGH RESOLUTION MODE 



PUSH 


Dl ; 


PUSH 


SI ; 


MOV 


DH,i| ; 


LODSB 




TEST 


BL,80H ; 


JNZ 


S6 ; 


STOSB 




LODSB 




MOV 


ES:[DI+2000H-1 ],A 


ADD 


Dl,79 ; 


DEC 


DH ; 


JNZ 


Sk 


POP 


SI 


POP 


Dl ; 


INC 


Dl ; 


LOOP 


S3 ; 


JMP 


VIDEO_RETURN 


XOR 


AL,ES: [ Dl ] ; 


STOSB 




LODSB 




XOR 


AL,ES:[DI+2000H-1 


JMP 


S5 ; 


MEDIUM 


RESOLUTION WRITE 


MOV 


DL,BL ; 


SAL 


D 1 , 1 



DETERMINE_MODE 
MULT I PLY CODE POINT 
VALUE BY 8 

SI HAS OFFSET OF DESIRED CODES 



H I GH_CHAR 

SAVE REGEN POINTER 

SAVE CODE POINTER 

NUMBER OF TIMES THROUGH LOOP 



GET BYTE FROM CODE POINTS 
SHOULD WE USE THE FUNCTION 

TO PUT CHAR IN 
STORE IN REGEN BUFFER 



; STORE IN SECOND HALF 
MOVE TO NEXT ROW IN REGEN 
DONE WITH LOOP 



RECOVER REGEN POINTER 
POINT TO NEXT CHAR POSITION 
MORE CHARS TO WRITE 



EXCLUSIVE OR WITH CURRENT 
STORE THF CODE POINT 
AGAIN FOR ODD FIELD 



BACK TO MAINSTREAM 



MED_RES__WRITE 

SAVE HIGH COLOR BIT 

0FFSET*2 SINCE 2 BYTES/CHAR 



5-138 Video 



061A 


E8 


06F1 R 




061D 








061D 


57 






oeiE 


56 






061F 


B6 


04 




0621 








0621 


AC 






0622 


E8 


0706 R 




0625 


23 


03 




0627 


F6 


C2 80 




062A 


74 


07 




062C 


26 


32 25 




062F 


26 


32 45 


01 


0633 








0633 


26 


88 25 




0636 


26 


88 45 


01 


063A 


AC 






063B 


E8 


0706 R 




063E 


23 


03 




06U0 


F6 


02 80 




0643 


74 


OA 




0645 


26 


32 A5 


2000 


064A 


26 


32 85 


2001 


06UF 








064F 


26 


88 A5 


2000 


0654 


26 


88 85 


2001 


0659 


83 


C7 50 




065C 


FE 


CE 




065E 


75 


CI 




0660 


5E 






0661 


5F 






0662 


47 






0663 


47 






0664 


E2 


B7 




0666 


E9 


0144 R 




0669 








0669 








0669 


E8 


0745 R 




066C 


8B 


FO 




066E 


83 


EC 08 




0671 


8B 


EC 




0673 


80 


3E 004S 


R 


0678 


06 






0679 


IF 






067A 


72 


1A 





PUSH 
PUSH 
MOV 

LODSB 
CALL 
AND 
TEST 



MOV 

MOV 

LODSB 

CALL 

AND 

TEST 



JZ 



S21 

AX,BX 

DL,8CH 

S10 

AH.ES: [Dl ] 

AL,ES: [DI+1 ] 



MOV 
MOV 
ADD 
DEC 
JNZ 
POP 
POP 
I NO 
I NO 
LOOP 
JMP 
GRAPH1CS_WRITE 



EXPAND BL TO FULL WORD OF COLOR 

MED_CHAR 

SAVE REGEN POINTER 

; SAVE THE CODE POINTER 
NUMBER OF LOOPS 

GET CODE POINT 
DOUBLE UP ALL THE BITS 

CONVERT THEM TO FOREGROUND COLOR ( BACK ) 
IS THIS XOR FUNCTION 
NO, STORE IT IN AS IT IS 
DO FUNCTION WITH HALF 
AND WITH OTHER HALF 



ES:[DI 



S21 

AX,BX 

DL,80H 



,AH 



STORE FIRST BYTE 
STORE SECOND BYTE 
GET CODE POINT 

CONVERT TO COLOR 

AGAIN, IS THIS XOR FUNCTION 

NO, JUST STORE THE VALUES 

; FUNCTION WITH FIRST HALF 
; AND WITH SECOND HALF 

• I+2000H],Ah' 

ll+2000H+1],AL ; STORE IN SECOND PORTION OF BUFFER 

I ; POINT TO NEXT LOCATION 

; KEEP GOING 

; RECOVER CODE PONTER 

; RECOVER REGEN POINTER 

; POINT TO NEXT CHAR POSITION 

; MORE TO WRITE 



GRAPHICS READ 



GRAPHICS_READ PROC NEAR 

CALL S26 

MOV S I , AX 

SUB SP,8 

MOV BP,SP 

. DETERMINE GRAPHICS MODES 



CONVERTED TO OFFSET IN REGEN 

SAVE IN SI 

ALLOCATE SPACE TO SAVE THE READ CODE POINT 

POINTER TO SAVE AREA 



CMP 
PUSH 
POP 



CRT_M0DE,6 



UGH RESOLUTION READ 



0670 


86 


04 




067E 








067E 


8A 


04 




0680 


88 


46 


00 


0683 


45 






0684 


8A 


84 


2000 


0688 


88 


46 


00 


068B 


45 






068C 


83 


06 


50 


068F 


FE 


OE 




0691 


75 


EB 




0693 


EB 


17 


90 


0696 








0696 


Dl 


E6 




0698 


B6 


04 




069A 








069A 


E8 


0728 R 


0690 


81 


06 


2000 


06A1 


E8 


0728 R 


06A4 


81 


EE 


1FB0 


06A8 


FE 


CE 




06AA 


75 


EE 




06AC 








06AC 


BF 


0000 E 


06AF 


OE 






06B0 


07 






06B1 


83 


ED 


08 


06B4 


8B 


F5 




06B6 


FC 






06B7 


BO 


00 




06B9 








06B9 


16 






06BA 


IF 






06BB 


BA 


0080 


06BE 








06BE 


56 






06BF 


^1 






0600 


B9 


0008 


06C3 


F3/ A6 




06C5 


8A 


IE 


0017 R 


0609 


5F 






06CA 


5E 






06CB 


74 


IE 




060D 


FE 


CO 




06CF 


83 


07 


08 


06D2 


4A 






06D3 


75 


E9 




06D5 


3C 


00 




06D7 


74 


12 




06D9 


2B 


CO 




06DB 


8E 


D8 




06DD 


04 


3E 


0070 R 


06E1 


80 


00 




06E3 


OB 


07 




06E5 


74 


04 




06E7 


BO 


80 




06E9 


EB 


CE 




06EB 








06EB 


83 


C4 


08 


06EE 


E9 


0144 R 



S13: 
S14: 



ADD 5 1,80 

DEC DH 

JNZ S12 

JMP 815 

MEDIUM RESOLUTION READ 



CALL 

ADD 

CALL 

SUB 

DEC 

JNZ 



S23 

SI,2000H 
S23 
SI,20OOH-8O 



GET FIRST BYTE 

SAVE IN STORAGE AREA 

NEXT LOCATION 

GET LOWER REGION BYTE 

ADJUST AND STORE 

POINTER INTO REGEN 

LOOP CONTROL 

DO IT SOME MORE 

GO MATCH THE SAVED CODE POINTS 



MED_RES_READ 

0FFSET*2 SINCE 2 BYTES/CHAR 

NUMBER OF PASSES 

GET PAIR BYTES FROM REGEN INTO SINGLE SAVE 

GO TO LOWER REGION 

GET THIS PAIR INTO SAVE 

ADJUST POINTER BACK INTO UPPER 



KEEP GOING UNTIL ALL 8 DONE 



SAVE AREA HAS CHARACTER IN IT, MATCH IT 
; F I ND_CHAR 
OFFSET ORT_CHAR_GEN ; ESTABLISH ADDRESSING 



MOV 
PUSH 
POP 
SUB 
MOV 
CLD 
MOV 

PUSH 
POP 
MOV 

PUSH 

PUSH 

MOV 

REPE 

MOV 

POP 

POP 

JZ 

INC 

ADD 

DEC 

JNZ 



ESTABLISH ADDRESSING TO STACK 
FOR THE STRING COMPARE 
NUMBER TO TEST AGAINST 

SAVE SAVE AREA POINTER 
SAVE CODE POINTER 
NUMBER OF BYTES TO MATCH 
COMPARE THE 8 BYTES 
READ ANY BYTE OF STORAGE 
RECOVER THE POINTERS 

I F ZERO FLAG SET, THEN MATCH OCCURRED 
NO MATCH, MOVE ON TO NEXT 
NEXT CODE POINT 
LOOP CONTROL 
DO ALL OF THEM 



CHAR NOT MATCHED, MIGHT BE IN USER SUPPLIED SECOND HALF 



CMP 

JE 

SUB 

MOV 

ASSUME 

LES 

MOV 

OR 

JZ 

MOV 

JMP 

ASSUME 



AL, 

S18 

AX, AX 

DS,AX 

DS:ABS0 

Dl ,EXT_PTR 

AX, ES 

AX, Dl 

S18 

AL,128 

S16 

DS:DATA 



ESTABLISH ADDRESSING TO VECTOR 

GET POINTER 

SEE IF THE POINTER REALLY EXISTS 
IF ALL 0, THEN DOESN'T EXIST 
NO SENSE LOOKING 
ORIGIN FOR SECOND HALF 
GO BACK AND TRY FOR IT 




CHARACTER IS FOUND ( AL=0 IF NOT FOUND ) 



Video 5-139 



06F1 






06F1 


80 


E3 


06 FU 


RA 


C3 


06 F6 


51 




06F7 


RQ 


0003 


06 FA 






06 FA 


DO 


to 


06 FC 


DO 


EO 


06FE 


OA 


D8 


0700 


F? 


F8 


0702 


8A 


FB 


07014 


59 




0705 


C3 




0706 







0706 






0706 


5? 




0707 


51 




0708 


53 




0709 


2B 


02 


070B 


B9 


0001 


070E 






070E 


«B 


Oft 


0710 


?3 


09 


0712 


OB 


03 


0714 


[)1 


EO 


0716 


01 


K1 


0718 


8B 


U8 


071A 


23 


uy 


071C 


OB 


03 


071E 


01 


El 


0720 


/3 


EC 


0722 


fiB 


(J2 


072(4 


5B 




0725 


59 




0726 


5A 




0727 


03 




0728 







0728 






0728 


«A 


2'4 


072A 


ftA 


i4l4 01 


072D 


B9 


cooo 


0730 


B2 


00 


0732 






0732 


85 


CI 


073U 


F8 




0735 


fH 


01 


0737 


F9 




0738 


no 


02 


073A 


ni 


E9 


073C 


01 


E9 


073E 


73 


F2 


07<40 


88 


56 00 


0743 


i45 




07i4U 


c;3 




0745 







0745 






07145 


A1 


0050 R 


07148 






0748 


53 




0749 


8B 


D8 


074B 


8A 


Cl4 


074D 


1-6 


26 OO^A R 


0751 


ni 


EO 


0753 


ni 


EO 


0755 


2A 


FF 


0757 


03 


C3 


0759 


5B 




075A 


a 




075B 







GRAPHICS_READ ENDP 

EXPAND MED_COLOR 

THIS ROUTINE EXPANDS THE LOW 2 BITS IN BL TO 

FILL THE ENTIRE BX REGISTER 
ENTRY -- 

BL - COLOR TO BE USED ( LOW 2 BITS ) 
EXIT -- 

BX = COLOR TO BE USED ( 8 REPLICATIONS OF THE 2 COLOR BITS ) 



ISOLATE THE COLOR BITS 

COPY TO AL 

SAVE REGISTER 

NUMBER OF TIMES TO DO THIS 



PROC 


NFAR 


AND 


BL,3 


MOV 


AL,BL 


PUSH 


CX 


MOV 


CX,3 


SAL 


AL, 1 


SAL 


AL,1 


OR 


BL,AL 


LOOP 


S20 


MOV 


BH,BL 


POP 


CX 


RET 




ENDP 





LEFT SHI FT BY 2 

ANOTHER COLOR VERSION INTO BL 

FILL ALL OF BL 

Fl LL UPPER PORTION 

REGISTER BACK 

ALL DONE 



EXPAND_BYTE 
THIS ROUTINE TAKES THE BYTE IN AL AND DOUBLES ALL 
OF THE BITS, TURNING THE 8 BITS INTO 16 BITS. 
THE RESULT IS LEFT IN AX 



PROC 


NEAR 


PUSH 


DX 


PUSH 


CX 


PUSH 


BX 


SUB 


DX,DX 


MOV 


CX, 1 


MOV 


BX,AX 


AND 


BX,CX 


OR 


DX,BX 


SHL 


AX,1 


SHL 


CX, 1 


MOV 


BX.AX 


AND 


BX.CX 


OR 


DX,BX 


SHL 


CX, 1 


JNC 


S22 


MOV 


AX,DX 


POP 


BX 


POP 


CX 


POP 


DX 


RET 




ENDP 





SAVE REGISTERS 



BASE INTO TEMP 

USE MASK TO EXTRACT ABIT 

PUT INTO RESULT REGISTER 

SHIFT BASE AND MASK BY 1 

BASE TO TEMP 

EXTRACT THE SAME BIT 

PUT INTO RESULT 

SHIFT ONLY MASK NOW, MOVING TO NEXT BASE 

USE MASK BIT COMING OUT TO TERMINATE 

RESULT TO PARM REGISTER 

RECOVER REGISTERS 

ALL DONE 



MED_READ_BYTE 

THIS ROUTINE WILL TAKE 2 BYTES FROM THE REGEN BUFFER, 

COMPARE AGAINST THE CURRENT FOREGROUND COLOR, AND PLACE 

THE CORRESPONDING ON/OFF BIT PATTERN INTO THE CURRENT 

POSITION IN THE SAVE AREA 
ENTRY — 

SI,DS = POINTER TO REGEN AREA OF INTEREST 

BX = EXPANDED FOREGROUND COLOR 
POINTER TO SAVE AREA 



EXIT ■ 



IS INCREMENT AFTER SAVE 



MOV 


AH, [SI ] 


MOV 


AL.[SI+1 1 


MOV 


CX,0C0O0H 


MOV 


DL,0 


TEST 


AX,CX 


CLC 




JZ 


S25 


STC 




RCL 


DL, 1 


SHR 


CX,1 


SHR 


CX, 1 


JNC 


S2f4 


MOV 


[BP],DL 



GET FIRST BYTE 

GET SECOND BYTE 

2 BIT MASK TO TEST THE ENTRIES 

RESULT REGISTER 

IS THIS SECTION BACKGROUND? 
CLEAR CARRY IN HOPES THAT IT IS 

IF ZERO, IT IS BACKGROUND 
WASN'T, SO SET CARRY 
MOVE THAT BIT INTO THE RESULT 

MOVE THE MASK TO THE RIGHT BY 2 BITS 
DO IT AGAIN IF MASK DIDN'T FALL OUT 
STORE RESULT IN SAVE AREA 
ADJUST POINTER 
ALL DONE 



ENDP 



V4_P0SITI0N 
THIS ROUTINE TAKES THE CURSOR POSITION CONTAINED IN 
THE MEMORY LOCATION, AND CONVERTS IT INTO AN OFFSET 
INTO THE REGEN BUFFER, ASSUMING ONE BYTE/CHAR. 
FOR MEDIUM RESOLUTION GRAPHICS, THE NUMBER MUST 
BE DOUBLED. 

LNIRY — NO REGISTERS, MEMORY LOCATION CURSOR_POSN IS USED 

EXIT-- 
AX CONTAINS OFFSET INTO REGEN BUFFER 



S26 


PROC 


NEAR 




MOV 


AX, CURSOR POSN 


GRAPH 


POSN 


LABEL NEAR 




PUSH 


BX 




MOV 


BX,AX 




MOV 


AL,AH 




MUL 


BYTE PTR CRT COLS 




SHL 


AX, 1 




SHL 


AX, 1 




SUB 


BH,BH 




ADD 


AX, BX 




POP 


BX 




RET 




S26 


ENDP 





GET CURRENT CURSOR 

SAVE REGISTER 

SAVE A COPY OF CURRENT CURSOR 

GET ROWS TO AL 

MULTIPLY BY BYTES/COLUMN 

MULTIPLY * U SINCE U ROWS/BYTE 

ISOLATE COLUMN VALUE 
DETERMINE OFFSET 
RECOVER POINTER 
ALL DONE 



WRITE_TTY 

THIS INTERFACE PROVIDES A TELETYPE LIKE INTERFACE TO THE 

VIDEO CARD. THE INPUT CHARACTER IS WRITTEN TO THE CURRENT 

CURSOR POSITION, AND THE CURSOR IS MOVED TO THE NEXT POSITION. 

IF THE CURSOR LEAVES THE LAST COLUMN OF THE FIELD, THE COLUMN 

IS SET TO ZERO, AND THE ROW VALUE IS INCREMENTED. IF THE ROW 

ROW VALUE LEAVES THE FIELD, THE CURSOR IS PLACED ON THE LAST ROW, 

FIRST COLUMN, AND THE ENTIRE SCREEN IS SCROLLED UP ONE LINE. 

WHEN THE SCREEN IS SCROLLED UP, THE ATTRIBUTE FOR FILLING THE 

NEWLY BLANKED LINE IS READ FROM THE CURSOR POSITION ON THE PREVIOUS 

LINE BEFORE THE SCROLL, IN CHARACTER MODE. IN GRAPHICS MODE, 

THE COLOR IS USED. 

ENTRY — 

(AH) = CURRENT CRT MODE 

(AL) = CHARACTER TO BE WRITTEN 

NOTE THAT BACK SPACE, CAR RET, BELL AND LINE FEED ARE HANDLED 



5-140 Video 



AS COMMANDS RATHER THAN AS DISPLAYABLE GRAPHICS 
(BL) = FOREGROUND COLOR FOR CHAR WRITE IF CURRENTLY IN A GRAPHICS MODE 
EXIT -- 

ALL REGISTERS SAVED 



075B 






075B 


50 




075C 


5U 




075D 


m 


03 


OCdV 


HA 


3E 0062 R 


0763 


CD 


10 


0765 


58 




0766 


3C 


08 


0768 


7U 


52 


076A 


3C 


OD 


076C 


7U 


57 


076E 


3(; 


OA 


0770 


m 


57 


0772 


3C 


07 


077U 


7U 


5A 


0116 


BU 


OA 


0778 


By 


0001 


077B 


CD 


10 


077D 


FF 


02 


077F 


3 A 


16 OOUA R 


0783 


75 


33 


0785 


B? 


00 


0787 


«() 


FE 18 


078A 


75 


2A 



ASSUME 
WRITE_TTY 

PUSH 
PUSH 
MOV 
MOV 



AX 
AX 



AH, 3 

BH,ACTI' 

10H 



_PAGE 
10H 
POP 

DX NOW HAS THE CURRENT CURSOR POSITION 



GET CURRENT PAGE SETTING 

READ THE CURRENT CURSOR POSITION 

RECOVER CHAR 



CMP 
JE 
CMP 
JE 
CMP 
JE 
CMP 



AL,8 

U8 

AL.ODH 

U9 

AL,OAH 

UIO 

AL,07H 



■ WRITE THE CHAR TO THE SCREEN 



POSITION THE CURSOR FOR NEXT CHAR 

INC DL 

CMP DL, BYTE PTR CRT_COLS 



JNZ U6 
SCROLL REQUIRED 



IS IT A BACKSPACE 

BAG K_S PACE 

IS IT CARRIAGE RETURN 

CAR_RET 

IS IT A LINE FEED 

LINE_FEED 

IS IT A BELL 

BELL 



WRITE CHAR ONLY 
ONLY ONE CHAR 
WRITE THE CHAR 



TEST FOR COLUMN OVERFLOW 

SET_CURSOR 

COLUMN FOR CURSOR 



SET_CURSOR_INC 



078C 


BU 


02 


078E 


CD 


10 


0790 


AO 


00149 R 


0793 


3C 


04 


0795 


72 


06 


0797 


3C 


07 


0799 


87 


00 


079B 


75 


06 


079D 






079D 


BJ+ 


08 


079F 


CD 


10 


07A1 


8A 


FC 


07A3 






07A3 


B8 


0601 


07A6 


2B 


C9 


07A8 


B6 


18 


07AA 


8A 


16 OOUA R 


07AE 


FE 


CA 


07 BO 






07 BO 


CD 


10 


07B2 






07B2 


58 




07B3 


E9 


0144 R 


07B6 






07B6 


FE 


C6 


07B8 






07B8 


B4 


02 


07BA 


EB 


F4 


07BC 






07BC 


80 


FA 00 


07BF 


74 


F7 


07C1 


FE 


CA 


07C3 


EB 


F3 


07C5 






07C5 


B2 


00 


07C7 


EB 


EF 


07C9 






07C9 


80 


FE 18 


07CC 


75 


E8 


07CE 


EB 


BC 


07D0 






07D0 


B3 


02 


07D2 


E8 


0000 E 


07D5 


EB 


DB 


07D7 







MOV AH, 2 

INT 10H ; SET THE CURSOR 

DETERMINE VALUE TO FILL WITH DURING SCROLL 

MOV AL,CRT_MODE ; GET THE CURRENT MODE 

CMP AL,4 

JC U2 ; READ-CURSOR 

CMP AL,7 

MOV BH,0 

JNE U3 



MOV 
INT 
MOV 



MOV 
SUB 
MOV 
MOV 
DEC 



AX, 601 H 

CX, CX 

DH,24 

DL, BYTE PTR CRT_COLS 



VIDEO_RETURN 



BACK SPACE FOUND 





DEC DL 
JMP U7 


— - 


- CARRIAGE RETURN FOUND 


9: 


MOV DL,0 
JMP U7 





- LINE FEED FOUND 


10: 


CMP DH,24 





CMP DH,2i 




JNE U6 




JMP U1 


. 


- BELL FOUND 


Ull: 






MOV BL.2 




CALL BEEP 




JMP U5 


WRITE 


TTY ENDP 



; READ-CURSOR 



SCROLL-UP 
SCROLL ONE LINE 
UPPER LEFT CORNER 
LOWER RIGHT ROW 
LOWER RIGHT COLUMN 

VIDEO-CALL-RETURN 

SCROLL UP THE SCREEN 

TTY-RETURN 

RESTORE THE CHARACTER 

RETURN TO CALLER 

SET-CURSOR- INC 
NEXT ROW 
SET-CURSOR 

; ESTABLISH THE NEW CURSOR 



ALREADY AT END OF LINE 

SET_CURSOR 

NO -- JUST MOVE IT BACK 

SET_CURSOR 



BOTTOM OF SCREEN 

YES, SCROLL THE SCREEN 

NO, JUST SET THE CURSOR 



SET UP C0UN1 FOR BEEP 
SOUND THE POD BELL 
TTY_RETURN 



LIGHT PEN 

THIS ROUTINE TESTS THE LIGHT PEN SWITCH AND THE LIGHT 
PEN TRIGGER. IF BOTH ARE SET, THE LOCATION OF THE LIGHT 
PEN IS DETERMINED. OTHERWISE, A RETURN WITH NO INFORMATION 
IS MADE. 
ON EXIT: 

(AH) =0 IF NO LIGHT PEN INFORMATION IS AVAILABLE 

BX,CX,DX ARE DESTROYED 
(AH) = 1 IF LIGHT PEN IS AVAILABLE 

(DH.DL) = ROW, COLUMN OF CURRENT LIGHT PEN POSITION 

(CH) = RASTER POSITION 

(BX) = BEST GUESS AT PIXEL HORIZONTAL POSITION 



07D7 

07D7 03 03 05 05 03 03 

03 04 
07DF 



ASSUME CS:CODE,DS:DATA 
SUBTRACT_TABLE 
LABEL BYTE 
DB 3,3,5.5,3,3,3,4 ; 



Video 5-141 



• WAIT FOR LIGHT PEN TO BE DEPRESSED 



07DF 


B4 


00 




07E1 


8B 


16 


0063 R 


07E5 


83 


02 


06 


07E8 


EC 






07E9 


A8 


04 




07EB 


74 


03 




07ED 


E9 


0872 R 


07 FO 


A8 


02 




07F2 


75 


03 




07FU 


E9 


087C R 


07F7 








07F7 


B4 


10 




07F9 


88 


16 


0063 R 


07FD 


8A 


C4 




07FF 


EE 






0800 


EB 


00 




0802 


42 






0803 


EC 






0804 


8A 


E8 




0806 


4A 






0807 


FE 


C4 




0809 


8A 


C4 




080B 


EE 






080C 


42 






080D 


EB 


00 




080F 


EC 






0810 


8^ 


E5 




0812 


8A 


IE 


O049 R 


0816 


2A 


FF 




0818 


2E 


8A 


9F 07D7 R 


08 ID 


2B 


C3 




08 IF 


8B 


IE 


004E R 


0823 


D1 


EB 




0825 


2B 


C3 




0827 


79 


0? 




0829 


2B 


CO 




082B 








082B 


B1 


03 




082D 


80 


3E 


0049 R 04 


0832 


72 


2A 




0834 


80 


3E 


0049 R 07 


0839 


74 


23 




083B 


B2 


28 




083D 


F6 


F2 




083F 


8A 


E8 




0841 


02 


ED 




0843 


8A 


DC 




0845 


2A 


FF 




0847 


80 


3E 


0049 R 06 


084C 


75 


04 




084E 


B1 


04 




0850 


DO 


E4 




0852 








0852 


D3 


E3 




0854 


8A 


D4 




0856 


8A 


FO 




0858 


DO 


EE 




085A 


DO 


EE 




085C 


EB 


12 




085E 








085E 


F6 


36 


004A R 


0862 


8A 


FO 




0864 


8A 


D4 




0866 


D2 


EO 




0868 


8A 


E8 




086A 


8A 


DC 




086C 


32 


FF 




086E 


D3 


E3 




0870 








0870 


B4 


01 




0872 








0872 


52 






0873 


8B 


16 


0O63 R 


0877 


83 


C2 


07 


087A 


EE 






087B 


5A 






087C 








087C 


5D 






0870 


5F 






087E 


5E 






087F 


IF 






0880 


IF 






0881 


IF 






0882 


IF 






0883 


07 






0884 


CF 






0885 








0885 









V7: 



MOV 


AH,0 


MOV 


DX,ADDR 6845 


ADD 


DX,6 


IN 


AL,DX 


TEST 


AL,4 


JZ 


V6 A 



SET NO LIGHT PEN RETURN CODE 

GET BASE ADDRESS OF 6845 

POINT TO STATUS REGISTER 

GET STATUS REGISTER 

TEST LIGHT PEN SWITCH 

GO I F YES 

NOT SET, RETURN 



NOW TEST FOR LIGHT PEN TRIGGER 

TEST AL,2 
JNZ V7A 
JMP V7 

TRIGGER HAS BEEN SET, READ THE VALUE 



MOV AH, 16 ; LIGHT PEN REGISTERS ON 6845 

INPUT REGS POINTED TO BY AH, AND CONVERT TO ROW COLUMN IN DX 

; ADDRESS REGISTER FOR 6845 

; REGISTER TO READ 

; SET IT UP 

; 10 DELAY 

; DATA REGISTER 

; GET THE VALUE 

; SAVE IN CX 

; ADDRESS REGISTER 

; SECOND DATA REGISTER 

; POINT TO DATA REGISTER 

; 10 DELAY 

; GET SECOND DATA VALUE 

; AX HAS INPUT VALUE 

IN FROM THE 6845 



MODE VALUE TO BX 

DETERMINE AMOUNT TO SUBTRACT 

TAKE IT AWAY 



MOV 


DX,ADDR 6845 


MOV 


AL,AH 




OUT 


DX,AL 




JMP 


SHORT 


$+2 


INC 


DX 




IN 


AL,DX 




MOV 


CH,AL 




DEC 


DX 




INC 


AH 




MOV 


AL,AH 




OUT 


DX,AL 




INC 


DX 




JMP 


SHORT 


$+2 


IN 


AL,DX 




MOV 


AH.CH 




\X HAS 


THE VALUE READ 


MOV 


BL,CRT 


_MODE 


SUB 


BH,BH 




MOV 


BL.CS: 


VI [BX] 


SUB 


AX,BX 




MOV 


BX,CRT 


_START 


SHR 


8X, 1 




SUB 


AX, BX 




JNS 


V2 




SUB 


AX, AX 





• DETERMINE MODE OF OPERATION 



MOV 


CL, 3 


CMP 


CRT MODE, 4 


JB 


V4 


CMP 


CRT MODE, 7 



GRAPHICS MODE 



DETERMINE GRAPHIC ROW POSITION 

MOV CH,AL 

ADD CH,CH 

MOV BL,AH 

SUB BH,BH 

CMP CRT_M0DE,6 

JNE V3 

MOV CL,4 

SAL AH,1 



DETERMINE ALPHA CHAR POSITION 

MOV DL,AH 

MOV DH,AL 

SHR DH,1 

SHR DH,1 

JMP SHORT V5 

ALPHA MODE ON LIGHT PEN 



DIV 
MOV 
MOV 
SAL 
MOV 
MOV 
XOR 
SAL 

MOV 

PUSH 
MOV 
ADD 
OUT 
POP 



BYTE PTR CRT_COLS 

DH,AL 

DL,AH 

AL,CL 

CH,AL 

BL,AH 

BH,BH 

BX,CL 

AH, 1 



DX,ADDR_6845 

DX,7 

DX,AL 



POP 
POP 
POP 
POP 
POP 
POP 
POP 
POP 
I RET 

READ_LPEN 

CODE ENDS 
END 



CONVERT TO CORRECT PAGE ORIGIN 
IF POSITIVE, DETERMINE MODE 
<0 PLAYS AS 



DETERMINE_MODF 

SET *8 SHIFT COUNT 

DETERMINE IF GRAPHICS OR ALPHA 

ALPHA_PEN 



DIVISOR FOR GRAPHICS 
DETERMINE ROW(AL) AND COLUMN(AH) 
AL RANGE 0-99, AH RANGE 0-39 



SAVE ROW VALUE IN CH 

*2 FOR EVEN/ODD FIELD 

COLUMN VALUE TO BX 

MULTIPLY BY 8 FOR MEDIUM RES 

DETERMINE MEDIUM OR HIGH RES 

NOT_HIGH_RES 

SHIFT VALUE FOR HIGH RES 

COLUMN VALUE TIMES 2 FOR HIGH RES 

NOT_HIGH_RES 

MULTIPLY *16 FOR HIGH RES 



COLUMN VALUE FOR RETURN 
ROW VALUE 
DIVIDE BY 4 

FOR VALUE IN 0-24 RANGE 
L I GHT_PEN_RETURN_SET 



ALPHA_PEN 

DETERMINE ROW, COLUMN VALUE 
ROWS TO DH 
COLS TO DL 
MULT I PLY ROWS * 8 
GET RASTER VALUE TO RETURN REG 
COLUMN VALUE 
TO BX 

LIGHT_PEN_RETURN_SET 

INDICATE EVERTHING SET 

LIGHT_PEN_RETURN 

SAVE RETURN VALUE (IN CASE) 

GET BASE ADDRESS 

POINT TO RESET PARM 

ADDRESS, NOT DATA, IS IMPORTANT 

RECOVER VALUE 

RETURN_NO_RESET 



DISCARD SAVED BX,CX, DX 



5-142 Video 



TITLF 1 


1/22/83 BIOS 


.LIST 




INCLUDE 


SEGMENT. SRC 


CODE SEGMENT BYTE PUBLIC 


EXTRN 


CR0U2:NEAR 


EXTRN 


DBF 42: NEAR 


EXTRN 


DDS:NEAR 


EXTRN 


PRT HEX: NEAR 


EXTRN 


D1 :NEAR 


EXTRN 


D2:NEAR 


EXTRN 


P MSG:NLAR 


EXTRN 


D2A:NEAR 


EXTRN 


PRT SEG:NEAR 


EXTRN 


PROC SHUTDOWN: NEAR 


EXTRN 


CM3:NEAR 


EXTRN 


E MSC:NEAR 



PUBLIC MEM0RY_SIZE_DETERMINE_1 

PUBLIC EQUIPMENT^! 

PUBLIC NMI_INT_1 

PUBLIC SET_TOD 



--- INT 12 

MEMORY_S I ZE_DETERM I NE 

THIS ROUTINE RETURNSS THE AMOUNT OF MEMORY IN THE 

SYSTEM AS DETERMINED BY THE POST ROUTINES. 

NOTE THAT THE SYSTEM MAY NOT BE ABLE TO USE I/O MEMORY 

UNLESS THERE IS A FULL COMPLEMENT OF 512K BYTES ON THE 

PLANAR. 



INPUT 



NO REGISTERS 

THE MEMORY_SIZE VARIARIF IS SET DURING POWER ON 

DIAGNOSTICS ACCORDING TO THE FOLLOWING ASSUMPTIONS: 



2. ALL INSTALLED MEMORY IS FUNCTIONAL. IF THE 
MEMORY TEST DURING POST INDICATES LESS, THEN THIS 
VALUE BECOMES THE DEFAULT. IF NON-VOLATILE MEMORY 

IS NOT VALID (NOT INITIALIZED OR BATTERY FAILURE) 
THEN ACTUAL MEMORY DETERMINED BECOMES THE DEFAULT. 

3. ALL MEMORY FROM TO 640K MUST BE CONTIGUOUS. 



(AX) = NUMBER OF CONTIGUOUS IK BLOCKS OF MEMORY 
ASSUME CS: CODE, DS: DATA 



0000 




0000 


FB 


0001 


IE 


0002 


E8 0000 E 


0005 


A1 0013 R 


0008 


IF 


0009 


CF 


OOOA 





MEM0RY_SIZE_DETERM1NE_1 PROC FAR 



STI 




INTERRUPTS BACK ON 


PUSH 


DS 


SAVE SEGMENT 


CALL 


DOS 


ESTABLISH ADDRESSING 


MOV 


AX, MEMORY SIZE 


GET VALUE 


POP 


DS 


RECOVER SEGMENT 


IRET 




RETURN TO CALLER 



MEM0RY_SIZE_DETERMINE_1 ENDP 



EQUIPMENT DETERMINATION 

THIS ROUTINE ATTEMPTS TO DETERMINE WHAT OPTIONAL 
DEVICES ARE ATTACHED TO THE SYSTEM. 
INPUT 

NO REGISTERS 

THE EQUIP_FLAG VARIABLE IS SET DURING THE POWER ON 
DIAGNOSTICS USING THE FOLLOWING HARDWARE ASSUMPTIONS: 
PORT 3FA = INTERRUPT ID REGISTER OF 8250 (PRIMARY) 

2FA = INTERRUPT ID REGISTER OF 8250 (SECONDARY) 
BITS 7-3 ARE ALWAYS 
PORT 378 = OUTPUT PORT OF PRINTER (PRIMARY) 

278 = OUTPUT PORT OF PRINTER (SECONDARY) 
3BC = OUTPUT PORT OF PRINTER (MONO-PRINTER) 
OUTPUT 

(AX) IS SET, BIT SIGNIFICANT, TO INDICATE ATTACHED I/O 
BIT 15,14 = NUMBER OF PRINTERS ATTACHED 
BIT 13, 12 NOT USED 

BIT 11,10,9 = NUMBER OF RS232 CARDS ATTACHED 
BIT 8 = NOT USED 

BIT 7,6 = NUMBER OF DISKETTE DRIVES 
00=1, 01=2 ONLY IF BIT = 1 
BIT 5,4 = INITIAL VIDEO MODE 

00 - UNUSED 

01 - 40X25 BW USING COLOR CARD 

10 - 80X25 BW USING COLOR CARD 

11 - 80X25 BW USING BW CARD 

BIT 3 = NOT USED 

BIT 2 = NOT USED 

BIT 1 = MATH COPROCESSOR 

BIT 0=1 ( I PL DISKETTE INSTALIFD) 

NO OTHER REGISTERS AFFECTED 



OOOA 




OOOA 


FB 


OOOB 


IE 


OOOC 


E8 0000 


000 F 


A1 0010 


001? 


IF 



ASSUME CS:CODE,DS:DATA 
EQU1PMENT_1 PROC FAR 



STI 



DS 



ENDP 



>» ENTRY POINT FOR ORG 0F84DH 
INIERRUPTS BACK ON 
SAVE SEGMENT REGISTER 
ESTABLISH ADDRESSING 
GET THE CURRENT SETTINGS 
RECOVER SEGMENT 
RETURN TO CALLER 



PUSH 
CALL 
MOV 
POP 
IKET 
EQUI PMENT_1 

-- INT 2 

NON-MASKABLE INTERRUPT ROUTINE (REAL MODE) 

THIS ROUTINE WILL PRINT A "PARITY CHECK 1 OR 2" MESSAGE 
AND ATTEMPT TO FIND THE STORAGE LOCATION CONTAINING THE 
BAD PARITY. IF FOUND, THE SEGMENT ADDRESS WILL BE 
PRINTED. IF NO PARITY ERROR CAN BE FOUND (INTERMITTENT 
READ PROBLEM) ?????<-WILL BE PRINTED WHERE THE ADDRESS 
WOULD NORMALLY GO. 



FE CO 
EB 00 
E6 80 



1 PROC 
ASSUME 
PUSH 

IN 

INC 
JMP 
OUT 


NEAR 
DS:DATA 
AX 

AL,MFG PORT 
AL 

SHORT $+2 
MFG_PORT,AL 


IN 
TEST 


AL, PORT B 

AL, PAR 1 TY_ERR 



PARITY CHECK? 



BIOS 5-143 



0021 


8A 


EC 


0023 


75 


03 


0025 


E9 


00C1 R 


0028 






0028 


80 


AD 


002A 


E8 


0000 E 


002D 


EU 


60 


002 F 


80 


CO 


0031 


E8 


0000 E 


003U 


E8 


0000 E 


0037 


E4 


60 


0039 


E6 


80 


003B 


BA 


R 


003 E 


8E 


DA 


0040 


BE 


0000 E 


00U3 


F6 


C4 40 


0046 


75 


03 


0048 


BE 


0000 E 


004B 






OOUB 


B4 


00 


004D 


AO 


0049 R 


0050 


CD 


10 


0052 


E8 


0000 E 


0055 


BO 


FF 


0057 


E6 


70 


0059 


E4 


61 


0058 


EB 


00 


005D 


OC 


OC 


005F 


E6 


61 


0061 


EB 


00 


0063 


24 


F3 


0065 


E6 


61 


0067 


8B 


IE 0013 


0068 


FC 




006C 


2B 


D2 


006E 






006 E 


8E 


DA 


0070 


8E 


02 


0072 


B9 


8000 


0075 


2B 


F6 


0077 


F3/ AD 


0079 


E4 


61 


007B 


86 


C4 


007D 


81 


FA 4000 


0081 


72 


OC 


0083 


81 


FA 8000 


0087 


73 


OC 


0089 


E4 


80 


0088 


A8 


10 


008D 


74 


06 


008F 


F6 


04 80 


0092 


EB 


04 90 


0095 


F6 


04 40 


0098 


75 




009A 


81 


02 1000 


009E 


83 


EB 40 


0OA1 


75 


CB 


00A3 


BE 


0000 E 


00A6 


E8 


0000 E 


00A9 


FA 




OOAA 


F4 




0OA8 






OOAB 


8C 


DA 


OOAD 


E8 


0000 E 


OOBO 


80 


28 


00B2 


E8 


0000 E 


00B5 


80 


53 


00B7 


E8 


0000 E 


OOBA 


80 


29 


OORC 


E8 


0000 E 


OOBF 


FA 




OOCO 


F4 




00C1 






00C1 


BO 


8F 


00C3 


E6 


70 


00C5 


E8 


00 


0OC7 


80 


OF 


00C9 


E6 


70 


OQCB 


58 




OOCC 


CF 




OOCD 









MOV 


AH,AL 




JNZ 


NMI 1 




JMP 


D14 


NMI 


_1: 








THE SWITCH SETTINGS 
AL.DIS KBD 




MOV 




CALL 


08042 




IN 


AL, PORT A 




MOV 


AL,READ 8042 INPUT 




CALL 


08042 




CALL 


08F 42 




IN 


AL, PORT A 




OUT 


MFG_PORT.AL 




MOV 


OX, DATA 




MOV 


DS,DX 




MOV 


SI, OFFSET 01 




TEST 


AH,40H 




JNZ 


NMI_2 




MOV 


SI, OFFSET D2 


NMI 


2: 






MOV 


AH,0 




MOV 


AL,CRT MODE 




INT 


10H 




CALL 


P MSG 






LOCATION THAT CAUSED 
AL,OFFH 




MOV 




OUT 


CMOS PORT,AL 




IN 


AL, PORT 8 




JMP 


SHORT $+2 




OR 


AL,RAM PAR OFF 




OUT 


PORT B,AL 




JMP 


SHORT $+2 




AND 


AL, RAM PAR ON 




OUT 


PORT B,AL 




MOV 


BX,MEMORY_SIZE 




OLD 






SUB 


DX,DX 


NMI 


LOOP: 






MOV 


DS,DX 




MOV 


ES,DX 




MOV 


CX,4000H*2 




SUB 


81, SI 




REP 


LODSW 




IN 


AL, PORT B 




XCHG 


AL,AH 




CMP 


DX,4000H 




J8 


NMI 3 




CMP 


DX,8000H 




JAE 


NMI 4 




IN 


AL,MFG PORT 




TEST 


AL, BASE RAM 




JZ 


NMI 4 


NMI 


3: TEST 


AH, PRTY CHK 




JMP 


NMI 5 


NMI 


4: TEST 


AH, 10 CHK 


NMI 


5: JNZ 


PRT NMI 




ADD 


DX,1000H 




SUB 


BX,16D*4 




JNZ 


NMI LOOP 




MOV 


SI, (OFFSET D2A) 




CALL 


P_MSG 




CLI 






HLT 




PRT 


NMI: 






MOV 


DX,DS 




CALL 


PRT SEG 




MOV 


AL,"^{ ' 




CALL 


PRT HEX 




MOV 


AL,'^S' 




CALL 


PRT HEX 




MOV 


AL,-^)' 




CALL 


PRT_HEX 




CLI 






HLT 




014 








MOV 


AL.SFH 




OUT 


CMOS PORT,AL 




JMP 


SHORT S+2 




MOV 


AL,OFH 




OUT 


CMOS PORT,AL 




POP 


AX 




IRET 




NMI 


INT 1 ENDP 



SAVE PARITY STATUS 
NO, EXIT FROM ROUTINE 



DISABLE THE KEYBOARD 

FLUSH 

GET THE SWITCH SETTINGS 
ISSUE THE COMMAND 
WAIT FOR OUTPUT BUFF FULL 
GET THE SWITCH 
SAVE SWITCH 



; ADDR OF ERROR MSG 

; I/O PARITY CHECK 

; DISPLAY ERROR MSG 

; MUST BE PLANAR 

; INIT AND SET MODE FOR VIDEO 



MASK TRAP 



GET MEMORY SIZE WORD 

SET DIR FLAG TO INCRIMENT 

POINT DX AT START OF MEM 



SET FOR 64KB SCAN 

SET SI TO BE REALTIVE TO 

START OF ES 

READ 64KB OF MEMORY 

SEE IF PARITY CHECK HAPPENED 

SAVE PARITY CHECK 

CHECK FOR END OF OF FIRST 256K 

CHECK ABOVE 51 2K 

CHECK FOR 10 CHECK 

GET THE SWITCH SETTINGS 

CHECK FOR 2ND 256K ON PLANAR 

GO I F NOT 

CHECK FOR PARITY ERR 

CONTINUE 

TEST FOR 10 ERROR 

GO PRINT ADDRESS IF IT DID 

POINT TO NEXT 64K BLOCK 



HALT SYSTEM 



HALT SYSTEM 

TOGGLE NMI 
10 DELAY 

RESTORE ORIG CONTENTS OF AX 



= 0012 
= 0444 
= 0007 
= 0070 
= 0071 
= OOOE 
= 0000 
= 0002 
= 0004 
= OOOA 
= 0080 
OOCD 



THIS ROUTINE INITIALIZES THE TIMER DATA AREA IN THE 
ROM BIOS DATA ARFA. IT IS CALLED BY THE POWER ON 
ROUTINES. IT CONVERTS HR:MIN:SEO FROM CMOS TO TIMER 
TICS. IF CMOS IS INVALID, TIMER DATA IS SET TO ZERO. 



INPUT NONE PASSED TO ROUTINE BY CALLER 
CMOS BYTES USED FOR SETUP 



SECONDS 

MINUTES 

HOURS 

REGISTER A (UPDATE 

CMOS VALID IF ZERO 



TIMER_LOW 
TIMER_HIGH 
T1MER_0FL 
ALL REGISTERS UNCHANGED 



N PROGRESS) 



COUNTS SEC 


EQU 


18 


COUNTS MIN 


EQU 


109- 


COUNTS HOUR 


EQU 


7 


CMOS ADR 


EQU 


70H 


CMOS DATA 


EQU 


71H 


CMOS VAL 1 D 


EQU 


OEM 


CMOS SECONDS 


EQU 


OOH 


CMOS MINUTES 


EQU 


02H 


CMOS HOURS 


EQU 


04H 


CMOS REGA 


EQU 


OAH 


UPDATE TIMER 


EQU 


80H 


SET TOD PROG 


NEAR 




PUSHA 







; 65543 - 65536 



5-144 BIOS 



OOCD 


60 




OOCE 


IE 




OOCF 


88 


R 


00D2 


8E 


08 


OODU 


2B 


CO 


00D6 


A2 


0070 R 


00 D9 


A3 


006C R 


OODC 


A3 


006E R 


OODF 


BO 


OE 


O0E1 


E6 


70 


00E3 


EB 


00 


O0E5 


E^ 


71 


00E7 


2H 


04 


00E9 


75 


61 


OOEB 


28 


C9 


OOED 


BO 


OA 


QOEF 


E6 


70 


oon 


EB 


00 


O0F3 


E4 


71 


OOFS 


A8 


80 


00 F7 


7U 


05 


00 F9 


E2 


F2 


00 FB 


EB 


4F 90 


OOFE 






OOFE 


BO 


00 


0100 


E6 


70 


0102 


EB 


00 


0104 


E4 


71 


0106 


30 


59 


0108 


77 


UD 


01 OA 


E8 


0176 R 


010D 


B3 


12 


010F 


F6 


E3 


0111 


8B 


C8 


0113 


BO 


02 


0115 


E6 


70 


0117 


EB 


00 


0119 


EU 


71 


011B 


3C 


59 


011D 


77 


38 


011F 


E8 


0176 R 


0122 


BB 


0444 


0125 


F7 


E3 


0127 


03 


01 


0129 


88 


08 


012B 


BO 


04 


012D 


E6 


70 


012F 


E8 


00 


0131 


t4 


71 


0133 


30 


23 


0135 


77 


20 


0137 


E8 


0176 R 


013A 


88 


DO 


013C 


B3 


07 


013E 


F6 


E3 


01U0 


03 


01 


01U2 


83 


02 00 


01U5 


89 


16 006E R 


01U9 


A3 


006C R 


OIUC 






0l4C 


FA 




01i»D 


Zh 


21 


OUF 


24 


FE 


0151 


E6 


21 


0153 


FB 




0154 


IF 




0155 


61 




0156 


C3 




0157 






0157 


IF 




0158 


61 




0159 


BE 


0000 E 


015C 


E8 


0000 E 


015F 


BO 


8E 


0161 


E6 


70 


0163 


86 


04 


0165 


EB 


00 


0167 


E4 


71 


0169 


OC 


04 


016B 


86 


04 


016D 


E6 


70 


016F 


86 


04 


0171 


EB 


00 


0173 


E6 


71 


0175 


C3 




0176 






0176 






0176 


8A 


EO 


0178 






0178 


DO 


EC 


017A 






0178 






0178 


CO 




017A 






017A 


04 




017B 


24 


OF 


017D 


D5 


OA 


017F 


C3 




0180 






0180 







PUSH 


DS 


ASSUME 


DS:DATA 


MOV 


AX, DATA 


MOV 


DS,AX 


SUB 


AX, AX 


MOV 


TIMER OFL.AL 


MOV 


TIMER LOW, AX 


MOV 


TIMER HIGH, AX 


MOV 


AL,CMOS VALID 


OUT 


CMOS ADR,AL 


JMP 


SHORT $+2 


IN 


AL,CMOS DATA 


AND 


AL,0C4H 


JNZ 


POD DONE 


SUB 


CX,CX 


UIP: MOV 


AL.CMOS REGA 


OUT 


CMOS ADR,AL 


JMP 


SHORT $+2 


IN 


AL,CMOS DATA 


TEST 


AL, UPDATE TIMER 


JZ 


READ SEC 


LOOP 


UIP 


JMP 


POD_DONE 


READ SEC: 




MOV 


AL.CMOS SECONDS 


OUT 


CMOS ADR,AL 


JMP 


SHORT $+2 


IN 


AL, CMOS_DATA 


CMP 


AL,59H 


JA 


TOD_ERROR 


CALL 


CVT BINARY 


MOV 


BL, COUNTS SEC 


MUL 


BL 


MOV 


CX,AX 


MOV 


AL,CMOS MINUTES 


OUT 


CMOS ADR,AL 


JMP 


SHORT $+2 


IN 


AL, CMOS_DATA 


CMP 


AL,59H 


JA 


TOO_ERROR 


CALL 


CVT BINARY 


MOV 


BX, COUNTS MIN 


MUL 


BX 


ADD 


AX,CX 


MOV 


CX,AX 


MOV 


AL,CMOS HOURS 


OUT 


CMOS ADR,AL 


JMP 


SHORT $+2 


IN 


AL, CMOS DATA 


CMP 


AL,23H 


JA 


TOD ERROR 


CALL 


CVT BINARY 


MOV 


DX,AX 


MOV 


BL. COUNTS HOUR 


MUL 


BL 


ADD 


AX,CX 


ADC 


DX,000OH 


MOV 


TIMER_HIGH,DX 


MOV 


T 1 MER_LOW, AX 


POD_DONE: 




CLI 




IN 


AL,021H 


AND 


AL,0FEH 


OUT 


021H,AL 


STI 




POP 


DS 


POPA 




DB 


061H 


RET 




TOD ERROR: 




POP 


DS 


POPA 




DB 


061 H 


MOV 


SI. OFFSET CM3 


CALL 


E MSG 


MOV 


AL, DIAG STATUS 


OUT 


CMOS PORT.AL 


XCHG 


AL.AH 


JMP 


SHORT $+2 


IN 


AL,CMOS PORT+1 


OR 


AL.CMOS CLK FAIL 


XCHG 


AL,AH 


OUT 


CMOS PORT.AL 


XCHG 


AL.AH 


JMP 


SHORT $+2 


OUT 


CM0S_PORT+1.AL 


RET 




SET_TOD ENDP 




CVT BINARY 


PROC NEAR 


MOV 


AH.AL 


ISHR 


AH, 4 


??0000 LABEL 


BYTE 


SHR 


AH.I 


??0001 LABEL 


BYTE 


ORG 


OFFSET CS:??0000 


DB 


OCOH 


ORG 


OFFSET CS:??0001 


DB 


4 


AND 


AL.OFH 


AAD 




RET 




CVT BINARY 


ENDP 


CODE ENDS 




END 





ESTABLISH SEGMENT 



CHECK CMOS VALIDITY 



ACCESS REGISTER A 



CMOS CLOCK STUCK 

ACCESS SECONDS VALUE IN CMOS 



CONVERT IT TO BINARY 
COUNT FOR SECONDS 

ACCESS MINUTES VALUE IN CMOS 



CONVERT IT TO BINARY 
COUNT FOR MINUTES 



ACCESS HOURS VALUE IN CMOS 



ARE THE HOURS WITHIN LIMITS? 

GO IF NOT 

CONVERT IT TO BINARY 



COUNT FOR HOURS 



DISPLAY CLOCK ERROR 

SET CLOCK ERROR 

SAVE STATUS ADDRESS 

10 DELAY 

GET THE CURRENT STATUS 

SET NEW STATUS 

GET STATUS ADDR AND SAVE NEW STATUS 



UNPACK 2 BCD DIGITS IN AL 



BIOS 5-145 



5-146 BIOS 



TITLE n/22/83 I 



EXTRN 


DDS:NEAR 


EXTRN 


PRT HEX: NEAR 


EXTRN 


01 :NEAR 


EXTRN 


D2:NEAR 


EXTRN 


P MSG:NEAR 


EXTRN 


D2A;NEAR 


EXTRN 


PRT SEG:NEAR 


EXTRN 


PROC_SHUTDOWN: NEAR 


PUBLIC 


SHUT9 


PUBLIC 


GATE A20 


PUBLIC 


CASSETTE 10 1 



INT 15 

INPUT - CASSETTE I/O FUNCTIONS 
(AH) = 00 
(AH) = 01 
(AH) = 02 
(AH) = 03 
RETURNS FOR THESE FUNCTIONS ALWAYS (AH) 
I F CASSETTE PORT NOT PRESENT 



86H, CF = 1 ) 



INPUT - UNUSED FUNCTIONS 

(AH) = OU THROUGH 7F 
RETURNS FOR THESE FUNCTIONS ALWAYS ( AH ) : 



Extensions 

(AH) = 80H DEVICE OPEN 

(BX) = DEVICE ID 

(CX) = PROCESS ID 

(AH) = 81H DEVICE CLOSE 

(BX) = DEVICE ID 

(CX) = PROCESS ID 



(AH) = 83H EVENT WAIT 

(AL) = SET INTERVAL 
(ES:BX) POINTER TO A BYTE IN CALLERS MEMORY 

THAT WILL HAVE THE HIGH ORDER BIT SET 
AS SOON AS POSSIBLE AFTER THE INTERVAL 
EXPIRES. 
(CX, DX) NUMBER OF MICROSECONDS TO ELAPSE BEFORE 
POSTING. 
(AL) = 1 CANCEL 

(AH) = 84H JOYSTICK SUPPORT 

(DX) = - READ THE CURRENT SWITCH SETTINGS 

RETURNS AL = SWITCH SETTINGS (BITS 7-k) 

(DX) = 1 - READ THE RESISTIVE INPUTS 

RETURNS AX = A(x) VALUE 

BX = A(y) VALUE 

CX = B(x) VALUE 

DX = B(y) VALUE 

(AH) - 85H SYSTEM REQUEST KEY PRESSED 

(AL) = 00 MAKE OF KEY 

(AL) = 01 BREAK OF KEY 
(AH) = 86H WAIT 

(CX.DX) NUMBER OF MICROSECONDS TO ELAPSE BEFORE 
RETURN TO CALLER 
MOVE BLOCK 

NUMBER OF WORDS TO MOVE 
POINTER TO DESCRIPTOR TABLE 
EXTENDED MEMORY SIZE DETERMINE 
PROCESSOR TO VIRTUAL MODE 

(AH) 

lALJ 

(AH) = 91H INTERRUPT COMPLETE FLAG SET 
(AL) TYPE CODE 

OOH -> 7FH 

SERIALLY REUSABELE DEVICES; 
OPERATING SYSTEM MUST SERIALIZE 
ACCESS 

80H -> BFH 

REENTRANT DEVICES; ES:BX IS 
USED TO DISTINGUISH DIFFERENT 
CALLS (MULTIPLE I/O CALLS ARE 
ALLOWED SIMULTANEUSLY) 

COH -> FFH 

WAIT ONLY CALLS; THERE IS NO 
COMPLEMENTARY 'POST' FOR THFSE 
WAITS - - THESE ARE TIMEOUT 
ONLY. TIMES ARE FUNCTION NUMBER 
DEPENDENT 



(AH) 


= 87H 




(CX) 




(ES:SI ) 


(AH) 


= 88H 


(AH) 


= 89H 



TYPE DESCRIPTION 


TIMEOUT 


OOH = DISK 


YES 


OIH = DISKETTE 


YES 


02H = KEYBOARD 


NO 


80H = NETWORK 


NO 


ES:BX --> NCB 




FDH = DISKETTE MOTOR START 


YES 


FEH = PRINTER 


YES 



0000 






0000 


^B 




0001 


P.0 


FC 80 


0004 


72 


46 


0006 


80 


EC 80 


0009 


OA 


E4 


OOOB 


7** 


45 


OOOD 


FE 


CC 


OOOF 


fii 


41 


0011 


FF 


CC 


0013 


in 


3D 


0015 


FF 


CC 


0017 


m 


3B 


0019 


FF 


CC 


001 B 


74 


78 


OOID 


FE 


CC 


001 F 


71 


31 


0021 


FF 


CC 


0023 


74 


07 


0025 


FE 


CC 



CASSETTE_I0_1 



ASSUME CS:CODE 



STI 




CMP 


AH,80H 


JB 


CI 


SUB 


AH,80H 


OR 


AH, AH 


JZ 


DEV OPEN 


DEC 


AH 


JZ 


DEV CLOSE 


DEC 


AH 


JZ 


PROG TERM 


DEC 


AH 


JZ 


EVENT WAIT 


DEC 


AH 


JZ 


JOY STICK 


DEC 


AH 


JZ 


SYS_REQ 



CHECK FOR RANGE 
RETURN 1 F 00-7FH 
BASE ON 

DEVICE OPEN 

DEVICE CLOSE 

PROGRAM TERMINATION 

EVEMT WAIT 

JOYSTICK BIOS 

SYSTEM REQUEST KEY 

WAIT 



BIOS 1 5-147 



0027 


75 


06 


0029 


E9 


0183 R 


002C 


E9 


0132 R 


002 F 


FE 


CC 


0031 


75 


03 


0033 


E9 


03D2 R 


0036 


FE 


CC 


0038 


75 


03 


003A 


E9 


03E6 R 


003D 


80 


EC 07 


OOttO 


75 


03 


0OU2 


E9 


0475 R 


0O'i5 


FE 


CC 


0047 


75 


03 


0049 


E9 


0479 R 


004C 


B4 


86 


OOUE 


F9 




004F 






OOUF 


CA 


0002 


0052 






0052 






0052 






0052 






0052 


EB 


FB 


0054 






005U 






0054 


IE 




0055 


E8 


0000 E 


0058 


F6 


06 OOAO R 01 


005D 


74 


04 


005F 


IF 




0060 


F9 




0061 


EB 


EC 


0063 






0063 


FA 




0064 


E4 


Al 


0066 


24 


FE 


0068 


E6 


Al 


006A 


8C 


06 009A R 


006E 


89 


IE 0098 R 


0072 


89 


OE 009E R 


0076 


89 


16 009C R 


007A 


C6 


06 OOAO R 01 


007F 


BO 


08 


0081 


E6 


70 


0083 


E4 


71 


0085 


24 


7F 


0087 


OC 


40 


0089 


50 




008A 


BO 


OB 


008C 


F6 


70 


008E 


58 




008F 


E6 


71 


0091 


FB 




0092 


IF 




0093 


EB 


BA 


0095 







JMP 
DEC 



C1_C: DEC 
JNZ 
JMP 

C1_D: SUB 
JNZ 
JMP 

C1_E: DEC 
JNZ 
JMP 

CI : MOV 
STC 

C1_F: 

RET 

DEV_OPEN: 

DEV_CLOSE: 

PROG_TERM: 

SYS_REQ 

CASSETTE. 



MOVE BLOCK 
WAIT 



GO GET THE EXTENDED MEMORY 



AH, 7 
C1_E 
DEVICE_BUSY 



INT_COMPLETE 
AH,86H 



JMP 



I0_1 

EVENT_WAIT 

ASSUME 

PUSH 

CALL 

TEST 

JZ 

POP 

STC 

JMP 

EVENT_WAIT_1 : 



DDS 

RTC_WAIT_FLAG,01 

EVENT_WAIT_1 



AND 
OUT 
MOV 
MOV 
MOV 
MOV 
MOV 
MOV 
OUT 



AL, OAIH 

AL,OFEH 

0A1H,AL 

USER_FLAG_SEG, ES 

USER_FLAG,BX 

RTC_HIGH,CX 

RTC_L0W, DX 

RTC_WA1T_FLAG,01 

AL.OBH 

CMOS_PORT,AL 

AL, CM0S_P0RT+1 

AL, 07FH 

AL,040H 



CM0S_P0RT+1,AL 



POP 

JMP 

EVENT_WAIT 

- JOY_STICK 



SAVE 

CHECK FOR FUNCTION ACTIVE 



SET UP TRANSFER TABLE 



ENABLE INTERRUPTS 



THIS ROUTINE WILL READ THE JOYSTICK PORT 



(DX)=1 READ THE RESISTIVE INPUTS 

RETURNS (AX)=A(x) VALUE 

(BX)=A(y) VAUJF 

(CX)=B(x) VALUE 

(DX):=B{y) VALUE 

CY FLAG ON I F NO ADAPTER CARD OR INVALID CALL 



0095 






0095 


FB 




0096 


8B 


C2 


0098 


BA 


0201 


009B 


OA 


CO 


009D 


74 


09 


009F 


FE 


C8 


OOAl 


74 


OA 


00A3 


EB 


A7 


O0A5 






00A5 


FB 




00A6 


EB 


A7 


00A8 






00A8 


EC 




O0A9 


24 


FO 


OOAB 


EB 


F8 


OOAD 






OOAD 


B3 


01 


GOAF 


E8 


OOCB R 


00B2 


51 




0083 


B3 


02 


0085 


E8 


OOCB R 


O0B8 


51 




O0B9 


83 


04 


OOBB 


E8 


OOCB R 


OOBE 


51 




OOBF 


B3 


08 


00C1 


E8 


OOCB R 


O0C4 


88 


D1 


00C6 


59 




O0C7 


58 




00C8 


58 




O0C9 


EB 


DA 


OOCB 






OOCB 


52 





ASSUME CS:CODE 



AX,DX 
DX,201f 
AL,AL 
J0Y_2 



INTERRUPTS BACK ON 
GET SUBFUNCTION CODE 
ADDRESS OF PORT 

READ SWITCHES 



GO TO COMMON RETURN 



IN 


AL,DX 




AND 


AL,OFOH 


STRIP UNWANTED BITS OFF 


JMP 


J0Y_1 


FINISHED 


JOY 3: 






MOV 


BL, 1 




CALL 


TEST CORD 




PUSH 


CX 


SAVE A(x) VALUE 


MOV 


8L,2 




CALL 


TEST CORD 




PUSH 


CX 


SAVE A(y) VALUE 


MOV 


BL,4 




CALL 


TEST CORD 




PUSH 


CX 


SAVE B(X) VALUE 


MOV 


BL,8 




CALL 


TEST CORD 




MOV 


DX,CX 


SAVE B(y) VALUE 


POP 


CX 


GET B(X) VALUE 


POP 


BX 


GET A(y) VALUE 


POP 


AX 


GET A(x) VALUE 


JMP 


J0Y_1 


FINISHED - RETURN 


TEST CORD 


PROC NEAR 




PUSH 


DX 


SAVE 



5-148 BIOS 1 



oocc 


FA 




OOCD 


BO 


00 


OOCF 


E6 


43 


00D1 


EB 


00 


00D3 


EU 


40 


00D5 


EB 


00 


00D7 


8A 


EO 


0OD9 


EU 


HO 


OODB 


86 


EO 


OODD 


50 




OOOE 


B9 


OUFF 


00E1 


EE 




00E2 


EB 


00 


00 EU 






OOEiJ 


EC 




00E5 


814 


03 


00E7 


EO 


FB 


00E9 


83 


F9 00 


00 EC 


59 




OOED 


75 


OU 


OOEF 


2B 


C9 


oon 


EB 


20 


00F3 






00F3 


BO 


00 


00F5 


E6 


43 


00F7 


EB 


00 


00F9 


Ef+ 


40 


OOFB 


8A 


EO 


OOFD 


EB 


00 


OOFF 


El* 


40 


0101 


86 


EO 


0103 


3B 


C8 


0105 


73 


OB 


0107 


52 




0108 


BA 


FFFF 


010B 


2B 


DO 


010D 


03 


CA 


OlOF 


5A 




0110 


EB 


02 



0112 2B C8 



0114 


81 


El IFFO 


0118 


D1 


E9 


OIIA 


01 


E9 


one 


D1 


E9 


OIIE 


01 


E9 


0120 






01?0 


FB 




0121 


BA 


0201 


0124 


51 




0125 


50 




0126 


B9 


04FF 


0129 






0129 


EC 




012A 


A8 


OF 


0120 


EO 


FB 


012E 


58 




012F 


59 




0130 


5A 





XCHG 

PUSH 

MOV 

OUT 

JMP 

TEST_C0RD_1 : 
IN 

TEST 
LOOPNZ 
CMP 
POP 
JNZ 
SUB 
JMP 

TEST_C0RD_2: 
MOV 
OUT 
JMP 
IN 



CMP 
JAE 
PUSH 
MOV 



JMP 

TEST_C0RD_4: 
SUB 

TEST_C0RD_5: 
AND 
SHR 
SHR 
SHR 
SHR 

TEST_C0RD_3: 
ST! 
MOV 
PUSH 
PUSH 
MOV 

TEST_C0R0_6: 
IN 
TEST 



AL,0 

TIMER+3,AL 
SHORT $+2 
AL, TIMER 
SHOKT $+2 
AH,AL 
AL, TIMER 
AH,AL 



READ LOW BYTE OF TIMER 



AX 

CX.Uh FH 
DX,AL 
SHORT $+2 

AL,DX 

AL.BL 

TEST_C0RD_1 

CX,0 

CX 

SHORT TEST_C0RD_2 

CX.CX 

SHORT TEST_CORD_: 

AL,0 
TIMER+3,AL 
SHORT $+2 
AL, TIMER 
AH,AL 
SHORT $+2 
AL, TIMER 
AH,AL 



READ HIGH BYTE OF TIMER 

REARRANGE TO HIGH, LOW 

SAVE 

SET COUNT 

FIRE TIMER 



ORIGINAL COUNT 



SET UP TO LATCH TIMER 



READ LOW BYTE OF TIMER 



ADJUST FOR WRAP 



SHORT TEST_C0RD_5 



LOOPNZ TEST_C0RD_6 



0132 












0132 


IE 










0133 


E8 


0000 E 






0136 


F6 


06 


OOAO 


R 


01 


0138 


74 


05 








0130 


IF 










013E 


F9 










013F 


E9 


004 F R 






01*42 












01^42 


FA 










o^^3 


E4 


A1 








0145 


24 


FE 








Oli+7 


E6 


A1 








0149 


8C 


IE 


009A 


R 




014D 


C7 


06 


0098 


R 


OOAO R 


0153 


89 


OE 


009E 


R 




0157 


89 


16 


009C 


R 




01 5B 


C6 


06 


OOAO 


R 


01 


0160 


BO 


OB 








0162 


E6 


70 








0164 


L4 


71 








0166 


24 


7F 








0168 


OC 


40 








01 6A 


50 










016B 


BO 


OB 








016D 


E6 


70 








016F 


58 










0170 


E6 


71 








0172 


FB 










0173 












0173 


F6 


06 


OOAO 


R 


80 


0178 


74 


F9 








01 7A 


C6 


06 


OOAO 


R 


00 


017F 


IF 










0180 


E9 


004 F R 







RET 
TEST_C0RD 
J0Y_STICK 

WAIT PROC 
PUSH 
CALL 
TEST 



AND 
OUT 
MOV 
MOV 
MOV 
MOV 
MOV 
MOV 
OUT 



SET COUNT 
RETURN 



AND 

OR 

PUSH 

MOV 

OUT 

POP 

OUT 

ST I 



MOV 
POP 
JMP 



DDS 

RTC_WAIT_FLAG,01 

WAIT_1 



AL,0A1H 

AL,0FEH 

0A1 H,AL 

USER_FLAG_SEG,DS 

USER_FLAG, OFFSET RTC_WAlt 

RTC_HIGH,CX 

RTC_LOW, DX 

RTC_WAIT_FLAG,01 

AL.OBH 

CMOS_PORT,AL 

AL, CM0S_P0RT+1 

AL,07FH 

AL,040H 



CM0S_P0RT+1,AL 



RTC_WA I T_FLAG, 080H 

WA I T_2 

RTC_WAIT_FLAG,0 

OS 

C1_F 



SAVE 

TEST FOR FUNCTION ACTIVE 



ENABLE INTERRUPTS 
CHECK FOR END OF WAIT 
SET FUNCTION INACTIVE 



WAIT ENDP 
PAGE 

INT 15 (FUNCTION 87H - MOVE BLOCK) 

PURPOSE: 

THIS BIOS FUNCTION PROVIDES A MEANS TO TRANSFER A BLOCK 
OF STORAGE TO AND FROM STORAGE ABOVE THE 1 MEG ADDRESS 
RANGE IN VIRTUAL (PROTECTED) MODE. 

ENTRY REQUIREMENTS: 

ES:SI POINTS TO A DESCRIPTOR TABLE (GOT) BUILT BEFORE 
INILRRUPTING TO THIS FUNCTION. THESE DESCRIPTORS ARE 
ARE USED BY THIS FUNCTION TO PERFORM THE BLOCK MOVE. 
THE SOURCE AND TARGET DESCRIPTORS BUILT BY THE USER 
MUST HAVE THE SEGMENT LENGTH = 2 * CX - 1 OR GREATER. 
THE DATA ACCESS RIGHTS BYTE WILL BE SET TO CPLO-R/W( 93H ) 
THE 24 BIT ADDRESS (BYTE HI, WORD LOW) WILL BE SET 
TO THE TARGET/SOURCE. 

THE DESCRIPTORS ARE DEFINED AS FOLLOWS: 



BIOS 1 5-149 



1. THE FIRST DESCRIPTOR IS THE REQUIRED DUMMY. 
(USER INITIALIZED TO 0) 

2. THE SECOND DESCRIPTOR POINTS TO THE GDT TABLE AS 
A DATA SEGMENT. 

(USER INITIALIZED TO 0) 

3. THE THIRD DESCRIPTOR IS THE DESCRIPTOR THAT POINTS 
TO THE SOURCE TO BE MOVED. (FROM) 

(USER INITIALIZED) 
U. THE FOURTH DESCRIPTOR IS THE DESCRIPTOR THAT POINTS 
TO THE DESTINATION. (TO) 
(USER INITIALIZED) 

5. THE FIFTH IS A DESCRIPTOR THAT THIS FUNCTION USES 
TO CREATE A VIRTUAL CODE SEGMENT 

(USER INITIALIZED TO 0) 

6. THE SIXTH IS A DESCRIPTOR THAT THIS FUNCTION USES 

TO CREATE A VIRTUAL STACK SEGMENT. (POINTS TO USERS: 

STACK) 

(USER INITIALIZED TO 0) 

'AGE 
INT 15 (FUNCTION 87H CONTINUED) 

AH=87 (FUNCTION CALL) 

ES:SI = LOCATION OF THE GDT TABLE BUILD BY ROUTINE 

USING THIS FUNCTION. 

CX = WORD COUNT OF STORAGE BLOCK TO BE MOVE. 

NOTE: MAX COUNT = 8000H 32K WORDS 

EXIT PARAMETERS: 

AH = IF SUtCESSFUL 

AH = 1 IF RAM PARITY (PARITY ERROR IS CLEARED) 
AH = 2 IF EXCEPTION INTERRUPT ERROR 
AH = 3 IF GATE ADDRESS LINE 20 FAILED 
ALL REGISTER ARE RESTORED EXCEPT AX. 
CARRY FLAG = 1 I F ERROR 
ZERO FLAG = 1 I F SUCCESSFUL 
CONSIDERATIONS: 



DESCRIPTION: 



CLI (NO INTERRUPTS ALLOWED) WHILE THIS FUNCTION IS 
EXECUTING. 

ADDRESS LINE 20 IS GATED ACTIVE. 

THE IDT (INTERRUPT DESCRIPTOR TABLE) IS ROM RESIDENT: 
THE CURRENT USER STACK SEGMENT AND OFFSET IS SAVED. 
THE GDTR IS LOADED WITH THE OFFSET INTO ES:SI 
THE IDTR SELECTOR IS ROM RESIDENT AND IS LOADED. 
THE PROCESSOR IS PUT IN VIRTUAL MODE 
DATA SEGMENT IS LOADED WITH THE SOURCE DESCRIPTOR 
EXTRA SEGMENT IS LOADED WITH THE TARGET DESCRIPTOR 
DS:SI (SOURCE) ES:DI (TARGET) REP MOVSW IS EXECUTED 
SHUTDOWN 09 IS EXECUTED. 
STACK SEGMENT/OFFSET IS RESTORED. 
ADDRESS LINE 20 IS DEGATED. 
INTERRUPTS ARE ALLOWED 



+20 
+28 



SAMPLE OF SOURCE OR TARGET DESCRIPTOR 
SOURCE_TARGET_DEF STRUG 



SEG_LIMIT 

BASE_LO_WORD 

BASE_HI_BYTE 

DATA_ACC_RIGHTS 

DATA_RESERVED 

SOURCE_TARGET 



SEGMENT LIMIT (1-65536 BYTES) 
2'4 BIT SEGMENT PHYSICAL 

ADDRESS (0 TO (16M-1) ) 
ACCESS RIGHTS BYTE 
RESERVED WORD 













BL0CKM0VE_GDT. 


.DEF 


0000 


00 
00 


00 
00 


00 


00 00 00 


DUMMY 


DQ 





0008 


00 
00 


00 
00 


00 


00 00 00 


CGDT_LOC 


DQ 





0010 


00 
00 


00 
00 


00 


00 00 00 


SOURCE 


DQ 





0018 


00 
00 


00 
00 


00 


00 00 00 


TARGET 


DQ 





0020 


00 
00 


00 
00 


00 


00 00 00 


BIOS_CS 


DQ 





0028 


00 
00 


00 
00 


00 


00 00 00 


TEMP_SS 


DQ 






THE GLOBAL DESCRIPTOR TABLE (ACTUAL LOCATION POINTED TO BY ES:SI) 



FIRST DESCRIPTOR NOT ACCESSIBLE 
LOCATION OF CALLING ROUTINE GDT 
SOURCE DESCRIPTOR 
TARGET DESCRIPTOR 
BIOS CODE DESCRIPTOR 
STACK DESCRIPTOR 



BLOCKMOVE_GDT_DEF 



5-150 BIOSl 



0183 


FA 




018U 


FC 




0105 


60 




0186 


06 




0187 


It 




0188 


2A 


CO 


018A 


E6 


80 


018C 


RU 


DF 


018E 


F8 


03B0 R 


0191 


3G 


00 


0193 


/k 


07 


0195 


BO 


03 


0197 


f6 


80 


0199 


E9 


0270 R 


019C 


BO 


8F 


019E 


i6 


70 


01A0 


FB 


00 


01A2 


BO 


09 


OlAU 


L6 


71 



BLOCKMOVE PROC NEAR 

. INITIALIZE FOR VIRTUAL MODE 



CLEAR EXCEPTION ERROR FLAG 



GATE ADDRESS BIT 20 ON 



MOV 

CALL 

CMP 

JZ 

MOV 

OUT 

JMP 



AH,ENABLE_B1T20 

GATE_A20 

AL,0 

BLI4 

AL,03H 

MFG„PORT,AL 

SHUT9 



-- SET SHUDOWN RETURN ADDR 
MOV 



JMP 
MOV 
OUT 



AL,SHUT_DOWN 
CMOS_PORT,AL 
SHORT $+2 
AL,9 
CM0S_P0RT+1,AL 



NO INTERRUPTS ALLOWED 

SET DIRECTION 

SAVE GENERAL PURPOSE REGS 

SAVE EXTRA SEGMENT 



WAS THE COMMAND ACCEPTED? 

GO IF YES 

SET THE ERROR FLAG 



EARLY EXIT 



SET THE SHUTDOWN BYTE 
TO SHUT DOWN 9 
10 DELAY 



UP THE GDT DEFII 



01A6 80 CO 

01A8 8B DE 

01AA 8A Fit 

01 AC 80 E6 FO 



01AF DO EE 



OlAF 








OlAF 


CO 






01B1 








OlBl 


04 






01B2 


80 


Ei* OF 


01B5 








01B5 


1)1 


FO 




0187 








01B5 








01B5 








01B5 


CI 






01B7 








01B7 


OH 






01 B8 


03 


D8 




OIBA 


73 


02 




OIBC 


FE 


C6 




01BE 


?6 


88 


7U OC 


01C2 


26 


89 


5C OA 


01C6 


?6 


07 


t\h 08 FFFF 


OICC 


26 


C/ 


itU OE 0000 


01D2 


BD 


02A1 R 


01D5 


2E 






01D6 


OF 






01D7 








01 D7 


SB 


5E 00 


OlDA 








01D7 








01D7 


01 






01 DA 









?0000 
70001 



70003 
700014 
70005 



70007 
70008 



01DB 
01 DC 
01 DC 
OlDF 
01 DC 
OlDC 
OlDF 



01 DF E8 0000 E 



01 E2 8C DO 

01 E4 A3 0069 I 

01 E7 8B CU 

01E9 A3 006/ 1 



MAKE A 2U BIT ADDRESS OUT OF THE ES:SI 



MOV 
MOV 
MOV 
AND 
ISHR 
LABEL 
SHR 
LABEL 
ORG 
DB 



ORG 
DB 
AND 
ISHL 
LABEL 
SHL 
LABEL 
ORG 

LABEL 

DB 
ORG 



AX.ES 

BX.Si 

DH,AH 

DH,0F0H 

DH,i+ 

BYTE 

DH, 1 

BYTE 

OFFSET CS:' 

OCOH 
OFFSET CS:' 

AH.OOFH 
AX, 4 
BYTE 



GET THE CURRENT DATA SEGMENT 

GET THE CURKLNl OFFSET 

DEVELOPE THE HIGH BYTE OF THE 2UBIT ADDR 

USE ONLY THE HIGH NIBBLE 

SHI FT RIGHT U 



AX, 1 
BYTE 
OFFSET CS: 770003 

NEAR 

0C1H 
OFFSET CS: 770004 
14 
BX,AX 



DEVELOPE THE LOW WORD ADDRESS 

GO I F NO CARRY 

INCREMENT THE HIGH BYTE ADDRES 



SET THE GDT_LOC 



OV ES:(SI 
LOAD THE IDT 



LABEL 
MOV 
LABEL 
ORG 



BP, OFFSET ROM_IDT_LOC 

CS 

02EH 

[BP] 

OOFH 

BYTE 

BX,WORD PTR [BP] 

BYTE 

OFFSET CS:??0007 

001 H 

OFFSET CS:?70008 



- LOAD THE GDTR 
SEGOV 



'7000A 
■7000B 



LABEL 
MOV 
LABEL 
ORG 



026H 

[SI ].CGDT_LOC 

OOFH 

BYTE 

DX,WORD PTR [SI ].( 

BYTE 

OFFSET CS:?7000A 

001H 

OFFSET CS:?7000B 



LOAD THE IDT 

REGISTER FROM THIS AREA 



LOAD THE GLOBAL DESCRIPTOR TABLE REG 



ORG 
- SET THE DATA SEGMENT TO BIOS RAM 



SET DS TO DATA AREA 



SAVE THE CALLING ROUTINE"S STACK 



MOV 
MOV 
MOV 
MOV 



AX, SB 

IO_ROM_SEG,AX 
AX,SP 
IO_ROM_I N IT,AX 



GET THE STACK SEGMENT 
SAVE STACK SEGMENT 
SAVE STACK POINTER 



MAKE A 24 BIT ADDRESS OUT OF THE SS (SP REMAINS USER SP) 



OlEC 


8C 


DO 




OlEE 


8A 


F4 




01 FO 


80 


E6 


FO 


01F3 








01 F3 


DO 


t.t 




0U5 








01 F3 








01 F3 


CO 







'7O0OC 
•7000D 



MOV 
MOV 
AND 
ISHR 
LABEL 
SHR 
LABEL 
ORG 
DB 



AX,SS 
DH,AH 
DH,OFOH 



GET THE CURRENT STACK SEGMENT 

DEVELOPE THE HIGH BYTE OF THE 24B I T ADDR 

USE ONLY THE HIGH NIBBLE 

SHI FT RIGHT 4 



BIOS 1 5-151 



01 F5 






01 F5 


OU 




01 F6 


80 


EU OF 


01 F9 






01 F9 


D1 


EG 


01 FB 






01 F9 






01 F9 






01 F9 


CI 




01 FB 






01 FB 


04 





020F 
021U 
021A 
0220 
0225 





ORG 


OFFSET OS 




DB 


U 




AND 


AH.OOFH 




ISHL 


AX, 4 


??00OF 


LABEL 


BYTE 




SHI 


AX, 1 


??0010 


LABEL 


BYTE 




ORG 


OFFSET CS 


??0011 


LABEL 


NEAR 




08 


0C1H 




ORG 


OFFSET CS 



01 FC 26: 88 74 2C 

0200 26: 89 44 2A 

0204 26: C7 44 28 FFFF 

020A 26: 06 44 20 93 



26: C6 44 24 OF 

26: C7 44 22 0000 

26: C7 44 20 FFFF 

26: C6 44 25 9B 

26: C7 44 26 0000 



SS IS NOW IN POSITION FOR A 24 BIT ADDRESS --> SETUP THE DESCRIPTOR 



MOV ES:[SI ].TEMP_SS.BASE_HI_BYTE,DH ; SET THE HIGH BYTE 

MOV ES: [ SI ] .TEMP_SS.BASE_LO_WORD,AX ; SET THE LOW WORD 

MOV ES: [SI ].TEMP_SS.SEG_LIMIT,MAX_SEC_LEN ; SET THE SS SEGMENT LIMI 

MOV ES: [SI ].TEMP_SS.DATA_ACC_RIGHTS,CPLO_DATA_ACCESS ; SETCPLO 



STACK IS NOW SET — -> SET UP THE CODE SEGMENT DESCRIPTOR 



MOV 
MOV 
MOV 
MOV 
MOV 



ES: [SI ] 
ES:[SI ] 
ES:[SI ] 



B I OS_CS . BASE_H I _BYTE , CSEG@_H I 

B IOS_CS.BASE_LO_WORD,CSEG@_LO 

B I OS_CS . SEG_L I M I T, MAX_SEG_LEN 

B I OS_CS . DATA_ACC_R I GHTS, CPLO_CODE_ACCESS 

BIOS_CS.DATA_RESERVED,0 ; RESERVED 



022B B8 0O01 



022E 
022 F 
022F 
0231 
022F 
022F 
0231 


OF 
8B 

01 


FO 


0231 
0232 
0234 
0236 


EA 

0236 R 
0020 


0236 
0239 


B8 
8E 


0028 
DO 


023B 
023E 


B8 
8E 


0010 
08 


0240 
0243 


B8 
8E 


0O18 
CO 


0245 
0247 


2B 
2B 


FF 
F6 



0249 F3/ A5 



024B 


E4 61 


0240 


24 CO 


024 F 


74 1C 


0251 


26: SB 04 


0254 


26: 89 04 


0257 


8B 05 


0259 


89 05 


025B 


BO 01 


025D 


E6 80 


025F 


E4 61 


0261 


EB CO 


0263 


OC OC 


0265 


E6 61 


0267 


EB 00 


0269 


24 F3 


026B 


E6 61 



?0012 
?0013 



SWITCH TO VIRTUAL MODE 
MOV AX,VIRTUAL_ENABLE 



LABEL 
MOV 
LABEL 
ORG 



,AX 



BYTE 

OFFSET CS:??0012 
DB 001H 

ORG OFFSET CS:??0013 
JUMPFAR VIRT,BIOS_CS 
DB OEAH 
DW (OFFSET VIRT) 
DW B 1 OS_CS ; 



MUST PURGE PRE-FETCH QUEUE 
Jump far d i rect 

to this offset 
this segment 



SET STACK SEGMENT (NEEDED FOR POSSIBLE EXCEPTIONS) 
MOV AX,TEMP_SS ; USER'S SS+SP IS NOT A DESCRIPTOR 



SETUP SOURCE/TARGET REGISTERS 



GET THE SOURCE ENTRY 



GET THE TARGET ENTRY 



SCT INDEX REGS TO ZERO 



MOVE THE BLOCK 



CHECK FOR RAM PARITY BEFORE SHUTDOWN 



N AL, PORT_B 

iND AL, PARITY_ERR 

Z DONE! 

CLEAR PARITY BEFORE SHUTDOWN 



MOV 
MOV 
MOV 
MOV 
MOV 
OUT 



OUT 
J MP 
AND 
OUT 



AX,ES: [SI ] 
ES:[SI ],AX 
AX,DS: [Dl ) 
DS:[DI ],AX 
AL,01 
MFG_PORT,AL 

AL, PORT_B 

SHORT $+2 

AL,RAM_PAR_OFF 

PORT_B,AL 

SHORT $+2 

AL,RAM_PAR_ON 

PORT_B,AL 



GET THE PARITY LATCHES 
STRI P UNWANTED BITS 
GO IF NO PARITY ERROR 



FETCH CURRENT TARGET DATA 

WRITE IT BACK 

FETCH CURRENT SOURCE DATA 

WRITE IT BACK 

SET PARITY CHECK ERROR 



026D E9 OOOO E 



0270 


?A 


CO 




0272 


E6 


70 




0274 


B4 


DD 




0276 


F8 


03B0 


H 


0279 


30 


00 




027B 


74 


OA 




0270 


F4 


80 




027F 


3C 


GO 




0281 


75 


04 




0283 


BO 


03 




0285 


E6 


80 




0287 


E8 


OOOO 


E 


028A 


A1 


0069 


R 


028D 


8E 


DO 




028F 


A1 


0067 


R 


0292 


8B 


EO 




0294 


IF 







; CAUSE A SHUTDOWN 

D0NE1 : JMP PROC_SHUTD0WN 

. i RETURN FROM SHUTDOWN 

SHUT9: 

; ENABLE NMI INTERRUPTS 

SUB AL,AL 

OUT CMOS_PORT,AL 

. GATE ADDRESS BIT 20 OFF 



MOV 


AH, 01 SABLE BIT20 


CALL 


GATE A20 


CMP 


AL,0 


JZ 


D0NE3 


IN 


AL,MrG PORT 


CMP 


AL,0 


JNZ 


D0NE3 


MOV 


AL,03H 


OUT 


MFG_PORT,AL 


- — RESTORE USERS STACK 


0NE3: CALL 


DOS 


MOV 


AX, 10 ROM SEG 


MOV 


SS,AX 


MOV 


AX, 10 ROM IN IT 


MOV 


SP,AX 


---■ RESTORE THE USER DATA SEGMENT 


POP 


OS 



COMMAND ACCEPTED? 

GO I F YES 

CHECK FOR ERROR 

WAS THERE AN ERROR? 

GO IF YES 

SET ERROR FLAG 



SET DS TO DATA AREA 



RESTORE USER DATA SEGMENT 



5-152 BIOS 1 



0295 


07 






POP 
PC PA 


ES 


0296 


61 


+ 




DB 


061H 


0297 


86 CU 






XCHG 


AL,AH 


0299 


Eij 80 






IN 


AL,MFG PORT 


029B 


3C 00 






CMP 


AL,0 


029D 


86 EO 






XCHG 


AH,AL 


029F 


FB 






STI 




02A0 


CF 






IRET 


IDT LOCATION 
EQU 32*£ 


= 0100 




R0M_ 1 DT 


_LEN 


02A1 






R0M_ 1 DT 


_L0C: 












IDT GOT DEF ROM 


02A1 


0100 


+ 




DW 


ROM IDT llEN 


02A3 


02A7 R 


+ 




DW 


ROM IDT 


02A5 


OF 


+ 




DB 


CSEG@ HI 


02A6 


00 


+ 




DB 



ROM EXCEPTION 


02A7 






ROM IDT 










; EXCEPT 


ioN 00 
DESCR 


DEF GATE, EX 


02A7 


03A7 R 


+ 




DW 


EX INT 


02A9 


0020 


+ 




DW 


BIOS CS 


02AB 


00 


+ 


nges) 


DB 





02AC 


87 


+ 




DB 


TRAP GATE 


02AD 


0000 






DW 











; EXCEPT ION 01 












DESCR 


DEF GATE, EX 


02AF 


03A7 R 


+ 




DW 


EX INT 


02B1 


0020 


+ 




DW 


BIOS CS 


02B3 


00 


+ 


nges) 


DB 





02B4 


87 






DB 


TRAP GATE 


02B5 


0000 


+ 


; EXCEPT 


DW 

ION 02 
DESCR 



DEF GATE, EX_ 


02B7 


03A7 R 






DW 


EX INT 


02B9 


0020 






DW 


BIOS CS 


02BB 


00 


* 


nges) 


DB 





02BC 


87 






DB 


TRAP GATE 


02BD 


0000 


' 


; EXCEPT 


DW 
ION 03 
DESCR 



DEF GATE, EX 


02BF 


03A7 R 


+ 




DW 


EX INT 


02C1 


0020 






DW 


BIOS CS 


02C3 


00 


"•■ 


nges) 


DB 





02C4 


87 


+ 




DB 


TRAP GATE 


02C5 


0000 


+ 




DW 











; EXCEPT ION 04 












DESCR 


DEF GATE, EX 


02C7 


03A7 R 






DW 


EX INT 


02C9 


0020 






DW 


BIOS CS 


02CB 


00 


+ 


nges) 


DB 





02CC 


87 






DB 


TRAP GATE 


02CD 


0000 


* 


; EXCEPT 


DW 

ION 05 
DESCR 



DEF GATE, EX 


02CF 


03A7 R 






DW 


EX INT 


0201 


0020 






DW 


BI0S_CS 


02D3 


00 


* 


nges) 


DB 





0204 


87 






DB 


TRAP GATE 


0205 


0000 






DW 











; EXCEPT ION 06 












DESCR 


DEF GATE, EX 


0207 


03A7 R 


+ 




DW 


EX INT 


02D9 


0020 


+ 




DW 


BIOS CS 


02DB 


00 


■*" 


nges) 


DB 





02 DC 


87 






DB 


TRAP GATE 


02DD 


0000 




; EXCEPT 


DW 
ION 07 
DESCR 



DEF GATE, EX 


02DF 


03A7 R 


+ 




DW 


EX INT 


02E1 


0020 






DW 


BIOS CS 


02E3 


00 


+ 


nges) 


DB 





02EU 


87 






DB 


TRAP GATE 


02E5 


0000 


' 


; EXCEPT 


DW 
ION 08 
DESCR 



DEF GATE,EX_ 


02E7 


03A7 R 






DW 


EX INT 


02E9 


0020 






DW 


BIOS CS 


02EB 


00 


■^ 


nges) 


DB 





02EC 


87 






DB 


TRAP GATE 


02ED 


0000 






DW 











; EXCEPTION 09 












DESCR 


DEF GATE, EX 


02EF 


03A7 R 


+ 




DW 


EX INT 


02F1 


0020 






DW 


BIOS CS 


02 F3 


00 


+ 


nges) 


DB 





02Fii 


87 


+ 




DB 


TRAP GATE 


02 F5 


0000 


+ 




DW 











; EXCEPTION 10 












DESCR 


DEF. GATE, EX 


02F/ 


03A7 R 


+ 




DW 


EX INT 


02F9 


0020 


+ 




DW 


BIOS CS 


02FB 


00 


+ 


nges) 


DB 





02FC 


87 


+ 




DB 


TRAP GATE 


02FD 


0000 


+ 




DW 











; EXCEPT ION 11 












DESCR 


DEF GATE, EX_ 


02FF 


03A7 R 


+ 




DW 


EX INT 


0301 


0020 


+ 




DW 


B 1 0S_CS 


0303 


00 


+ 


nges) 


DB 





030U 


87 


+ 




DB 


TRAP_GATE 


0305 


0000 


+ 


; EXCEPT 


DW 

ION 12 
DESCR 



DEF GATE, EX_ 


0307 


03A7 R 


+ 




DW 


EX INT 


0309 


0020 


+ 




DW 


BI0S_CS 



SAVE AL 

CHECK THE ENDING STATUS 
SET THE ZERO FLAG 
RESTORE AL 
TURN INTERRUPTS ON 
RETURN TO USER 



; SIZE OF THE EXCEPTION INTERRUPTS 



DT_LEN, R0M_ I DT, CSEG@_H I 

; Segment limit 
; Segment base address - low word 

; Segment base address - high byte 
; Reserved 

INTERRUPT VECTORS 



T, B I OS_CS, 0, TRAP_GATE 
; Destination offset 
; Destination segment selector 
; Word count for stack-to-stack copy (only for call gates when PL cha 

; Access rights byte 
; Reserved 

T, B I OS_CS, 0, TRAP_GATE 
; Destination offset 
; Destination segment selector 
; Word count for stack-to-stack copy (only for call gates when PL cha 

; Access rights byte 
; Reserved 

T, B I OS_CS, 0, TRAP_GATE 
; Destination offset 
; Destination segment selector 
; Word count for stack-to-stack copy (only for call gates when PL cha 



Access rights byte 



B I 0S_CS, 0, TRAP_GATE 
Destination offset 
Destination segment selector 
Word count for stack-to-stack copy (only for ( 



gates when PL cha 



Access rights byte 



Reserved 

B I 0S_CS, 0, TRAP_GATE 
Destination offset 
Destination segment selector 
Word count for stack-to-stack copy (only for call gates when PL cha 

; Access rights byte 



INT,BIOS_CS,0. 
; Destinat 
; Destinat 
; Word count for stack-to-sta( 

; Access rights byte 



; copy (only for call gates when PL cha 



B IOS_CS, 0, TRAP_GATE 
Destination offset 
Destination segment selector 
Word count for stack-to-stack copy (only for call gates when PL cha 

; Access rights byte 
Reserved 

B t OS_CS, 0, TRAP_GATE 
Destination offset 
Destination segment selector 
Word count for stack-to-stack copy (only for call gates when PL cha 

; Access rights byte 
Reserved 

B 1 OS_CS, 0, TRAP_GATE 
Destination offset 
Destination segment selector 
Word count for stack-to-stack copy (only for call gates when PL cha 

; Access rights byte 
Reserved 

B I 0S_CS, 0, TRAP_GATE 
Destination offset 
Destination segment selector 
Word count for stack-to-stack copy (only for call gates when PL cha 

; Access rights byte 



;_1NT,BIOS_CS,0 



se lector 



Word count for stack-to-stack copy (only for call gates when PL cha 

; Access rights byte 
Reserved 

BIOS_CS,0,TRAP_GATE 
Destination offset 
Destination segment selector 
Word count for stack-to-stack copy (only for call gates when PL cha 

; Access rights byte 
Reserved 

B I OS_CS, 0, TRAP_GATE 
Destination offset 
Destination segment selector 



BIOS 1 5-153 



031F 
0321 
0323 



0327 
0329 
032B 



032F 
0331 
0333 



nges) 

; EXCEPT I i 



nges) 

I 
1 

; EXCEPT I ( 



nges) 

[ 
I 

; EXCEPT l( 



nges) 

; EXCEPT h 



nges) 

; EXCEPTS 



TRAP GATE 



:_DEF GATE,EX_ 
EX_INT 
BIOS_CS 



;_DEF GArE,EX_ 
EX_INT 
BIOS_CS 



:_DEF GATE,EX_ 
EX_ I NT 
BIOS_CS 



;_DEF GATE,EX_ 
EX_ I NT 
BIOS_CS 



rRAP_GATE 



;_DEF GATE,EX_ 
EX_INT 
BIOS_CS 



TRAP_GATE 



Word count for ; 



B I OS_CS, 0, TRAP_GATE 
Destination offset 
Destination segment selecti 
Word count for stack-to-sti 



B I OS_CS, 0, TRAP_GATE 
Destination offset 
Destination segment selecto 
Word count for stack- 



ily for call gates when PL cha 



:k copy (only for 



gates when PL cha 



ck copy (only for call gates when PL cha 



BIOS_CS,0,TRAP_GATE 
Destination offset 
Destination segment selector 
Word count for stack-to-stac 



:opy (only for call gates when PL cha 



; Reserved 

T, B I OS_CS, 0, TRAP_GATE 
; Destination offset 
; Destination segment selector 
; Word count for stack-to-stack copy (only for ca I 

; Access rights byte 



, B I OS_CS, 0, TRAP_GATE 

; Destination offset 

; Destination segment se I ec 

; Word count for stack-to-s 

; Access rights byt( 



gates when PL cha 



: copy (only for call gates when PL cha 



_DEF GATE,EX_ 
EX_ I NT 
BIOS_CS 



TRAP_GATE 



BIOS_CS,0,TRAP_GATE 
Destination offset 
Destination segment selector 
Word count for stack-to-stack copy (only for call gates when PL cha 



033F 
0341 
0343 



_DEF GATE.EX_ 
EX_ I NT 
BIOS_CS 



TRAP_GATE 



BIOS_CS,0,TRAP_GATE 
Destination offset 
Destination segment seleci 
Word count for stack-to-si 

; Access rights byt< 



gates when PL cha 



_DEF GATE,EX_ 
EX__ I NT 
BIOS_CS 


TRAP_GAIL 



, B I 0S_CS, 0, TRAP__GATE 

; Destination offset 

; Destination segment selector 

; Word count for stack-to-stack copy (only for 



a t I gates when PL cha 



034F 
0351 
0353 



_DEF GATE,EX_ 
EX INT 
BIOS_CS 



TRAP_GATE 



Word count for stack- 

; Access rights byt 



tack copy (only for call gates when PL cha 



0357 
0359 
035B 



035F 
0361 
0363 



0367 
0369 
0368 



036F 
0371 
0373 



0377 
0379 
037B 



037 F 
0381 
0383 



nges) 

I 
; EXCEPT 1 1 



nges) 

[ 
[ 

; EXCEPT I ( 



nges ) 

[ 
[ 

; EXCEPT I ( 



nges ) 

I 

I 

; EXCEPT I ( 



nges) 

I 

I 

; EXCEPT 1 1 



_DEF GATE,EX_ 
EX_INT 
B I OS_CS 



TRAP_GATE 



;_DEF GATE,EX_ 
EX_ I NT 
BIOS_CS 



TRAP_GATE 



;_DEF GATE,EX_ 
EX_INT 
BIOS_CS 



TRAP_GATE 



;_DEF GATE,EX_ 
EX_INT 
RIOS_CS 



_DEF GATE, EX_ 
EX_INT 
BIOS_CS 



TRAP_GATE 



_DEF GATE,EX_ 
EX_INT 
BIOS_CS 



TRAP_GATE 



_DEI- GAIE,EX_INT, 



BIOS_CS,0,TRAP_GATE 
Destination offset 
Destination segment selector 
Word count for stack-to-staci 

; Access rights byte 



opy (only for call gates when PL cha 



8 I OS_CS. 0, TRAP_GATE 
Destination offset 
Destination segment select 
Word count for stack-to-st 



ick copy (only for call gates when PL cha 



, B I OS_CS, , TRAP_GATE 

; Destination offset 

; Destination segment selector 

; Word count for stack-to-stack copy (only for ca I 



es when PL cha 



BIOS_CS,0,TRAP_GATE 
Destination offset 
Destination segment si 
Word count for stack- 



B I OS_CS, 0, TRAP_GATE 



Word count for stack- to-sta( 

; Access rights byte 
Reserved 

BIOS_CS,0.TRAP_GATE 



ily for call gates when PL cha 



; copy (only for 



; copy (only for 



I I gates when PL cha 



ates when PL cha 



5-154 BIOS 1 



0387 
0389 
038B 



TRAP_GATE 



Destination offset 

Destination segment selector 

Word count for stack-to-stack copy (o 

; Access rights byte 



ly for ca I I gates when PL cha 



038F 
0391 
0393 



GATE. EX_1 NT, B I OS_CS, 0, 'rF!AP_GATE 
EXINT ; Destination offset 

BIOS_CS ; Destination segment selector 

; Word count for stack-to-stack copy (only for call gates when PL ( 



0397 
0399 
039B 



GATE, EX_INT,BIOS_CS,0,TRAP_GATE 
EX_INT ; Destination offset 

BI0S_CS ; Destination segment selector 

; Word count for stack-to-stack copy (on 



y for call gates when pl cha 



039F 
03A1 
03A3 



03A7 
03A7 
03A9 
03AB 
03AE 
03AE 

03BO 



BO 02 
E6 80 
E9 0000 E 



I NT, B I 0S_CS, 0, TRAP_GATE 
; Destination offset 
; Destination segment 
; Word count for stacl 



copy (only for call gates when PL cha 



TRAP_GATE 



Reserved 
EXCEPTION INTERRUPT HANDLER 



Access rights byte 



MOV 
OUT 
JMP 



AL,02H 

MFG_PORT,AL 

PROC_SHUTOOWN 



SET EXCEPTION INT 
CAUSE A EARLY SHUTDOWN 
STAY HERE TILL SHUTDOWN 



03BO 
03BO 
03B1 
03B4 
03B6 
03B8 
03BA 
03BD 
03BF 
03C1 
03C3 



GATE_A20 

THIS ROUTINE CONTROLS A SIGNAL WHICH GATES ADDRFSS BIT 20. 

THE GATE A20 SIGNAL IS AN OUTPUT OF THE 8042 SLAVE PROCCESSOR. 

ADDRESS BIT 20 SHOULD BE GATED ON BEFORE ENTERING PROTECTED MODE. 

IT SHOULD BE GATED OFF AFTER ENTERING REAL MODE FROM PROTECTED 

MODE. 
INPUT 

(AH)=DDH ADDRESS B I T 20 GATE OFF. ( A20 ALWAYS ZERO) 

(AH)=DFH ADDRESS BIT 20 GATE ON. ( A20 CONTROLLED BY 80286) 
OUTPUT 

(AL)=0 OPERATION SUCCESSFUL. 80U2 HAS ACCEPTED COMMAND. 

(AL)=2 FAILURE--80U2 UNABLE TO ACCEPT COMMAND. 



E8 03C7 R 
75 10 
BO D1 
E6 64 
E8 0307 R 
75 07 
8A C4 
E6 60 
E8 03C7 R 



CLI 

CALL 

JNZ 

MOV 

OUT 

CALL 



PROC 



EMPTY_8042 
GATE_A20_RETURN 
AL, 0D1H 

STATUS_P0RT,AL 
EMPTY_80U2 



; DISABLE INTERRUPTS WHILE USING 8042 

; INSURE 8042 INPUT BUFFER EMPTY 

; RETURN I F 8042 UNABLE TO ACCEPT COMMAND 

;8042 COMMAND TO WRITE OUTPUT PORT 

; OUTPUT COMMAND TO 8042 

;WAIT FOR 8042 TO ACCEPT COMMAND 



JNZ GATE_A20_RETURN ; RETURN IF 8042 UNABLE TO ACCEPT COMMAND 

MOV AL,AH ;8042 PORT DATA 

OUT PORTIA, AL ; OUTPUT PORT DATA TO 8042 

CALL EMPTY_8042 ;WAIT FOR 8042 TO ACCEPT PORT DATA 

8042 OUTPUT WILL SWITCH WITHIN 20 USEC OF ACCEPTING PORT DATA 



03C7 






03C7 


■jl 




03C8 


2B 


C9 


03CA 






03CA 


E4 


64 


03CC 


24 


0? 


03CE 


^0 


FA 


03DO 


59 




03D1 


C3 





03D2 






03D2 


l-B 




03D3 


BO 


31 


03D5 


E6 


70 


03D7 


FB 


on 


03D9 


F4 


71 


03DB 


86 


C4 


03DD 


BO 


30 


03DF 


E6 


70 



EMPTY_8042 

THIS ROUTINE WAITS FOR THE 8042 INPUT BUFFER TO EMPTY. 
INPUT 

NONE 
OUTPUT 

(AL)=0 8042 INPUT BUFFER EMPTY (ZERO FLAG SET) 

(AL)=2 TIME OUT, 8042 INPUT BUFFER FULL (NON-ZERO FLAG SET) 

EMPTY_8042: 

PUSH 

SUB 
EMPTY_LOOP: 



AND 
LOOPNZ 
POP 
RET 



AL,STATUS_PORT ; READ 8042 STATUS PORT 
AL, INPT_BUF_FULL;TEST INPUT BUFFER FULL FLAG (BIT 1) 
EMPTY_LOOP ;LOOP UNTIL INPUT BUFFER EMPTY OR TIME OUT 
CX ; RESTORE CX 



ENDP 



INT 15 (FUNCTION 88H - 10 MEMORY SIZE DETERMINE) 

EXT_MEMORY 

THIS ROUTINE RETURNS THE AMOUNT OF MEMORY IN THE 
SYSTEM THAT IS LOCATED STARTING AT THE 1024K ADDRESSING 
RANGE, AS DETERMINED BY THE POST ROUTINES. 
NOTE THAT THE SYSTEM MAY NOT BE ABLE TO USE 1/0 MEMORY 
UNLESS THERE IS A FULL COMPLEMENT OF 512K OR 640 BYTES 
ON THE PLANAR. THIS SIZE IS STORED IN CMOS AT ADDRESS 
30 AND 31. 
INPUT 

AH = 88H 



3. ALL INSTALLED MEMORY IS FUNCTIONAL. 

4. ALL MEMORY FROM TO 640K MUST BE CONTIGUOUS. 



EXT MEMORY 


PROC 


STI 




MOV 


AL,31H 


OUT 


CMOS PORT,AL 


JMP 


SHORT $+2 


IN 


AL,CMOS PORT+1 


XCHG 


AL,AH 


MOV 


AL,30H 


OUT 


CMOS PORT.AL 



BIOS 1 5-155 



03E1 EB 00 

03E3 EU 71 

03E5 CF 
03E6 



JMP 



10 DELAY 
RETURN TO USER 



SHORT $+2 
AL,CM0S_P0RT+1 
I RET 
EXT_MEMORY ENDP 
PAGE 

INT 15H (FUNCTION 89H) 

PURPOSE: 

THIS BIOS FUNCTION PROVIDES A MEANS TO THE USER TO 
SWITCH INTO VIRTUAL (PROTECTED) MODE. UPON COMPLETION 
OF THIS FUNCTION THE PROCESSOR WILL BE IN VIRTUAL 
(PROTECTED) MODE AND CONTROL WILL BE TRANSFERED TO THE 
CODE SEGMENT THAT WAS SPECIFIED BY THE USER. 

ENTRY REQUIREMENTS: 

ES:SI POINTS TO A DESCRIPTOR TABLE (GOT) BUILT BEFORE 
INTERRUPTING TO THIS FUNCTION. THESE DESCRIPTORS ARE 
ARE USED BY THIS FUNCTION TO INITIALIZE THE IDTR, THE 
GDTR AND THE STACK SEGMENT SELECTOR. THE DATA SEGMENT 
(DS) SELECTOR AND THE EXTRA SEGMENT ( ES ) SELECTOR WILL 
BE INITIALIZE TO DESCRIPTORS BUILT BY THE ROUTINE USING 
THIS FUNCTION. 
BH - OFFSET INTO THE INTERRUPT DESCRIPTOR TABLE 

STATING WHERE THE FIRST EIGHT HARDWARE INTERRUPTS 

WILL BEGIN. ( INTERRUPT LEVEL 1 ) 
BL - OFFSET INTO THE INTERRUPT DESCRIPTOR TABLE 

STATING WHERE THE SECOND EIGHT HARDWARE 

INTERRUPTS WILL BEGIN. ( INTERRUPT LEVEL 2 ) 

THE DESCRIPTORS ARE DEFINED AS FOLLOWS: 

1. THE FIRST DESCRIPTOR IS THE REQUIRED DUMMY. 
(USER INITIALIZED TO 0) 

2. THE SECOND DESCRIPTOR POINTS TO THE GDT TABLE AS 
A DATA SEGMENT. 

(USER INITIALIZED) 

3. THE THIRD DESCRIPTOR POINTS TO THE USER DEFINED 
INTERRUPT DESCRIPTOR TABLE (IDT). 

(USFR INITIAI IZFD) 
U. THE FORTH DESCRIPTOR POINTS TO THE USER'S DATA 
SEGMENT (DS). 
(USER INITIALIZED) 

5. THE FIFTH DESCRIPTOR POINTS TO THE USER'S EXTRA 
SEGMENT (ES). 

(USER INITIALIZED) 

6. THE SIXTH DESCRIPTOR POINTS TO THE USER'S STACK 
SEGMENT (SS). 

(USER INITIALIZED) 

7. THE SEVENTH DESCRIPTOR POINTS TO THE CODE SEGMENT 
THAT THIS FUNCTION WILL RETURN TO. 

(USER INITIALIZED TO THE USER'S CODE SEGMENT.) 

8. THE EIGTH DESCRIPTOR IS USED BY THIS FUNCTION TO 
ESTABLISH A CODE SEGMENT FOR ITSELF. THIS IS 
NEEDED SO THAT THIS FUNCTION CAN COMPLETE IT'S 
EXECUTION WHILE IN PROTECTED MODE. WHEN CONTROI 
GETS PASSED TO THE USER'S CODE THIS DESCRIPTOR CAN 
BE USED BY HIM IN ANY WAY HE CHOOSES. 

NOTE - EACH DESCRIPTOR MUST CONTAIN ALL THE NECESSARY 

DATA I.E. THE LIMIT, BASE ADDRESS AND THE ACCESS 
RIGHTS BYTE. 

AH=88H (FUNCTION CALL) 

ES:SI = LOCATION OF THE GOT TABLE BUILD BY ROUTINE 

USING THIS FUNCTION. 

EXIT PARAMETERS: 



■ DESTROYED 



CONSIDERATIONS: 



NO BIOS AVAILABLE TO USER. USER MUST HANDLE ALL 

10 COMMANDS. 

INTERRUPTS - INTERRUPT VECTOR LOCATIONS MUST BE 

MOVED, DUE TO THE 286 RESERVED AREAS. THE 

HARDWARE INTERRUPT CONTROLLERS MUST BE REINITIALIZED: 

TO DEFINE LOCATIONS THAT 00 NOT RESIDE IN THE 286 

RESERVED AREAS. 

EXCEPTION INTERRUPT TABLE AND HANDLER MUST BE 

INITIALIZED BY THE USER. 

THE INTERRUPT DESCRIPTOR TABLE MUST NOT OVERLAP 

THE REAL MODE BIOS INTERRUPT DESCRIPTOR TABLE. 

THE FOLLOWING GIVES AN IDEA OF WHAT THE USER CODE 

SHOULD LOOK LIKE WHEN INVOKING THIS FUNCTION. 



Rea 1 mode 


T' 


"USER 
MOV 
MOV 
MOV 


CODE" 

AX, GDT SEGMENT 

ES,AX 

SI, GDT OFFSET 








MOV 


BH, HARDWARE INT LEVEL 1 


OFFSET 






MOV 


BL, HARDWARE INT LEVEL 2 


OFFSET 






MOV 


AH,88H 








INT 


1511 




tua 1 mode 


— > 


"USER 


CODE" 





DESCRI PTION: 



CLI (NO INTERRUPTS ALLOWED) WHILE THIS FUNCTION I! 

EXECUTING. 

ADDRESS LINE 20 IS GATED ACTIVE. 

THE CURRENT USER STACK SEGMENT DESCRIPTOR IS 

INITIALIZED. 

THE GDTR IS LOADED WITH THE GDT BASE ADDRESS. 

THE IDTR IS LOADED WITH THE IDT BASE ADDRESS. 

THE 8259 IS REINITIALIZED WITH THE NEW INTERRUPT 

OFFSETS. 

THE PROCESSOR IS PUT IN VIRTUAL MODE WITH THE COD! 

SEGMENT DESIGNATED FOR THIS FUNCTION. 

DATA SEGMENT IS LOADED WITH THE USER DEFINED 

SELECTOR FOR THE DS REGISTER. 

EXTRA SEGMENT IS LOADED WITH THE USER DEFINED 

SELECTOR FOR THE ES REGISTER. 

STACK SEGMENT IS LOADED WITH THE USER DEFINED 

SELECTOR FOR THE SS REGISTER. 

CODE SEGMENT DESCRIPTOR SELECTOR VALUE IS 

SUBSTITUTED ON THE STACK FOR RETURN TO USER. 

WE TRANSFER CONTROL TO THE USER WITH INTERRUPTS 

DISABLED. 



5-156 BIOS 1 



+00 
+08 



DUMMY 
GOT 



+ 30 I I 



TEMP BIOS 



0000 


00 
00 


00 
00 


00 


00 


00 


00 


DUMY 


0008 


00 

00 


00 
00 


00 


00 


00 


00 


GDTPTR 


0010 


00 
00 


00 
00 


00 


00 


00 


00 


IDTPTR 


0018 


00 
00 


00 
00 


00 


00 


00 


00 


USER_DS 


0020 


00 
00 


00 
00 


00 


00 


00 


00 


USER_ES 


0028 


00 
00 


00 
00 


00 


00 


00 


00 


USER__SS 


0030 


00 

00 


00 
00 


00 


00 


00 


00 


USER_CS 


0038 


00 
00 


00 
00 


00 


00 


00 


00 


BIO_CS 



THE GLOBAL DESCRIPTOR TABLE (ACTUAL LOCATION PO I N I LD TO BY ES:SI) 



FIRST DESCRIPTOR NOT ACCESSIBLE 
GDT DESCRI PTOR 
IDT DESCRI PTOR 
USER DATA SEGEMNT DESCRI TOR 
USER EXTRA SEGMENT DESCRIPTOR 
USER STACK SEGMENT DESCRIPTOR 
USER CODE SEGMENT DESCRIPTOR 
TEMPORARY BIOS DESCRIPTOR 



VIRTUAL_ENA8LE_GDT_DEF ENDS 



ASSUME CS:CODE 
ASSUME DS:DATA 



ENABLE ADDRESS LATCH B I T 20 



03E7 


m 


DF 


03E9 


E8 


03B0 


03EC 


3C 


00 


03EE 


7U 


04 


031-0 


HH 


FF 


03 F2 


F9 




03F3 


Cl- 




03Ft4 






03FU 


26 




03 F5 


OF 




03F6 






03F6 


8B 


5U 08 


03F9 






03 F6 






03 F6 


01 




03 F9 






03 F9 


26 




03 FA 


OF 




03FB 






03FB 


fiB 


5C 10 


03FE 






03FB 






03FB 


01 




03FE 







03FE 


BO 


n 


0400 


E6 


20 


0't02 


EB 


00 


0404 


«A 


c/ 


0406 


F6 


21 


0408 


m 


00 


040A 


BO 


04 


040C 


1-6 


21 


040E 


FB 


00 


0410 


BO 


01 


0412 


E6 


21 


0414 


LB 


00 


0416 


BO 


FF 


0418 


E6 


21 



70015 
70016 



70018 
70019 



MOV 

CALL 

CMP 

JZ 

MOV 

STC 

I RET 



SFGOV 

DB 

LGDT 

DB 

LABEL 

MOV 

LABEL 

ORG 



AH,ENABLE_BIT20 

CATE_A20 

AL,0 

BIT20_ON 

AII.OFFH 



ES 



LABEL 
MOV 
LABEL 
ORG 



026H 

[SI ] .GDTPTR 

OOFH 

BYTE 

DX,WORD PTR (SI ]. GDTPTR 

BYTL 

OFFSET CS:7?0015 

001H 

OFFSET CS:7?0016 

ES 

026H 

[SI ]. IDTPTR 

OOFH 

BYTE 

BX,WORD PTR [SI]. IDTPTR 

BYTE 

OFFSET CS:7?0018 

001H 

OFFSET CS:??0019 



NO INTERRUPTS ALLOWED 



ENABLE BIT 20 FOR ADDRESS GATE 

WAS THE COMMAND ACCEPTED? 

GO IF YES 

SET THE ERROR FLAG 

SET CARRY 

EARLY EXIT 



LOAD THE GLOBAL DESCRIPTOR TABLE REG 



LOAD THE INTERUPT DESCRIPTOR TABLE REG 



REINITIALIZE THE 8259 INTERRUPT CONTROLLER ff^ TO THE USER SPECIFIED OFFSET | 



MOV 
OUT 
JMP 
MOV 
OUT 
JMP 
MOV 
OUT 
JMP 
MOV 
OUT 
JMP 
MOV 
OUT 



AL, 11 H 

INTAOO.AL 
SHORT $+2 
AL,BH 

INTA01,AL 
SHORT $+2 
AL,04H 

INTA01,AL 
SHORT S+2 
AL,01H 

INTA01,AL 
SHORT $+2 
AL,OFFH 

INTA01,AL 



SEND ICW3 - MASTER LEVEL 2 
SEND ICW4 - MASTER, 8086 MODE 
MASK OFF ALL INTERRUPTS 



041A BO 11 



REINITIALIZE THE 8259 INTERRUPT CONTROLLER #2 TO THE USER SPECIFIED OFFSET | 
MOV AL, 11H ; START IN IT SEQUENCE- I CW1 FOR SLAVE 



BIOS 1 5-157 



04 1C 


F6 


AO 


OaiE 


m 


00 


0U20 


8A 


C3 


0U22 


E6 


A1 


0U24 


BO 


02 


0426 


EB 


00 


0428 


E6 


A1 


042A 


FB 


00 


042C 


BO 


01 


042E 


K6 


A1 


0430 


FB 


on 


0432 


BO 


FF 


0434 


E6 


AT 



OUT 


INTBOO.AL 


JMP 


SHORT $+2 


MOV 


AL.BL 


OUT 


INTB01,AL 


MOV 


AL,02H 


JMP 


SHORT $+2 


OUT 


INTB01,AL 


JMP 


SHORT $+2 


MOV 


AL.OIH 


OUT 


INTB01,AL 


JMP 


SHORT $+2 


MOV 


AL,OFFH 


OUT 


INTBOl.AL 



EDGE, I NTERVAL-8, MASTER, I CW4 NEEDED 

HARDWARE I NT'S START AT I NT # ( BL) 
SEND ICW2 

SEND ICW3 - SLAVE LEVEL 2 

SEND ICW4 - SLAVE, 8086 MODE 

MASK OFF ALL INTERRUPTS 



SETUP BIOS CODE SEGMENT DESCRIPTOR 



0436 26: 07 44 38 FFFF 
C43C 26: 06 44 30 OF 
0441 26: 07 44 3A 0000 



0452 B8 0001 



MOV 
MOV 
MOV 



ES : [ S I ] . B I 0_CS . SEG_L I M I T , MAX_SEG_LEN 
ES: [SI ].BIO_CS.BASE_HI_BYTE,CSEG@_HI 
ES: (SI ].BIO_CS.BASE_L0_W0RD,CSEG@_L0 



SET LENGTH 

SET HIGH BYTE OF CS=OF 
SET LOW WORD OF CS=0 
SET ACCESS RIGHTS BYTE 
ES: [SI ].BIO_CS.DATA_ACC_RIGHTS,CPL0_CODE_ACCESS 
ES: [SI ].BIO_CS.DATA_RESERVED,0 ; ZERO RESERVED AREA 



0455 


OF 


0456 




0456 


8B FO 


0458 




0456 




0456 


01 


0458 




0458 


EA 


0459 


045D R 


045B 


0038 



045D 


B8 


0018 


0460 


8F 


08 


0462 


B8 


0020 


0465 


8t 


CO 


0467 


B8 


0028 


046A 


8E 


DO 



ENABLE PROTECTED MODE 



MOV 


AX, VIRTUAL ENABL 


LMSW 


AX 


DB 


OOFH 


LABEL 


BYTE 


MOV 


SI, AX 


LABEL 


BYTE 


ORG 


OFFSET CS:??001A 


DB 


001H 


ORG 


OFFSET CS:??001B 


JUMPFAF 


VM0DE,BI0 CS 


DB 


OEAH 


DW 


(OFFSET VMODE) 


DW 


B 1 0_CS 



MUST PURGE PRE-FETCH QUEUE 
; Jump f a r d i rect 
; to this offset 
I this segment 



VMODE: 

SETUP USER SEGMENT REGISTERS 



MOV 
MOV 
MOV 
MOV 
MOV 
MOV 



AX, USER_DS 

OS, AX 

AX, USER_ES 

ES,AX 

AX, USER_SS 

SS,AX 



SETUP USER'S DATA SEGMENT 
SETUP USER'S EXTRA SEGMENT 
SETUP USER'S STACK SEGMENT 



PUT TRANSFER ADDRESS ON THE STACK AND RETURN TO THE USER 



0470 
0471 
0473 
0474 



ADD 


SP,4 


1 PUSH 


USER 03 


DB 


068H 


DW 


USER CS 


PUSH 


BX 


RET 





GET RETURN I P FROM THE STACK 
NORMALIZE STACK POINTER 
SET STACK FOR A RETURN FAR 



RETURN TO USER IN VIRTUAL MODE 



X_VIRTUAL ENDP 
DEVICE BUSY AND 



0475 

0475 F8 

0476 E9 004F R 
0479 

0479 

0479 CF 
047A 



NTERRUPT COMPLETE 



DEV1CE_BUSY 
CLC 
JMP 

OEVICE_BUSY 

INT_COMPLETE 

IRET 

INT_COMPLETE 



PROC 

C1_F 
ENDP 

PROC 

ENDP 



5-158 BIOS 1 



TITLE 08-08-83 B I 0S2 BIOS INTERRUPT 

-LIST 

INCLUDE SEGMENT. SRC 

CODE SEGMENT BYTE PUBLIC 

EXIRN DDS:NEAR 

PUBL I C T I ME_0F_DAY_1 , T I MER_ 1 NT_1 , PR I NT_SCREEN_1 
PUBLIC RTC_INT 
--- INT 1A 

TIME_OF_DAY 

THIS ROUTINE ALLOWS THE CLOCK TO BE SET/READ 



READ THE CURRENT CLOCK SETTING 
RETURNS CX = HIGH PORTION OF COUNT 
DX = LOW PORTION OF COUNT 

AL = IF TIMER HAS NOT PASSED 2U HOURS : 
SINCE LAST READ. <> I F ON ANOTHER DAY : 
SET THE CURRENT CLOCK 
HIGH PORTION OF COUNT 
■■ LOW PORTION OF COUNT 



(AH) = 2 READ THE REAL TIME CLOCK 
RETURNS CH = HOURS IN BCD 

CL = MINUTES IN BCD 
DH = SECONDS IN BCD 

(AH) = 3 SET THE REAL TIME CLOCK 

CH = HOURS IN BCD 

CL = MINUTES IN BCD 

DH = SECONDS IN BCD 

DL = 1 IF DAYLIGHT SAVINGS TIME OPTION, ELSE 

(AH) = U READ THE DATE FROM THE REAL TIME CLOCK 
RETURNS CH = CENTURY IN BCD (19 OR 20) 
CL = YFAR I N BCD 
DH = MONTH IN BCD 
DL = DAY IN BCD 



(AH) = 5 



SET THE DATE INTO THE REAL TIME CLOCK 
CENTURY IN BCD ( 19 OR 20) 
CL = YEAR IN BCD 
DH = MONTH IN BCD 
DL = DAY IN BCD 

I) = 6 SET THE ALARM 

THE ALARM CAN BE SET TO INTERRUPT UP TO 

23:59:59 FROM PRESENT TIME. 

ONE ALARM FUNCTION MAY BE ACTIVE AT ANY TIME 

CH = HOURS IN BCD 
CL = MINUTFS IN BCD 
DH = SECONDS IN BCD 

I) = 7 RESET THE ALARM 

FOR AH = 2, 4, 6 - CY FLAG SET IF CLOCK NOT OPERATING 
FOR AH = 6 - CY FLAG SET I F ALARM ALREADY ENABLED 
FOR THE ALARM FUNCTION (AH = 6) THE USER MUST CODE A 
ROUTINE AND PLACE THE CORRECT ADDRESS IN THE VECTOR 
TABLE FOR INT '4AH 

ASSUME CS: CODE, DS: DATA 



0000 








0000 


FB 






0001 


IE 






0002 


E8 


0000 E 


0005 


OA 


E4 




0007 


74 


14 




0009 


FE 


CC 




OOOB 


74 


23 




0000 


80 


FC 


07 


0010 


7D 


03 




0012 


EB 


2C 


90 


0015 








0015 


FB 






0016 


IF 






0017 


CF 






0018 








0018 


F9 






0019 


IF 






OOIA 


CA 


0002 


001D 








001D 


FA 






001 E 


AO 


0070 R 


0021 


C6 


06 


0070 R 00 


0026 


8B 


OE 


006E R 


002A 


8B 


16 


006C R 


002E 


EB 


E5 




0030 








0030 


FA 






0031 


89 


16 


006C R 


0035 


89 


OE 


006E R 


0039 


C6 


06 


0070 R 00 


003E 


EB 


D5 




0040 








0040 


FE 


CC 




0042 


74 


07 




0044 


FE 


CC 




0046 


74 


26 




0048 


E9 


00D7 R 


004B 








004B 








004B 


E8 


01 B7 R 


004E 


73 


02 




0050 


EB 


C6 




0052 








0052 


FA 






0053 


B2 


FE 




0055 


E8 


0192 R 


0058 


E4 


71 




005A 


8A 


FO 




005C 


E8 


0192 R 


005F 


E4 


71 




0061 


8A 


C8 




0063 


E8 


0192 R 


0066 


E4 


71 





TIME_0F_DAY_1 



PUSH 


DS 


CALL 


DDS 


OR 


AH, AH 


JZ 


T2 


DEC 


AH 


JZ 


T3 


CMP 


AH, 7 


JGE 


T1 


JMP 


RTC_0 


STI 




POP 


DS 


IRET 





CLI 




MOV 


AL, TIMER OFL 


MOV 


TIMER OFL,0 


MOV 


CX, TIMER HIGH 


MOV 


DX, TIMER LOW 


JMP 


T1 


CLI 




MOV 


TIMER LOW,DX 


MOV 


TIMER HIGH,CX 


MOV 


TIMER OFL,0 


JMP 


T1 





JMP 


RIC 1 


RTC_GET 


_TIME 


PROC NEAR 


RTC_2 : 








CALL 


UPD IN PR 




JNC 


RTC 2A 




JMP 


T1_A 


RTC_2A: 








CLI 






MOV 


DL,-2 




CALL 


PORT INC 2 




IN 


AL,CMOS PORT+1 




MOV 


DH,AL 




CALL 


PORT INC 2 




IN 


AL,CMOS PORT+1 




MOV 


CL,AL 




CALL 


PORT INC 2 




IN 


AL,CMOS PORT+1 



INTERRUPTS BACK ON 

SAVE SEGMENT 

SET DATA SEGMENT 

AH=0 

READ_TIME 

AH=1 

SET_TIME 

CHECK IF VALID 

RETURN I F NOT VALID 

GO CHECK OTHER FUNCTIONS 

TOD_RETURN 

INTERRUPTS BACK ON 

RECOVER SEGMENT 

RETURN TO CALLER 



SET ERROR RETURN 



GET OVERFLOW, AND RESET THE FLAG 



TOD_RETURN 



SET THE TIME 
RESET OVERFLOW 
TOD_RETURN 



READ RTC TIME 



CHECK FOR UPDATE IN PROCESS 
GO AROUND I F OK 
RETURN IF ERROR 

INTERRUPTS OFF DURING READ 

SET ADDRESS OF SECONDS 



BIOS 2 5-159 



0068 


8A 


E8 




006A 


B2 


00 




006C 


EB 


A7 




006E 








006E 








006E 








006E 


E8 


01B7 


R 


0071 


73 


03 




0073 


E8 


019A 


R 


0076 








0076 


FA 






0077 


52 






0078 


82 


FE 




007A 


E8 


0192 


R 


007D 


8A 


C6 




007F 


E6 


71 




0081 


E8 


0192 


R 


008U 


8A 


CI 




0086 


E6 


71 




0088 


E8 


0192 


R 


008B 


8A 


C5 




008D 


E6 


71 




008 F 


B2 


OA 




0091 


E8 


018B 


R 


009U 


5A 






0095 


E4 


71 




0097 


24 


23 




0099 


OA 


C2 




009B 


OC 


02 




009D 


50 






009E 


B2 


OA 




OOAO 


E8 


018B 


R 


00A3 


58 






OOA'i 


E6 


71 




00A6 


E9 


0015 


R 


O0A9 








O0A9 








00A9 








00A9 


E8 


01 B7 


R 


OOAC 


73 


03 




OOAE 


E9 


0018 


R 


GOBI 








GOBI 


FA 






00B2 


B2 


06 




O0B4 


E8 


018B 


R 


O0B7 


E4 


71 




00B9 


8A 


E8 




OOBB 


E8 


018B 


R 


GOBE 


EU 


71 




OOCO 


8A 


FO 




00C2 


E8 


018B 


R 


00C5 


E4 


71 




O0C7 


8A 


C8 




O0C9 


B2 


31 




OOCB 


E8 


018B 


R 


GOCE 


EU 


71 




OODO 


8A 


D5 




0002 


8A 


E8 




OODU 


E9 


0015 


R 


00D7 








0007 








G0D7 


FE 


CC 




G0D9 


74 


CE 




OODB 


FE 


CC 




OODD 


74 


07 




GOOF 


FE 


CC 




O0E1 


74 


45 




00E3 


E9 


0175 


R 


00E6 








00E6 








00E6 


E8 


01B7 


R 


00E9 


73 


03 




GOEB 


E8 


019A 


R 


OOEE 








OOEE 


FA 






OOEF 


51 






00 FO 


8A 


EA 




00F2 


B2 


05 




GOFU 


E8 


018B 


R 


00 F7 


BO 


00 




00 F9 


E6 


71 




OOFB 


E8 


0188 


R 


OOFE 


8A 


C5 




0100 


E6 


71 




0102 


E8 


0188 


R 


0105 


8A 


C6 




0107 


E6 


71 




0109 


E8 


018B 


R 


G10C 


8A 


CI 




010E 


E6 


71 




0110 


82 


OA 




0112 


E8 


0188 


R 


0115 


E4 


71 




0117 


24 


7F 




0119 


E6 


71 




011B 


59 






one 


82 


31 




011E 


E8 


0188 


R 


0121 


8A 


C5 




0123 


E6 


71 




0125 


E9 


0015 


R 


0128 








0128 








0128 








0128 


62 


OA 




012A 


E8 


0188 


R 


0120 


E4 


71 




012F 


A8 


20 




0131 


74 


05 




0133 


33 


CO 




0135 


E9 


0018 


R 


0138 








0138 


E8 


01 B7 


R 


013B 


73 


03 




0130 


E8 


019A 


R 


01U0 








0140 


FA 






0141 


B2 


FF 




0143 


E8 


0192 


R 


0146 


8A 


C6 




0148 


E6 


71 







MOV 


CH,AL 




MOV 


DL,0 




JMP 


T1 


RTC_GET 


_TIME 


ENDP 


RTC SET 


TIME 


PROC NEAR 


RTC_3 : 








CALL 


UPD IN PR 




JNC 


RTC 3A 




CALL 


INITIALIZE_STATUS 


RTC_3A: 








CLI 






PUSH 


DX 




MOV 


DL,-2 




CALL 


PORT INC 2 




MOV 


AL.DH 




OUT 


CMOS P0RT+1,AL 




CALL 


PORT INC 2 




MOV 


AL.CL 




OUT 


CMOS P0RT+1,AL 




CALL 


PORT 1 NC 2 




MOV 


AL.CH 




OUT 


CMOS P0RT+1,AL 




MOV 


0L,0AH 




CALL 


PORT INC 




PGP 


DX 




IN 


AL,CMOS PORT+1 




AND 


AL,23H 




OR 


AL.DL 




OR 


AL,02H 




PUSH 


AX 




MOV 


DL,OAH 




CALL 


PORT INC 




PGP 


AX 




OUT 


CMOS PORT+1, AL 




JMP 


T1 ; 


RTC_SET 


_TIME 


ENDP 


RTC GET 


_DATE 


PROC NEAR 


RTC_4 : 








CALL 


UPD IN PR 




JNC 


RTC 4A 




JMP 


T1_A 


RTC_4A: 


CLI 






MOV 


DL,6 




CALL 


PORT INC 




IN 


AL,CMOS PORT+1 




MOV 


CH.AL 




CALL 


PORT INC 




IN 


AL,CMOS PORT+1 




MOV 


DH,AL 




CALL 


PORT INC 




IN 


AL,CMOS PORT+1 




MOV 


CL.AL 




MOV 


DL,31H 




CALL 


PORT INC 




IN 


AL,CMOS PORT+1 




MOV 


DL,CH 




MOV 


CH,AL 




JMP 


T1 


RTC_GET 


_DATE 


ENDP 


RTC_1 : 








DEC 


AH 





JZ 


RTC 6 




JMP 


RTC_7 


RTC SET 


_DATE 


PROC NEAR 


RTC_5: 








CALL 


UPD IN PR 




JNC 


RTC_5A 




CALL 


INITIALIZE_STATUS 


RTC_5A: 








CLI 






PUSH 


CX 




MOV 


CH.DL 




MOV 


DL.5 




CALL 


PORT INC 




MOV 


AL,OOH 




OUT 


CMOS PORT+1, AL 




CALL 


PORT INC 




MOV 


AL.CH 




OUT 


CMOS PORT+1, AL 




CALL 


PORT INC 




MOV 


AL,DH 




OUT 


CMOS PORT+1, AL 




CALL 


PORT INC 




MOV 


AL,CL 




OUT 


CMOS PGRT+1,AL 




MOV 


DL,OAH 




CALL 


PORT INC 




IN 


AL,CMOS PORT+1 




AND 


AL,07FH 




OUT 


CMOS P0RT+1.AL 




POP 


CX 




MOV 


DL,31H 




CALL 


PORT INC 




MOV 


AL,CH 




OUT 


CMOS PORT+1, AL 




JMP 


Tl 


RTC_SET 


_DATE 


ENDP 


RTC SET 


_ALARM 


PROC NEAR 


RTC_6 : 








MOV 


DL.OAH 




CALL 


PORT INC 




IN 


AL,CMOS PORT+1 




TEST 


AL,20H 




JZ 


RTC 6A 




XOR 


AX, AX 




JMP 


T1_A 


RTC_6A: 








CALL 


UPD IN PR 




JNC 


RTC 6B 




CALL 


INITIALIZE_STATUS 


RTC_6B: 








CLI 






MOV 


DL,-1 




CALL 


PORT INC 2 




MOV 


AL,DH 




OUT 


CMOS PORT+1, AL 



SAVE 

SET DL TO ZERO 

RETURN 



INTERRUPTS OFF DURING SET 

SAVE 

FIRST ADDRESS 

UPDATE ADDRESS 

GET TIME BYTE - SECONDS 

STORE TIME BYTE 

UPDATE ADDRESS 

GET TIME BYTE - MINUTES 

STORE TIME BYTE 

UPDATE ADDRESS 

GET TIME BYTE - HOURS 

STORE TIME BYTE 



RESTORE 

GET CURRENT VALUE 

MASK FOR VALID BIT POSITIONS 

GET DST BIT 

TURN ON 24 HR MODE 



RETURN ON ERROR 
INTERRUPTS OFF DURING READ 
POINT TO DAY 



SET RTC DATE 



INTERRUPTS OFF DURING SET 

SAVE 

SAVE DAY OF MONTH 

ADDRESS OF DAY OF WEEK REGISTER 



LOAD ZEROS TO 'DAY OF WEEK' BYTE 

ADDRESS OF DAY OF MONTH REGISTER 

GET DAY OF MONTH BYTE 

STORE IT 

ADDRESS MONTH REGISTER 

GET MONTH BYTE 

STORE IT 

ADDRESS OF YEAR REGISTER 

GET YEAR BYTE 

STORE IT 



GET CURRENT SET I NG 

CLEAR 'SET BIT' 

*AND START CLOCK UPDATING 

GET BACK 

POINT TO SAVE AREA 



GET CENTURY BYTE 

SAVE IT 

RETURN 



CHECK FOR ALARM ALREADY ENABLED 

GET CURRENT SETTING OF ALARM ENABLE 

ALARM NOT SET - GO PROCESS 

RETURN IF ERROR 

CHECK FOR UPDATE IN PROCESS 



INTERRUPTS OFF DURING SET 



5-160 BIOS 2 



OlUA 


E8 


0192 


R 


OIUD 


8A 


CI 




omr 


E6 


71 




0151 


E8 


0192 


R 


01 5U 


8A 


C5 




0156 


E6 


71 




0158 


E4 


Al 




01 5A 


24 


FE 




01 5C 


E6 


AT 




015E 


B2 


OA 




0160 


E8 


018B 


R 


0163 


EU 


71 




0165 


2U 


7F 




0167 


OC 


20 




0169 


50 






01 6A 


B2 


OA 




01 6C 


E8 


018B 


R 


016F 


58 






0170 


E6 


71 




0172 


E9 


0015 


R 


0175 








0175 








0175 








0175 


FA 






0176 


B2 


OA 




0178 


E8 


018B 


R 


017B 


E4 


71 




017D 


24 


57 




017F 


50 






0180 


82 


OA 




0182 


E8 


018B 


R 


0185 


58 






0186 


E6 


71 




0188 


E9 


0015 


R 



018B 


FE 


C2 


018D 


8A 


C2 


018F 


E6 


70 


0191 


C3 




0192 






0192 


80 


C2 02 


0195 


8A 


C2 


0197 


E6 


70 


0199 


C3 




019A 






019A 


52 




0198 


82 


09 


019D 


E8 


018B R 


OlAO 


BO 


26 


01A2 


E6 


71 


01A4 


E8 


0188 R 


01A7 


BO 


82 


01A9 


E6 


71 


01AB 


E8 


018B R 


OlAE 


E4 


71 


01BO 


E8 


018B R 


01B3 


E4 


71 


01B5 


5A 




01B6 


C3 




01B7 






01B7 






01B7 


51 




01B8 


B9 


0258 


OIBB 






01BB 


BO 


OA 


01BD 


E6 


70 


01BF 


EB 


00 


01C1 


tu 


71 


01C3 


A8 


80 


01C5 


74 


05 


01C7 


E2 


F2 


01C9 


33 


CO 


01CB 


F9 




01CC 






oicc 


59 




01CD 


C3 




OICE 






OICE 







OICE 








OICE 


FB 






01CF 


IE 






01 DO 


50 






OlDl 


52 






0102 


57 






01D3 


82 


OA 




01D5 


E8 


018B 


R 


01 D8 


E4 


71 




01 DA 


8A 


EO 




01DC 


E8 


018B 


R 


01DF 


E4 


71 




01E1 


22 


C4 




01 E3 


50 






01 EU 


A8 


40 




01 E6 


74 


2E 




01 E8 


E8 


0000 


E 


01 EB 


81 


2E 009C R 03D0 


01 F1 


83 


IE 009E R 00 


01 F6 


77 


IE 





CALL 


PORT INC 2 


MOV 


AL.CL 


OUT 


CMOS P0RT+1,AL 


CALL 


PORT INC 2 


MOV 


AL,CH 


OUT 


CMOS P0RT+1,AL 


IN 


AL,0A1H 


AND 


AL,OFEH 


OUT 


OAIH, AL 


MOV 


DL.OAH 


CALL 


PORT INC 


IN 


AL,CMOS PORT+1 


AND 


AL,07FH 


OR 


AL,20H 


PUSH 


AX 


MOV 


OL,0AH 


CALL 


PORT INC 


POP 


AX 


OUT 


CMOS PORT+1, AL 


JMP 


T1 


RTC_SET_ALARM 


ENDP 


RTC RESET ALARf 


PROC NEAR 


RTC 7: 




CLI 




MOV 


DL,OAH 


CALL 


PORT INC 


IN 


AL,CMOS PORT+1 


AND 


AL,57H 


PUSH 


AX 


MOV 


DL,OAH 


CALL 


PORT INC 


POP 


AX 


OUT 


CMOS PORT+1, AL 


JMP 


Tl 


RTC_RESET_ALAR^ 


ENDP 


RTC TIMEBIOS SUBR PROC 


PORT INC: 




INC 


DL 


MOV 


AL,DL 


OUT 


CMOS_PORT,AL 


RET 




PORT INC 2: 




ADD 


DL,2 


MOV 


AL.DL 


OUT 


CMOS PORT,AL 


RET 




'lNITIALI2E_STATUS PROC 


PUSH 


DX 


MOV 


DL,09H 


CALL 


PORT INC 


MOV 


AL,26H 


OUT 


CMOS PORT+1, AL 


CALL 


PORT INC 


MOV 


AL,82H 


OUT 


CMOS PORT+1, AL 


CALL 


PORT INC 


IN 


AL,CM0S_P0RT+1 


CALL 


PORT INC 


IN 


AL,CMOS PORT+1 


POP 


DX 


RET 




iNITlALIZE_STATUS ENDP 


UPD IN PR: 




PUSH 


CX 


MOV 


CX,600 


UPDATE: 




MOV 


AL,OAH 


OUT 


CMOS PORT,AL 


JMP 


$+2 


IN 


AL,CMOS PORT+1 


TEST 


AL.SOH 


JZ 


UPD IN PREND 


LOOP 


UPDATE 


XOR 


AX,AX 


STC 




UPD IN PREND: 




POP 


CX 


RET 





; GET HOURS PARAMETER 

; LOAD ALARM BYTE - HOURS 

; ENSURE INTERRUPT UNMASKED 



GET CURRENT VALUE 

ENSURE SET BIT TURNED OFF 

TURN ON ALARM ENABLE 



ENABLE ALARM 



INTERRUPTS MASKED DURING RESET 



GET STATUS BYTE 

TURN OFF ALARM ENABLE 

SAVE 



INCREMENT ADDRESS 



INCREMENT ADDRESS 



INITIALIZE 'A' REGISTER 

SET 'SET BIT' FOR CLOCK INITIALIZATION 
AND 24 HOUR MODE 
INITIALIZE 'B' REGISTER 



READ REGISTER 'C 



TO INITIALIZE 
TO INITIALIZE 



SET LOOP COUNT 

ADDRESS OF ' A~ REGISTER 

I/O TIME DELAY 

READ IN REGISTER 'A' 

IF 8XH— > UIP BIT IS ON (CANNOT READ TIM 



SET CARRY FOR ERROR 
RETURN 



RTC_TIMEBIOS_SUBR ENDP 
TIME_0F_0AY_1 ENDP 
PAGE 
--INT 50 (LEVEL 8) — 

THIS ROUTINE HANDLES THE PERIODIC AND ALARM INTERRUPTS FROM 
THE NON-VOLATILE TIMER. INPUT FREQUENCY IS 1.024 KHZ 
OR APPROXIMATELY 1024 INTERRUPTS EVERY SECOND FOR THE 
PERIODIC INTERRUPT. FOR THE ALARM FUNCTION, AN INTERRUPT WILL; 
OCCUR AT THE DESIGNATED TIME. 

THE INTERRUPT IS ENABLED ONLY WHEN EVENT OR AU\RM FUNCTIONS 

ARE ACTIVE. 

FOR THE EVENT INTERRUPT, THE HANDLER WILL DECREMENT THE 

WAIT COUNTER AND WHEN IT EXPIRES WILL TURN ON THE HIGH ORDER 

BIT OF THE DESIGNATED FLAG. 

FOR THE ALARM INTERRUPT, THE USER ROUTINE WILL BE INVOKED 

THROUGH INT 4AH. THE USER MUST CODE A ROUTINE AND PLACE THE 

CORRECT ADDRESS IN THE VECTOR TABLE. 



RTC INT PROC 


FAR 




STI 




INTERRUPTS BACK ON 


PUSH 


DS 


SAVE REGISTERS 


PUSH 


AX 




PUSH 


DX 




PUSH 


Dl 




MOV 


DL.OAH 


GET ENABLES 


CALL 


PORT INC 




IN 


AL,CMOS PORT+1 




MOV 


AH,AL 


SAVE 


CALL 


PORT INC 


GET SOURCE 


IN 


AL,CMOS PORT+1 




AND 


AL,AH 




PUSH 


AX 


SAVE 


TEST 


AL,040H 


CHECK FOR PERIODIC INTERRUPT 


JZ 


RTC INT 9 


NO - GO AROUND 


CALL 


DOS 


ESTABLISH ADDRESSABILITY 


SUB 


RTC LOW, 0976 


DECREMENT COUNT 


SBB 


RTC HIGH,0 




JA 


RTC INT 9 






BIOS 2 5-161 



01 F8 


B? 


OA 






01 FA 


FR 


018B R 




01 FD 


FU 


71 






oirr 


?U 


BF 






0201 


50 








0202 


B2 


OA 






020^ 


FR 


018B R 




0207 


5R 








0208 


F6 


/I 






020A 


G6 


06 


OOAO R 


00 


020F 


C5 


3F 


0098 R 




0213 


C6 


05 


80 




0216 










0216 


5» 








0217 


AH 


20 






0219 


7i| 


0? 






021B 


CD 


UA 






021D 










021D 


BO 


20 






021F 


F6 


AO 






0221 


F6 


20 






0223 


5F 








0224 


5A 








0225 


58 








0226 


IF 








0227 


CF 








0228 











I N 

AND 

PUSH 

MOV 

CALL 

POP 

OUT 

MOV 

LDS 

MOV 

I NT_9 : 
POP 
TEST 



DL,0AH ; TURN OFF PIE 

P0RT_INC 

AL,CM0S_PORT+l 

AL,0Bni 



SET FUNCTION ACTIVE FLAG OFF 
D I, DWORD PTR USER_FLAG ; SET UP DS,DI TO POINT TO USER FLAG 
BYTE PTR[DI],80H ; TURN ON USERS FLAG 



JZ 

INT 



AL,20H 

RTC_INT_10 

i4AH 



GET INTERRUPT SOURCE BACK 
TEST FOR ALARM INTERRUPT 
NO - GO AROUND 
TRANSFER TO USER ROUTINE 



AL, EOl 

OAOH.AL 

020H,AL 



END OF INTERRUPT TO 8259 - 2 



END OF INTERRUPT 



RTC_INT_10: 
MOV 
OUT 
OUT 
POP 
POP 
POP 
POP 
I RET 
RTC_INT ENDP 
PAGE 

-- INT 8 (LEVEL 0) 

THIS ROUTINE HANDLES THE TIMER INTERRUPT FROM 

CHANNEL OF THE 8253 TIMER. INPUT FREQUENCY IS 1.19318 MHZ 
AND THE DIVISOR IS 65536, RESULTING IN APPROX. 18.2 INTERRUPTS: 
EVERY SECOND. 

THE INTERRUPT HANDLER MAINTAINS A COUNT OF INTERRUPTS SINCE 
POWER ON TIME, WHICH MAY BE USED TO ESTABLISH TIME OF DAY. 
THE INTERRUPT HANDLER ALSO DECREMENTS THE MOTOR CONTROL COUNT : 
OF THE DISKETTE, AND WHEN IT EXPIRES, WILL TURN OFF THE 
DISKETTE MOTOR(s), AND RESET THE MOTOR RUNNING FLAGS. 
THE INTERRUPT HANDLER WILL ALSO INVOKE A USER ROUTINE THROUGH 
INTERRUPT 1CH AT EVERY TIME TICK. THE USER MUST CODE A 
ROUTINE AND PLACE THE CORRECT ADDRESS IN THE VECTOR TABLE. 



0228 










0228 


FB 








0229 


IF 








022A 


50 








022B 


52 








022C 


ER 


0000 E 






022F 


FF 


06 006C 


R 




0233 


75 


04 






0235 


FF 


06 006E 


R 




0239 










0239 


«3 


3E 006E 


R 


18 


023E 


75 


15 






0240 


81 


3E 006C 


R 


OOBO 


02U6 


75 


OD 






0248 


2B 


CO 






024A 


A3 


006E R 






024D 


A3 


006C R 






0250 


C6 


06 0070 


R 


01 


0255 










0255 


FF 


OE 0040 


K 




0259 


/■> 


OB 






025B 


80 


26 003F 


R 


FO 


0260 


BO 


OC 






0262 


BA 


03 F2 






0265 


EE 








0266 










0266 


CO 


10 






0268 


BO 


20 






026A 


F6 


20 






026C 


5A 








026D 


58 








026E 


IF 








026F 


CF 








0270 











TIMER_INT_ 



PUSH 
PUSH 
PUSH 
CALL 



CMP 
JNZ 
CMP 
JNZ 



T4 
TIMER_HIGH 

TIMER_HIGH,018H 
T5 

TIMER_L0W,0B0H 
T5 

TIMER HAS GONE 24 HOURS 



INTERRUPTS BACK ON 



SAVE MACHINE STATE 

ESTABLISH ADDRESSABILITY 

INCREMENT TIME 

TEST_DAY 

INCREMENT HIGH WORD OF TIME 

TEST_DAY 

TEST FOR COUNT EQUALLING 24 HOURS 

DISKETTE_CTL 



DISKETTE_CTL 



SUB 

MOV 
MOV 
MOV 

TEST FOR DISKETTE TIME OUT 



AX, AX 

TIMER_HIGH,AX 
TIMER_LOW,AX 
TIMER_OFL, 1 



DEC 


MOTOR COUNT 


JNZ 


T6 


AND 


MOTOR STATU 


MOV 


AL, OCH 


MOV 


DX,03F2H 


OUT 


DX,AL 


INT 


ICH 


MOV 


AL,EOI 


OUT 


020H,AL 


POP 


DX 


POP 


AX 



DISKETTE_CTL 
RETURN 



USER ROUTINE 
END OF INTERRUPT TO 8259 



THIS LOGIC WILL BE INVOKED BY INTERRUPT 05H TO PRINT 
THE SCREEN. THE CURSOR POSITION AT THE TIME THIS ROUTINE 

IS INVOKED WILL BE SAVED AND RESTORED UPON COMPLETION. THE 
ROUTINE IS INTENDED TO RUN WITH INTERRUPTS ENABLED. 

IF A SUBSEQUENT 'PRINT SCREEN KEY IS DEPRESSED DURING THE 
TIME THIS ROUTINE IS PRINTING IT WILL BE IGNORED. 
ADDRESS 50:0 CONTAINS THE STATUS OF THE PRINT SCREEN: 



50:0 



=0 



EITHER PRINT SCREEN HAS NOT BEEN CALLED 
OR UPON RETURN FROM A CALL THIS INDICATES 
A SUCCESSFUL OPERATION. 



=1 PRINT SCREEN IS IN PROGRESS 
=255 ERROR ENCOUNTERED DURING PRINTING 
ASSUME CS:CODE,DS:XXDATA 



0270 






0270 


FB 




0271 


IF 




0272 


50 




0273 


53 




0274 


51 




0275 


52 




0276 


BR 


R 


0279 


RF 


D8 


027B 


80 


3E 0000 R 01 


0280 


74 


5F 


0282 


06 


06 0000 R 01 


0287 


B4 


OF 


0289 


CD 


10 



PRINT_SCREEN_1 PROG 



PUSH 


DS 


PUSH 


AX 


PUSH 


BX 


PUSH 


CX 


PUSH 


DX 


MOV 


AX,XXDATA 


MOV 


DS,AX 


CMP 


STATUS BYTE, 1 


JZ 


EXIT 


MOV 


STATUS BYTE, 1 


MOV 


AH, 15 


INT 


10H 



WILL USE THIS LATER FOR CURSOR LIMITS 
WILL HOLD CURRENT CURSOR POSITION 
HEX 50 

SEE IF PRINT ALREADY IN PROGRESS 
JUMP IF PRINT ALREADY IN PROGRESS 
INDICATE PRINT NOW IN PROGRESS 
WILL REQUEST THE CURRENT SCREEN MODE 

[AL]=MODE 

[AH]=NUMBER COLUMNS/LINE 

(BH]=V1SUAL PAGE 



5-162 BIOS 2 



AT THIS POINT WE KNOW THE COLUMNS/LINE ARE IN 

[AX] AND THE PAGE IF APPLICABLE IS IN [ BH ] . THE STACK 

HAS DS,AX,BX,CX,DX PUSHED. [AL] HAS VIDEO MODE 



028B 


8A CC 


028D 


B5 19 


028F 


E8 02E7 R 


0292 


51 


0293 


BH 03 


0295 


CD 10 


0297 


59 


0298 


52 


0299 


33 D2 



WILL MAKE USE OF [CX] REGISTER TO 

CONTROL ROW & COLUMNS 

CARRIAGE RETURN LINE FEED ROUTINE 

SAVE SCREEN BOUNDS 

WILL NOW READ I HE CURSOR. 

AND PRESERVE THE POSITION 

RECALL SCREEN BOUNDS 

RECALL [BH]=VISUAL PAGE 

WILL SET CURSOR POSITION TO [0,0] 

THE LOOP FROM PRMO TO THE INSTRUCTION PRIOR TO PR120 

IS THE LOOP TO READ EACH CURSOR POSITION FROM THE SCREEN 

AND PRINT. 



029B 


B4 


02 




029D 


CD 


10 




029F 


BU 


08 




02A1 


CD 


10 




02A3 


OA 


CO 




02A5 


75 


02 




02A7 


BO 


20 




02A9 








02A9 


52 






02AA 


33 


D2 




02AC 


32 


EH 




02AE 


CD 


17 




02B0 


5A 






02B1 


F6 


CH 29 




02BU 


75 


21 




02B6 


FE 


C2 




02B8 


3A 


CA 




02BA 


75 


DF 




02BC 


32 


D2 




02BE 


8A 


E2 




02C0 


52 






02C1 


E8 


02E7 'R 




02CU 


5A 






02C5 


FE 


C6 




02C7 


3A 


EE 




02C9 


75 


DO 




02CB 


5A 






02CC 


Bi+ 


02 




02CE 


CD 


10 




02D0 


C6 


06 0000 R 00 


02D5 


EB 


OA 




02D7 


5A 






02D8 


BU 


02 




02DA 


CD 


10 




02DC 


C6 


06 0000 R FF 


02E1 


5A 






02E2 


59 






02E3 


5B 






02EU 


58 






02E5 


1 F 






02E6 


CF 






02 E7 








02E7 








02 E7 


33 


D2 




02E9 


32 


EU 




02EB 


BO 


OA 




02ED 


CD 


17 




02EF 


32 


E'l 




02F1 


BO 


OD 




02F3 


CD 


17 




02F5 


C3 






02 F6 








02F6 









MOV 


CL.AH 


MOV 


CH.25 


CALL 


CRLF 


PUSH 


CX 


MOV 


AH, 3 


INT 


lOH 


POP 


CX 


PUSH 


OX 


XOR 


DX,DX 



PRMO: 


MOV 


AH, 2 




INT 


10H 




MOV 


AH, 8 




INT 


10H 




OR 


AL,AL 




JNZ 


PRI15 




MOV 


AL, ' ' 


PRn5: 








PUSH 


DX 




XOR 


DX,DX 




XOR 


AH, AH 




INT 


17H 




POP 


DX 




TEST 


AH, 29H 




JNZ 


ERR10 




INC 


DL 




CMP 


CL.DL 




JNZ 


PR no 




XOR 


DL,DL 




MOV 


AH,DL 




PUSH 


DX 




CALL 


CRLF 




POP 


DX 




INC 


DH 




CMP 


CH,DH 




JNZ 


PR 110 


PR 120: 


POP 


DX 




MOV 


AH, 2 




INT 


10H 




MOV 


STATUS BYTE,0 




JMP 


SHORT EXIT 


ERR10: 


POP 


DX 




MOV 


AH, 2 




INT 


10H 


ERR20: 


MOV 


STATU S_BYTE, OF FH 


EXIT: 


POP 


DX 




POP 


CX 




POP 


BX 




POP 


AX 




POP 


DS 




IRET 




PRINT_ 


SCREEN_1 


ENDP 




- CARRIAGE RETURN, LINE FE 


CRLF 


PROC 


NEAR 




XOR 


DX,DX 




XOR 


AH, AH 




MOV 


AL, 12Q 




INT 


17H 




XOR 


AH, AH 




MOV 


AL,15Q 




INT 


17H 




RET 




CRLF 


ENDP 




CODE 


ENDS 
END 





TO INDICATE CURSOR SET REQUEST 
NEW CURSOR POSITION ESTABLISHED 
TO INDICATE READ CHARACTER 
CHARACTER NOW IN [AL] 
SEE 1 F VALID CHAR 
JUMP I F VALID CHAR 
MAKE A BLANK 

SAVE CURSOR POSITION 
INDICATE PRINTER 1 
TO INDICATE PRINT CHAR IN [AL] 
PRINT THE CHARACTER 
RECALL CURSOR POSITION 
TEST FOR PRINTER ERROR 
JUMP IF ERROR DETECTED 
ADVANCE TO NEXT COLUMN 
SEE I F AT END OF LINE 
IF NOT PROCEED 
BACK TO COLUMN 
[AH]=0 

SAVE NEW CURSOR POSITION 
LINE FEED CARRIAGE RETURN 
RECALL CURSOR POSITION 
ADVANCE TO NEXT LINE 
FINISHED? 
IF NOT CONTINUE 
RECALL CURSOR POSITION 
TO INDICATE CURSOR SET REQUEST 
CURSOR POSITION RESTORED 
INDICATE FINISHED 
EXIT THE ROUTINE 
GET CURSOR POSITION 
TO REQUEST CURSOR SET 
CURSOR POSITION RESTORED 
; INDICATE ERROR 

RESTORE ALL THE REGISTERS USED 



INITIAL LF,CR TO PRINTER 



SEND THE CARRIAGE RETURN 




BIOS 2 5-163 



5-164 BIOS 2 



TITLE 12/08/83 ORGS 



ASSUME 


CS:CODE, DS:DATA 


EXTRN 


K16:NEAR 


EXIKN 


INT 287:NEAR 


EXTRN 


DSKETTE SETUP:NEAR 


EXTRN 


DISK SETUP:NEAR 


EXTRN 


SEEK: NEAR 


EXTRN 


RTC INT:NEAR 


EXTRN 


START 1 :NEAR 


EXTRN 


NMI INT 1 :NEAR 


EXTRN 


BOOT STRAP 1:NEAR 


EXTRN 


KEYBOARD 10 1 :NEAR 


EXTRN 


KB INT 1:NEAR 


EXTRN 


DISKETTE 10 1 : NEAR 


EXTRN 


DISK INT 1:NEAR 


EXTRN 


PRINTER 10 1:NEAR 


EXTRN 


VIDEO 10 1 :NEAR 


EXTRN 


MEMORY SIZE DETERMINE 


EXTRN 


EQUIPMENT 1:NEAR 


EXTRN 


CASSETTE 10 1 : NEAR 


EXTRN 


TIME OF DAY 1 : NEAR 


EXTRN 


TIMER INT 1:NEAR 


EXTRN 


on :NEAR 


EXTRN 


RS232 10 1:NEAR 


EXTRN 


DUMMY RETURN 1 :NEAR 


EXTRN 


PRINT SCREEN 1:NEAR 


EXTRN 


Cn :NEAR 


EXTRN 


C30:NEAR 


EXTRN 


TST4 B:NEAR 


EXTRN 


TST4 C:NEAR 


EXTRN 


TSTU D:NEAR 


EXTRN 


E30B:NEAR 


EXTRN 


E30C:NEAR 


EXTRN 


RE_DIRECT:NEAR 


PUBLIC 


BOOT INVA 


PUBLIC 


TUTOR 


PUBLIC 


START 


PUBLIC 


CI 


PUBLIC 


C2 


PUBLIC 


C80U2A 


PUBLIC 


OBF U2B 


PUBLIC 


OBF f42A 


PUBLIC 


C80U2B 


PUBLIC 


C80i+2C 


PUBLIC 


EO 


PUBLIC 


EG A 


PUBLIC 


EO B 


PUBLIC 


VIR ERR 


PUBLIC 


El 


PUBLIC 


F3A 


PUBLIC 


D1 


PUBLIC 


D2 


PUBLIC 


D2A 


PUBLIC 


F3D 


PUBLIC 


F3D1 


PUBLIC 


Fl 


PUBLIC 


F1 A 


PUBLIC 


Fl B 


PUBLIC 


F3 


PUBLIC 


LOCK 


PUBLIC 


CM1 


PUBLIC 


CM2 


PUBLIC 


CM 3 


PUBLIC 


cm 


PUBLIC 


CM^ A 


PUBLIC 


CMU B 


PUBLIC 


CMU C 


PUBLIC 


CMU D 


PUBLIC 


F3B 


PUBLIC 


F4 


PUBLIC 


FUE 


PUBLIC 


El A 


PUBLIC 


El B 


PUBLIC 


El C 


PUBLIC 


ADERR 


PUBLIC 


ADERRl 


PUBLIC 


VECTOR lABLE 


PUBLIC 


SLAVE VECTOR TABLE 


PUBLIC 


DISK BASE 


PUBLIC 


VIDEO PARMS 


PUBLIC 


MU 


PUBLIC 


M5 


PUBLIC 


M6 


PUBLIC 


M7 


PUBLIC 


CRT CHAR GEN 


PUBLIC 


PRINT SCREEN 


PUBLIC 


A1 


PUBLIC 


K6 


PUBLIC 


K6L 


PUBLIC 


K7 


PUBLIC 


K8 


PUBLIC 


K9 


PUBLIC 


KIO 


PUBLIC 


KIT 


PUBLIC 


K12 


PUBLIC 


K13 


PUBLIC 


K1U 


PUBLIC 


K15 


PUBLIC 


RS232 10 


PUBLIC 


DUMMY RETURN 


PUBLIC 


NMI INT 


PUBLIC 


BOOT STRAP 


PUBLIC 


KEYBOARD 10 


PUBLIC 


KB INT 


PUBLIC 


DISKETTE 10 


PUBLIC 


DISK INT 


PUBLIC 


PRINfER 10 


PUBLIC 


VIDEO 10 


PUBLIC 


MEMORY SIZE DETERMINE 


PUBLIC 


EQUI PMENT 


PUBLIC 


CASSETTE 10 


PUBLIC 


TIME OF DAY 


PUBLIC 


TIMER INT 


PUBLIC 


HRD 


PUBLIC 


FLOPPY 


PUBLIC 


SEEKS 1 


PUBLIC 


F1780 


PUBLIC 


F1781 


PUBLIC 


F1782 



ORGS 5-165 



PUBLIC F1790 
PUBLIC n791 
PUBLIC FD_TBL 

• THIS MODULE HAS BEEN ADDED TO FACILITATE THE EXPANSION OF THIS PROGRAM. 
; IT ALLOWS FOR THE FIXED ORG STATEMENT ENTRY POINTS THAT HAVE TO REMAIN 
; AT THE SAME ADDRESSES. ADDED ON 9/16/82 



0000 36 31 38 31 30 32 

38 20 UZ kf 50 52 

2E 20 '49 '42 liD 20 

31 39 38 34 



005B 
005B 
005B 
005B E9 0000 E 



005E 


0000 


F 


0060 


0000 


F 


0062 


0000 


F 


006*4 


0000 


F 


0066 


0000 


E 


0068 


0000 


E 


006A 


0000 


E 



0060 


20 31 30 31 2D 53 




79 73 7*4 65 60 20 




*42 6F 61 72 6*4 20 




*45 72 72 6F 72 OD 




OA 


0085 


20 31 30 32 2D 53 




79 73 7*4 65 6D 20 




(42 6F 61 72 6*4 20 




*45 72 72 6F 72 OD 




OA 


009E 


20 31 30 33 2D 53 




79 73 7*4 65 6D 20 




*42 6F 61 72 6*4 20 




145 72 72 6F 72 OD 




OA 


0087 


20 31 30 3*4 2D 53 




79 73 7*4 65 6D 20 




'42 6F 61 72 6*4 20 




h5 72 72 6F 72 OD 




OA 


OODO 


20 31 30 35 2D 53 




79 73 7*4 65 6D 20 




(42 6F 61 72 6*4 20 




445 72 72 6F 72 OD 




OA 


00 E9 


20 32 30 31 20 'ID 




65 60 6F 72 79 20 




'15 72 72 6F 72 OD 




OA 


OOFC 


20 3*4 30 31 2D '43 




52 5*4 20 *45 72 72 




6F 72 OD OA 


01 OC 


20 35 30 31 20 '43 




52 5*4 20 '45 72 72 




6F 72 OD OA 


one 


20 3? 30 3? ?D ^0 




65 6D 6F 72 79 20 




*4l 6*4 6*4 72 65 73 




73 20 *45 72 72 6F 




72 OD OA 


0137 


20 32 30 33 20 W 




65 6D 6F 72 79 20 




*41 6*4 6*4 72 65 73 




73 20 '45 72 72 6F 




72 OD OA 


0152 


52 '4F t4D 20 '45 72 




72 6F 72 OD OA 


015D 


20 *4B i42 20 i4F *4B 




OD 


016*4 


50 '41 52 '49 5*4 59 




20 '43 '48 '45 '43 *4B 




20 32 OD OA 


017*4 


50 '41 52 *49 5*4 59 




20 143 '48 '45 *43 '4B 




20 31 00 OA 


018*4 


3F 3F 3F 3F 3F 00 




OA 


018B 


20 28 52 '45 53 55 




'4D 145 20 3D 20 22 




146 31 22 20 HB 45 




59 29 OD OA 


01A1 


20 20 20 20 2D 55 




6E 6C 6F 63 68 20 




53 79 73 7*4 65 6D 




20 55 6E 69 7*4 20 




'4B 65 79 6C 6F 63 




6B OD OA 


0102 


20 33 30 31 2D '48 




65 79 62 6F 61 72 




6*4 20 *45 72 72 6F 




72 00 OA 


01D7 


20 33 30 32 20 53 




79 73 7*4 65 6D 20 




55 6E 69 7*4 20 '48 




65 79 6C 6F 63 6B 




20 69 73 20 '4C 6F 




63 6B 65 6'4 OD OA 


01 FB 


20 33 30 33 2D '4B 




65 79 62 6F 61 72 




6'4 20 '4F 72 20 53 




79 73 7'4 65 6D 20 




55 6E 69 7'4 20 i45 




72 72 6F 72 OD OA 



COPYRIGHT NOTICE 

ORG OEOOOH 

DB '6181028 COPR. IBM 198*4* 



; ORG 0E05BH 

ORG 0005BH 

RESET LABEL FAR 

START: 

JMP START_1 



TEMPORARY STACK FOR POST 



DW Gil 

C2 DW C30 

C80*42A DW TST*4_B 

0BF_*42A DW TST*4_C 

C80*42B DW TSTi4_D 

080*420 DW E30B 

0BF_t42B DW E30C 



POST ERROR MESSAGES 
) DB ' 101-System Board Error', 13, 10 ; INTERRUPT FAILUE 



EO_A DB ' 102-Systeiii Board Error', 13,10 ; TIMER FAILURE 



EO_B DB ' 103-System Board Error', 13, 10 ; TIMER INTERRUPT FAILURE 



VIR_ERR DB ' 10'4-System Board Error', 13, 10 ; PROTECTED MODE FAILURE 



105-System Board Error', 13, 10 ; LAST 80'42 COMMAND NOT ACCEPTED 

201-Memory Error', 13, 10 

'401-CRT Error', 13, 10 
501-CRT Error', 13,10 
202-Memory Address Er 



E1_C DB 
ADERRl DB 



',13,10 ; LINE ERROR 00->15 



ADERR DB ' 203-Memory Address Error', 13. 10 ; LINE ERROR l6->23 



F3A 
F3B 



D2A 
F3D 



DB 'ROM Error' ,13, 10 

DB ' KB OK' , 13 

DB 'PARITY CHECK 2', 13,10 

DB 'PARITY CHECK 1 ',13,10 

DB '?????', 13,10 

DB ' (KtSUMt = "F1" KEY) ',13, 10 



-Unlock System Unit Key lock' , 13, 10 



; ROM CHECKSUM 

; KB FOR MEMORY SIZE 



Fl DB ' 301-Keyboard Error', 13, 10 



; KEYBOARD ERROR 



LOCK DB ' 302-System Unit Keylock is Locked' , 13, 10 ; KEYBOARD LOCK ON 



303-Keyboard Or System Unit Error', 13, 10 



5-166 ORGS 



20 36 


30 


31 


20 


44 


69 73 


6B 


65 


/4 


/4 


65 20 


45 


72 


12 


6F 


72 00 


OA 








20 31 


36 


31 


20 


53 


79 73 


74 


65 


60 


20 


tF 70 


74 


69 


6F 


6F 


73 20 


4F 


6F 


74 


20 


53 65 


7U 


20 


2fi 


5? 


75 6E 


20 


53 


45 


54 


55 50 


29 


00 


OA 




20 31 


36 


32 


20 


53 


79 73 


7U 


65 


60 


20 


'IF 70 


74 


69 


6h 


6F 


73 20 


4F 


6F 


74 


20 


53 65 


74 


20 


28 


52 


75 6E 


20 


53 


45 


54 


55 50 


29 


00 


OA 





• 601-Diskette Error", 13, 10 



; DISKETTE ERROR 



02AC 

02AC 03BC 
02AE 0378 
02B0 0278 
02B2 



02C3 E9 0000 E 



161-System Options Not Set-(Run SETUP) ', 13, 10 ; DEAD BATTERY 



162-System Options Not Set-(Run SETUP ) ' , 1 3, 10 



0286 20 31 36 33 2D 54 

69 6D 65 20 26 20 

44 61 74 65 20 4E 

6F 74 20 53 65 74 

2D 28 52 75 6E 20 

53 45 54 55 50 29 

00 OA 



; CLOCK NOT UPDATING 



PRINTER TABLE 



F4 LABEL WORD 

DW 3BCH 

DW 378H 

DW 278H 

F4F LABEL WORD 



NMI ENTRY 



02C6 20 31 30 36 2D 53 
79 73 74 65 60 20 
42 6F 61 72 64 20 
45 72 72 6F 72 CD 
OA 

02DF 20 31 30 37 20 53 
79 73 74 65 60 20 
42 6F 61 72 64 20 
45 72 72 6F 72 CD 
OA 

02F8 20 31 30 38 20 53 
79 73 74 65 60 20 
42 6F 61 72 64 20 
45 72 72 6F 72 CD 
OA 

0311 20 31 30 39 20 53 
79 73 74 65 6D 20 
42 6r 61 72 64 20 
45 72 72 6F 72 OD 

OA 

032A 20 31 36 34 20 4D 

65 6D 6F 72 79 20 

53 69 7A 65 20 45 
72 72 6F 72 2D 28 
52 75 6E 20 53 45 

54 55 50 29 OD OA 



20 33 30 34 20 4B 

65 79 62 6F 61 72 

64 20 4F 72 20 53 

79 73 74 65 60 20 

55 6E 69 74 20 45 

72 72 6F 72 OD OA 



20 36 30 32 2U 44 

69 73 6B 65 74 74 

65 20 42 6F 6F 74 

20 52 65 63 6F 72 

64 20 45 72 72 6F 
72 OD OA 



; ORG 0E2C3H 

ORG 002C3H 

NMI_INI EQU $ 

JMP NMI_INT_1 

CM4_A OB ' 106-System Board Error', 13, 10 ; CONVERTING LOGIC TEST 



DB ■ 107-System Board Error', 13, 10 ; HOT NMI TEST 



ard Error', 13, 10 ; TIMER BUS TEST 



109-System Board Error', 13, 10 ; LOW MEG CHIP SELECT TEST 



; CMOS DOES NOT MATCH SYSTEM 
KEYBOARD/SYSTEM ERROR 

DB ' 304-Keyboard Or System Unit Error', 13,10 



; KEYBOARD CLOCK LINE HIGH 

. DISKETTE BOOT RECORD IS NOT VALID 

BOOT_INVA DB ' 602-Diskettc Boot Record Error', 13, 10 



37 38 


30 


2D 


44 


h780 


DB 


73 6B 


20 


30 


20 






61 69 


6C 


75 


72 






OD OA 












37 38 


31 


2D 


44 


F1781 


DB 


73 6B 


20 


31 


20 






61 69 


6C 


75 


72 






OD OA 












3/ 38 


32 


2D 


44 


F1782 


DB 


73 6B 


20 


43 


6F 






74 72 


6F 


6C 


6C 






72 20 


46 


61 


69 






75 72 


65 


OD 


OA 






37 39 


30 


2D 


44 


F1790 


DB 


73 6B 


20 


30 


20 






72 72 


6F 


72 


OD 






37 39 


31 


2D 


44 


F1791 


DB 


73 6B 


20 


31 


20 






72 72 


6F 


72 


OD 







'1781-Disk 1 Fa i lure',ODH,GAH 



'1702-Disk Controller Fa i I ure ' , OOH, OAH 



'1790-Disk Error' .ODH. OAH 



'1791-Disk 1 Error', ODH, OAH 



INITIALIZE DRIVE CHARACTERISTICS 
FIXED DISK PARAMETER TABLE 
- THE TABLE IS COMPOSED OF A BLOCK DEFINED AS: 

+0 (1 WORD) - MAXIMUM NUMBER OF CYLINDERS 

+2 (1 BYTE) - MAXIMUM NUMBER OF HEADS 

+3 (1 WORD) - NOT USED/SEE PC-XT 

+5 (1 WORD) - STARTING WRITE PRECOMPENSAT ION CYL 

+7 (1 BYTE) - NOT USED/SEE PC-XT 

+8 (1 BYTE) - CONTROL BYTE 

BIT 7 DISABLE RETRIES -OR- 
BIT 6 DISABLE RETRIES 



ORGS 5-167 



BIT 3 MORE THAN 8 HEADS 
(3 BYTES)- NOT USED/SEE PC-XT 
(1 WORD) - LANDING ZONE 
(1 BYTE) - NUMBER OF SECTORS/TRACK 
(1 BYTE) - RESERVED FOR FUTURE USE 

- TO DYNAMICALLY DEFINE A SET OF PARAMETERS 
BUILD A TABLE FOR UP TO 15 TYPES AND PLACE 
THE CORRESPONDING VECTOR INTO INTERRUPT 41 
FOR DRIVE AND INTERRUPT 46 FOR DRIVE 1. 



OU01 


0132 


0403 


04 


0404 


0000 


0406 


0080 


0408 


00 


0409 


00 


040A 


00 00 GO 


040D 


0131 


040 F 


n 


0410 


00 


0411 


0267 


0413 


04 


0414 


0000 


0416 


012C 


0418 


00 


0419 


00 


041A 


00 00 00 


041D 


0267 


041 F 


11 


0420 


00 


0421 


0267 


0423 


06 


0424 


0000 


0426 


012C 


0428 


00 


0429 


00 


042A 


00 00 00 


042D 


0267 


042F 




0430 


00 


0431 


03 AC 


0433 


08 


0434 


0000 


0436 


0200 


0438 


00 


0439 


00 


043A 


00 00 00 


043D 


03AC 


043F 


n 


0440 


00 


0441 


03AC 


0443 


06 


0444 


0000 


0446 


0200 


0*448 


00 


0449 


00 


044A 


00 00 00 


044D 


03AC 


044F 


11 


0450 


00 


0451 


0267 


0453 


04 


0454 


0000 


0456 


FFFF 


0458 


00 


0459 


00 


045A 


00 00 00 


045D 


0267 


045F 


11 


0460 


00 


0461 


OICE 


0463 


08 


0464 


0000 


0466 


0100 


0468 


00 


0469 


00 


046A 


00 00 00 


046D 


01FF 


046F 


n 


0470 


00 


0471 


02DD 


0473 


05 


0474 


0000 


0476 


FFFF 


0478 


00 


0479 


00 


047A 


00 00 00 


047D 


02DD 


047 F 


11 


0480 


00 


0481 


0384 


0483 


OF 


0484 


0000 


0486 


FFFF 


0488 


00 



FD. 


-TBL 






;- 


___ 


DRIVE 


TYPE 01 






DW 

OB 


0306D 
040 



0.0,0 
0305D 
17D 



DRIVE TYPE 02 



0,0,0 
0615D 
17D 



DRIVE TYPE 03 



0,0,0 
0615D 
17D 



DRIVE TYPE 04 



DB 0,0,0 

DW 0940D 

DB 170 

DB 

DRIVE TYPE 05 



0,0,0 
0940D 
17D 



DRIVE TYPE 06 



0,0,0 
0615D 
17D 



DRIVE TYPE 07 



0,0,0 
0511D 
17D 



DRIVE TYPE 08 



0,0,0 
0733D 
17D 



DRIVE TYPE 09 



WRITE PRE-COMPENSATION CYL 
CONTROL BYTE 



WRITE PRE-COMPENSATION CYL 
CONTROL BYTE 



WRITE PRE-COMPENSATION CYL 
CONTROL BYTE 



WRITE PRE-COMPENSATION CYL 
CONTROL BYTE 



WRITE PRE-COMPENSATION CYL 
CONTROL BYTE 



WRITE PRE-COMPENSATION CYL 
CONTROL BYTE 



WRITE PRE-COMPENSATION CYL 
CONTROL BYTE 



NO WRITE PRE-COMPENSATION 
CONTROL BYTE 



NO WRITE PRE-COMPENSATION 



5-168 ORGS 



0489 


08 


0t»8A 


00 00 00 


0U8D 


0385 


0U8F 


11 


0U90 


00 


0491 


0334 


0493 


03 


0494 


0000 


0496 


FFFF 


0498 


00 


0499 


00 


049A 


00 00 00 


0490 


0334 


049 F 


n 


04A0 


00 


04A1 


0357 


04A3 


05 


04A4 


0000 


04A6 


FFFF 


04A8 


00 


04A9 


00 


04AA 


00 00 00 


04AD 


0357 


04AF 


n 


04B0 


00 


04B1 


0357 


04B3 


07 


04B4 


0000 


04B6 


FFFF 


04B8 


00 


04B9 


00 


04BA 


00 00 00 


04BD 


0357 


04BF 


11 


04C0 


00 


04C1 


0132 


04C3 


08 


04C4 


0000 


04C6 


0080 


04C8 


00 


04C9 


00 


04CA 


00 00 00 


04CD 


013F 


04CF 


n 


04D0 


00 


0401 


02DD 


04D3 


07 


04D4 


0000 


04D6 


FFFF 


0408 


00 


04D9 


00 


04DA 


00 00 00 


04DD 


02DD 


04DF 


n 


04E0 


00 


04E1 


0000 


04E3 


00 


04E4 


0000 


04E6 


0000 


04 E8 


00 


04E9 


00 


04EA 


00 00 00 


04ED 


0000 


04EF 


00 


04F0 


00 



008H 
0,0,0 
0901D 
170 



DRIVE TYPE 10 



0,0,0 
0820D 
17D 



DRIVE TYPE 11 



0,0,0 
0855D 
170 



DRIVE TYPE 12 



0,0,0 
0855D 
17D 



DRIVE TYPE 13 



0,0,0 
0319D 
17D 



DRIVE TYPE 14 



CONTROL BYTE 



NO WRITE PRE-COMPENSATION 
CONTROL BYTE 



NO WRITE PRE-COMPENSATION 
CONTROL BYTE 



NO WRITE PRE-COMPENSATION 
CONTROL BYTE 



WRITE PRE-COMPENSATION CYL 
CONTROL BYTE 



WRITE PRE-COMPENSATION CYL 
CONTROL BYTE 



0,0,0 
0733D 
17D 





; LANDING ZONE 
; SECTORS/TRACK 


>E 15 


RESERVED 


**** DO NOT USE *^ 


00000 
000 




; CYLINDERS 
; HEADS 



0,0,0 
OOOOD 
OOD 



WRITE PRE-COMPENSATION CYL 
CONTROL BYTE 



06 F2 

= 06 F2 

06 F2 E9 0000 E 



0729 




0729 




0729 


0417 


072B 


0300 


072D 


0180 


072F 


OOCO 


0731 


0060 


0733 


0030 


0735 


0018 


0737 


OOOC 



0739 

= 0739 

0739 E9 0000 E 



* 


ORG 


DE6F2H 




ORG 


306F2H 


B00T_STRAP 


EQU 






JMP 

...RAim DAT 


300T_STRAP_1 




---BAUD KAIL iMii 
ORG 0E729H 




ORG 


)0729H 


A1 


LABEL WORD 


DW 


1047 


110 BAUD 


DW 


768 


150 


DW 


384 


300 


DW 


192 


600 


DW 


96 


1200 


DW 


48 


2400 


DW 


24 


4800 


DW 


12 


9600 




ORG 


)E739H 




ORG 


)0739H 


RS232_I0 


EQU 






JMP 

UrVRHAB 


^S232_I0_1 



TABLE OF I NIT VALUE 



082E 

= 082E 

082E E9 0000 E 



KEYBOARD_ I 



ORG 
ORG 
EQU 
JMP 



KEYBOARD_IO 1 



TABLE OF SHIFT KEYS AND MASK VALUES (EARLY PC) 



ORGS 5-169 



087E 

087E 52 

087F 3A 45 U6 38 ID 

088U 2A 36 

= 0008 



088E 


IB 
IE 


FF 
FF 


00 


FF 


FF 


FF 


0896 


FF 
FF 


FF 
1 1 


FF 


IF 


FF 


7F 


089E 


17 
09 


05 
OF 


12 


14 


19 


15 


08A6 


10 
13 
Ok 


IB 


ID 


OA 


FF 


01 


08AD 


06 


07 


08 


OA 


OB 




OC 


FF 


FF 








08B6 


FF 
16 


FF 
02 


IC 


lA 


18 


03 


08BE 


OE 
FF 


OD 
FF 


FF 


FF 


FF 


FF 


08C6 


20 


FF 










08C8 














08C8 


5E 
64 


5F 
65 


60 


61 


62 


63 


O8D0 


66 
84 


67 
FF 


FF 


FF 


77 


FF 


08D8 


73 
76 


FF 
FF 


74 


FF 


75 


FF 


O8E0 


FF 












08E1 














08E1 


IB 


31 


32 


33 


34 


35 




36 


37 


38 


39 


30 


20 




3D 


08 


09 








O8F0 


71 


77 


65 


72 


74 


79 




75 


69 


6F 


70 


5B 


50 




OD 


FF 


61 


73 


64 


66 




67 


68 


6A 


6B 


6C 


3B 




27 












0909 


60 


FF 


5C 


7A 


78 


63 




76 


62 


6E 


6D 


2C 


2E 




2F 


FF 


2A 


FF 


20 




091A 


FF 












091B 














091B 


IB 


21 


40 


23 


24 


25 




5E 


26 


2A 


28 


29 


5F 




2B 


08 


00 








092A 


51 


57 


45 


52 


54 


59 




55 


49 


4F 


50 


7B 


7D 




OD 


FF 


41 


53 


44 


46 




47 


48 


4A 


4B 


4C 


3A 




22 












U9U3 


7E 


FF 


7C 


5A 


58 


43 




56 


42 


4E 


40 


3C 


3E 




3F 


FF 


00 


FF 


20 


FF 


0955 














0955 


54 
5A 


55 


56 


57 


58 


59 


095C 


5B 


5C 


5D 








095F 














095F 


68 


69 


6A 


6B 


6C 




0964 


60 


6E 


6F 


70 


71 




0969 














0969 


37 


38 


39 


i?U 


34 


35 




36 


2B 


31 


32 


33 


30 




2E 












0976 














0976 


47 


48 


49 


FF 


4B 


FF 



0970 FF 4F 50 51 52 53 



0987 

= 0987 

0987 E9 0000 E 



0C59 

= 0C59 

0C59 E9 0000 E 



0F57 

= 0F57 

0F57 E9 0000 E 



LABEL BYTE 

DB INS_KEY ; INSERT KEY 

DB CAPS_KEY, NUM_KEY, SCROLL_KEY. ALT_KEY, CTL_KEY 

DB LEFT_KEY,RIGHT_KEY 

EQU $-K6 

SHI FT_MASK_TABLE 

LABEL BYTE 

DB INS_SHIFT ; INSERT MODE SHIFT 

DB CAPS_SH I FT , NUM_SH I FT , SCROLL_SH I FT , ALT_SH I FT , CTL_SH I FT 

DB LEFT_SHI FT,RIGHT_SHIFT 

SCAN CODE TABLES 



27,- 



1,0,-1,-1,-1,30,-1 
-1,-1,-1,31,-1,127,-1,17 
23,5,18,20,25,21,9, 15 
16,27,29, 10,-1, 1, 19 
4,6,7,8,10,11,12,-1,-1 
-1,-1,28,26,24,3,22,2 
14,13,-1,-1,-1,-1,-1,-1 

94,95,96,97,98,99,100,101 
102, 103,-1,-1,119,-1, 132,-1 
115,-1, 116,-1,117,-1,118,-1 

01BH, ' 1234567890-=' ,08H,09H 
'qwertyuiop[ ]' ,0DH,-1, 'asdfghjkl ; ',027H 

60H, -1,5CH, 'zxcvbnm, . /' ,-^ ,' ■^' , -^ ,' ' 



27,' !©#$', 37, 05EH, '&*( )_+',08H,0 
'QWERTYUIOPl I ' ,0DH,-1, 'ASDFGHJKL:'" 



' IZXCVBNMO?' 



84,85,86,87,88,89,90 
91,92,93 



'789-456+1230. ' 

IB 71,72,73,-1,75,-1,77 
IB -1,79,80,81,82,83 

INTERRUPT 



ORG 
ORG 
EQU 
JMP 

DISKETTE I/O 



DISKETTE_IO 



ORG 
ORG 
EQU 
JMP 



DISKETTE_ 

DISKETTE INTERRUPT 

ORG 0EF57H 

ORG 00F57H 

EQU $ 
JMP 



DISK_rNT_l 



DISKETTE PARMS 



D1SK_BASE 
THIS IS THE SET OF PARAMETERS REQUIRED FOR 
DISKETTE OPERATION. THEY ARE POINTED AT BY THE 
DATA VARIABLE D I SK_POI NTER. TO MODIFY THE PARAMETERS, 
BUILD ANOTHER PARAMETER BLOCK AND POINT AT IT 



DISK_BASE 



LABEL BYTE 
11011111B 



5-170 ORGS 



0FC9 25 

OFCA 02 

OFCB OF 

OFCC IB 

OFCD FF 

OFCE 5'* 

OFCF F6 

OFDO OF 

0FD1 08 



0FD2 

= 0FD2 

0FD2 E9 0000 E 



DO 




MOTOR 


.WA 1 T 


OB 




2 




DB 




15 




DB 




01BH 




DB 




OFFH 




DB 




05W 




DB 




0F6H 




DB 




15 




DB 




8 




. PR 


NTER 10 








ORG 


0EF02H 






ORG 


00FD2H 


PR1NTER_I0 




EQU 


$ 






JMP 


PRINTER_ 


. V 


DEO 


10 


pn<;c:i ri f r.nt. 



WAIT AFTER OPN TIL MOTOR OFF 

512 BYTES/SECTOR 

EOT ( LAST SECTOR ON TRACK) 

GAP LENGTH 

DTL 

GAP LENGTH FOR FORMAT 

FILL BYTE FOR FORMAT 

HEAD SETTLE TIME (MILLISECONDS) 

MOTOR START TIME (1/8 SECONDS) 



ENTRY POINTS 



1045 






1045 


0000 




1047 


0000 




1049 


0000 




104B 


0000 




104D 


0000 




104F 


0000 




1051 


0000 




1053 


0000 




1055 


0000 




1057 


0000 




1059 


0000 




105B 


0000 


E 


105D 


0000 


E 


105F 


0000 


E 


1061 


0000 


E 


1063 


0000 


E 


= 0020 




1065 






= 1065 




1065 


E9 0000 E 



;ORG 0F045H 
ORG 01045H 
ASSUME CS: CODE, DS: DATA, ES:' 

EXTRN SET_MODE:NEAR 

EXTRN SET_CTYPE:NEAR 

EXTRN SET_CPOS:NEAR 

EXTRN READ_CURSOR:NEAR 

EXTRN READ_LPEN:NEAR 

EXTRN ACT_DISP_PAGE:NEAR 

EXTRN SCROLL_UP:NEAR 

EXTRN SCROLL_DOWN:NEAR 

EXTRN READ_AC_CURRENT:NEAR 

EXTRN WRITE_AC_CURRENT:NEAR 

EXTRN WRITE_C_CURRENT:NEAR 

EXTRN SET_COLOR:NEAR 

EXTRN WRITE_DOT:NEAR 

EXTRN READ_DOT:NEAR 

EXTRN WRITE_TTY: NEAR 

EXTRN VIDEO_STATE:NEAR 



Ml 


LABEL 


WORD 


; TABLE OF ROUTINES WITHIN V 




DW 


OFFSET 


SET MODE 






DW 


OFFSET 


SET CTYPE 






DW 


OFFSET 


SET CPOS 






DW 


OFFSET 


READ CURSOR 






DW 


OFFSET 


READ LPEN 






DW 


OFFSET 


ACT DISP PAGE 






DW 


OFFSET 


SCROLL UP 






DW 


OFFSET 


SCROLL DOWN 






DW 


OFFSET 


READ AC CURRENT 






DW 


OFFSET 


WRITE AC CURRENT 






DW 


OFFSET 


WRITE C CURRENT 






DW 


OFFSET 


SET COLOR 






DW 


OFFSET 


WRITE DOT 






DW 


OFFSET 


READ DOT 






DW 


OFFSET 


WRITE TTY 






DW 


OFFSET 


VIDEO_STATE 




MIL 


EQU 


$-Ml 
ORG 
ORG 


0F065H 
01065H 




VIDEO_ 


10 


EQU 


$ 








JMP 
DEO PARMS 


VIDE0_I0_1 














ORG 


0F0A4H 








ORG 


010A4H 




VIDEO_ 


PARMS 
INIT T 


LABEL 
ABLE 


BYTE 





10A4 


38 
19 


28 


20 


OA 


IF 


06 


lOAB 


1C 


02 


07 


06 


07 




lOBO 


00 


00 


00 


00 






- 0010 












10B4 


71 
19 


50 


5A 


OA 


IF 


06 


10BB 


1C 


02 


07 


06 


07 




10CO 


00 


00 


00 


00 






10C4 


38 
64 


28 


2D 


OA 


7F 


06 


10CB 


70 


02 


01 


06 


07 




lODO 


00 


00 


00 


00 






10D4 


61 
19 


50 


52 


OF 


19 


06 


lODB 


19 


02 


OD 


OB 


OC 




lOEO 


00 


00 


00 


00 






10E4 














10E4 


0800 










10E6 


1000 










10E8 


4000 










lOFA 


4000 










10EC 














lOEC 


28 
50 


28 
50 


50 


50 


28 


28 


10F4 














10F4 


2C 

IE 


28 
29 


2D 


29 


2A 


2E 



38H,28H,2DH,0AH,1 FH,6,19H 



DB 
DB 
EQU 


ICH.2,7,6,7 

0,0,0,0 

$-VIDE0_PARMS 




DB 


71 H, 50H, 5AH, OAH, 1 FH, 6, 1 9H 


DB 
OB 


1CH,2,7,6,7 
0,0,0,0 


DB 


38H,28H,2DH,0AH,7FH,6,64H 


DB 
DB 


70H,2,1,6,7 
0,0,0,0 


DB 


61H.50H,52H,0FH,19H,6,19H 


DB 
DB 


19H.2,0DH,0BH,0CH 
0,0,0,0 


LABEL 

DW 

DW 

DW 

DW 


WORD 
2048 
4096 
16384 
16384 


40X25 
80X25 
GRAPHICS 


COLUMNS 

LABEL 

DB 


BYTE 
40,40,80,80,40,4 


5,80,80 



SET UP FOR 40X25 



SET UP FOR 80X25 



SET UP FOR GRAPHICS 



SET UP FOR 80X25 B&W CARD 



TABLE OF REGEN LENGTHS 



■ C_REG_TAB 

LABEL BYTE ; TABLE OF MODE SETS 

DB 2CH,28H,2DH,29H,2AH,2EH,1EH,29H ; 



. MEMORY SIZE 

ORG 
ORG 
MEMORY_S IZE_DEI LKM I NE 
JMP 



EQUIPMENT DETERMINE 



ORGS 5-171 



= 184D 

18UD E9 0000 E 



1859 

= 1859 

1859 E9 0000 E 



ORG 


0F84DH 


ORG 


018UDH 


EQU 


$ 


JMP 


EQUIPMENT_1 



CASSETTE_I0 



CASSETTE (NO BIOS SUPPORT) 

ORG 0F859H 

ORG 01859H 

EQU S 

JMP CASSETTE_I0_1 



1A6E 














1A6E 














1A6E 


00 
00 


00 
00 


00 


00 


00 


00 


1A76 


7E 
81 


81 
7E 


A5 


81 


BD 


99 


1A7E 


7E 
FF 


FF 
7E 


DB 


FF 


G3 


E7 


1A86 


60 
10 


FE 
00 


FE 


FE 


70 


38 


1A8E 


10 
10 


38 
00 


70 


FE 


70 


38 


1A96 


38 
38 


70 
70 


38 


FE 


FE 


70 


1A9E 


10 
38 


10 
70 


38 


70 


FE 


7C 


1AA6 


00 
00 


00 
00 


18 


3C 


3C 


18 


1AAE 


FF 
FF 


FF 
FF 


E7 


03 


C3 


E7 


1AB6 


00 
3C 


30 
00 


66 


1+2 


U2 


66 


1ABE 


FF 
C3 


03 
FF 


99 


BD 


BD 


99 


1AC6 


OF 
CC 


07 
78 


OF 


70 


CO 


00 


1ACE 


3C 
7E 


66 
18 


66 


66 


30 


18 


1AD6 


3F 
FO 


33 
EO 


3F 


30 


30 


70 


1ADE 


7F 
E6 


63 
00 


7F 


63 


63 


67 


1AE6 


99 
5A 


5A 
99 


30 


E7 


E7 


30 


1AEE 


80 
80 


EO 
00 


F8 


FE 


F8 


EO 


1AF6 


02 
02 


OE 
00 


3E 


FE 


3E 


OE 


1AFE 


18 
3C 


30 
18 


7E 


18 


18 


7E 


1B06 


66 
66 


66 
00 


66 


66 


66 


00 


1B0E 


7F 
IB 


DB 
00 


DB 


7B 


IB 


IB 


1B15 


3E 
CC 


63 
78 


38 


60 


60 


38 


1B1E 


00 
7E 


00 
00 


00 


00 


7E 


7E 


1B26 


18 
18 


3C 
FF 


7E 


18 


7E 


3C 


1B2E 


18 
18 


30 
00 


7E 


18 


18 


18 


1B36 


18 
18 


18 
00 


18 


18 


7E 


30 


1B3E 


00 
00 


18 
00 


OC 


FE 


00 


18 


IBUS 


00 
00 


30 
00 


60 


^t 


60 


30 


1B4E 


00 
00 


00 
00 


CO 


00 


CO 


FE 


1B56 


00 
00 


2^ 

00 


66 


FF 


66 


2(4 


1B5E 


00 
00 


18 
00 


30 


7E 


FF 


FF 


1B66 


00 
00 


FF 
00 


FF 


7E 


30 


18 


1B6E 


00 
00 


00 
00 


00 


00 


00 


00 


1B76 


30 
30 


78 
00 


78 


30 


30 


00 


1B7E 


6C 
00 


60 
00 


60 


00 


OO 


00 


1B86 


60 
60 


60 
00 


FE 


60 


FE 


60 


1B8E 


30 
30 


70 
00 


CO 


78 


OC 


F8 


1B96 


00 
06 


06 
00 


CC 


18 


30 


66 


1B9E 


38 
76 


60 
00 


38 


76 


DC 


00 


18A6 


60 
00 


60 
00 


00 


00 


OO 


00 


1BAE 


18 
18 


30 
00 


60 


60 


60 


30 


1BB6 


60 
60 


30 
00 


18 


18 


18 


30 


1BBE 


00 
00 


66 
00 


30 


FF 


30 


66 


1BC6 


00 
00 


30 
00 


30 


FC 


30 


30 


1BCE 


00 
30 


00 
60 


00 


00 


00 


30 


1BD6 


00 
00 


00 
00 


00 


FC 


00 


00 


1BDE 


00 
30 


00 
00 


00 


00 


00 


30 


1BE6 


06 
80 


00 
00 


18 


30 


60 


CO 


1BEE 


7C 
70 


06 
00 


CE 


DE 


F6 


E6 


1BF6 


30 
FC 


70 
00 


30 


30 


30 


30 


1BFE 


78 
FC 


CC 
00 


00 


38 


60 


CC 


1C06 


78 
78 


CC 
00 


00 


38 


OC 


CO 



CHARACTER GENERATOR GRAPHICS FOR 320X200 AND 640X200 GRAPHICS 



ORT_OHAR_GEN 



ORG 0FA6EH 
ORG 01A6EH 
LABEL BYTE 
O0OH,OOOH.O00H, 

07EH,081H,0A5H, 

07EH,0FFH,0DBH, 

06CH,0FEH,0FEH, 

010H,038H,07CH, 

038H,07CH,038H, 

010H,010H,038H, 

OOOH,OO0H,018H, 

0FFH,0FFH,0E7H, 

000H,03CH,066H; 

0FFH,0O3H,099H, 

00FH,0O7H,0OFH, 

03CH,066H,066H, 

03FH,033H,03FH, 

07FH.063H,07FH, 

099H,05AH,03CH, 



00OH,0OOH, 
081H.0BDH, 
0FFH,0O3H, 
0FEH,O7OH, 
0FEH,07CH, 
OFEH,OFEH, 
07011, OFEH, 
03CH,030H, 
0O3H,0O3H, 
042H,042H, 
OBDH.OBDH, 
O7DH,0CCH, 
066H,03CH, 
03OH,03OH, 
O63H,063H, 
0E7H,0E7H, 



080H, 
002H, 
018H, 
066H, 
07FH, 
03EH, 
OOOH. 
018H^ 
018H 
018H. 
OOOH^ 
OOOH, 
OOOH, 
OOOH, 
OOOH, 
OOOH, 



OEOH, 
OOEH, 
03CH, 
066H, 
ODBH, 
063H, 
OOOH, 
03CH, 
03CH, 
018H, 
018H, 
030H, 
OOOH, 
024H, 
018H, 
OFFH, 



0F8H,0FEH, 
03EH,0FEH, 
07EH,018H, 
066H,066H, 
0DBH,07BH, 
038H,06CH, 
OOOH, OOOH, 
07EH,018H, 
07EH,018H, 
018H,018H, 
00CH,0FEH, 
060H,OFEH, 
OOOH, OOOH, 
066H,0FFH, 
03CH,07EH, 
0FFH,07EH, 



OOOH, OOOH, 
030H,078H, 
06CH,06OH, 
06OH,06OH, 
030H,070H, 
000H,0C6H, 
038H,06OH, 
060H,060H, 
018H,030H, 
060H,030H, 
000H,066H, 
000H,030H, 
OOOH, OOOH, 
OOOH, OOOH, 
OOOH, OOOH, 
006H,00CH, 



OOOH, 
078H, 
060H, 
OFEH, 
OOOH, 
OCCH, 
038H, 
OOOH, 
060H, 
018H, 
030H, 
030H, 
OOOH, 
OOOH, 
OOOH, 
018H, 



OOOH 
030H 
OOOH, 
06CH, 
078H. 
018H, 
076H, 
OOOH, 
060H, 
018H 
OFFH, 
OFCH 
OOOH, 
OFCH. 
OOOH, 
030H. 



0F8H, 
03EH, 
018H, 
066H, 
018H, 
060H, 
07EH, 
07EH, 
018H, 
07EH, 
OOOH, 
060H, 
OOOH, 
066H, 
OFFH, 
030H, 

OOOH, 
030H, 
OOOH, 
OFEH, 
OOOH, 
030H, 
ODOH, 
OOOH, 
060H, 
018H, 
030H, 
030H, 
OOOH, 
OOOH, 
OOOH, 
060H, 



OOOH. 
099H, 
0E7H. 
038H 
038H, 
07CH. 
07CH, 
018H, 
0E7H, 
066H, 
099H. 
OCCH, 
018H, 
070H, 
067H, 
03OH, 

OEOH, 
OOEH, 
07EH, 
OOOH, 
01BH, 
038H, 
07EH, 
03CH, 
018H, 
030H, 
018H, 
030H, 
OFEH, 
02UH, 
OFFH, 
018H, 

OOOH, 
OOOH, 
OOOH, 
06CH, 
0F8H, 
066H, 
OCCH, 
OOOH, 
030H, 
030H, 
066H, 
030H, 
030H, 
OOOH, 
030H, 
OOOH, 



,OOOH,OOOH , 

,081H,07EH ; 

,0FFH,07EH : 

,010H,OOOH , 

,010H,000H ; 

,038H,07CH ; 

,038H,07CH ; 

, OOOH, OOOH , 

OFFH, OFFH ; 

,03CH,O0OH , 

,003H,OFFH ; 

0OCH,O78H ; 

,07EH,018H , 

0F0H,OEOH ; 

.0E6H,OC0H ; 

05AH,099H 

080H,OOOH 
002H,000H ; 
030H,018H 
066H,000H 
01 BH, OOOH 
0CCH,078H 
07EH,000H 
018H,0FFH 
018H,O0OH 
018H,000H 
OOOH, OOOH 
OOOH, OOOH 
OOOH, OOOH 
OOOH, OOOH 
OOOH, OOOH 
OOOH, OOOH 

OOOH, OOOH 
030H,000H 
OOOH, OOOH 
06CH,000H 
030H,000H 
0C6H,000H 
076H,000H 
OOOH, OOOH 
O18H,O00H 
O60H,000H 
OOOH, OOOH 
OOOH, OOOH 
030H,060H 
OOOH, OOOH 
030H,OOOH 
080H,OOOH 



07CH,006H, OOEH, 0DEH,0F6H,0E6H,O7CH, OOOH 
030H,070H,030H,030H,030H,030H, OFCH, OOOH 
078H, OCCH, OOOH, 038H,050H, OCCH, OFCH, OOOH 
078H, OOOH, OOOH, 038H, OOOH, OCCH, 078H, OOOH 



D_00 
D_01 
D_02 
D_03 
D_OU 
D_05 
D_06 
D_07 
D_08 
D_09 
D_OA 
D_OB 
D_00 
D_OD 
D_OE 
D_OF 

D_10 
0_11 
D_12 
U_13 
D_14 
D_15 
D_16 
D_17 
D_18 
D_19 
D_1A 
D_1B 
D_10 
D_1D 
D_1E 
D_1F 

SP D_20 
! D_21 
" D_22 
ff D_23 

$ D_^^ 

PER CENT D_25 
& D_26 
' D_27 
{ D_28 
) D_29 
* D_2A 
+ D_2B 
, D_2C 
- D_2D 
. D_2E 
/ D_2F 

D_30 

1 D_31 

2 0_32 

3 0_33 



5-172 ORGS 



1C0E 


1C 
IE 


3C 
00 


6C 


CC 


FE 


OC 


1C16 


FC 
78 


CO 

00 


F8 


OC 


OC 


CC 


1C1E 


38 
78 


60 
00 


CO 


F8 


CC 


CC 


1C26 


FC 
30 


CC 
00 


OC 


18 


30 


30 


1C2E 


78 
78 


CC 
00 


CC 


78 


CC 


CC 


1C36 


78 
70 


CC 
00 


CC 


7C 


OC 


18 


1C3E 


00 
30 


30 
00 


30 


00 


00 


30 


1CU6 


00 
30 


30 
60 


30 


00 


00 


30 


ICUE 


18 
18 


30 
00 


60 


CO 


60 


30 


1C56 


00 
GO 


00 
00 


FC 


00 


00 


FC 


1C5E 


60 
60 


30 
00 


18 


OC 


18 


30 


1C66 


78 
30 


CC 
00 


OC 


18 


30 


00 


1C6E 


7C 
78 


C6 
00 


DE 


DE 


DE 


CO 


1C76 


30 
CC 


78 
00 


CC 


CC 


FC 


CC 


1C7E 


FC 
FC 


66 
00 


66 


7C 


66 


66 


1C86 


30 
3C 


66 
00 


CO 


CO 


CO 


66 


1C8E 


F8 
F8 


6C 
00 


66 


66 


66 


6C 


1C96 


FE 

FE 


62 
00 


68 


78 


68 


62 


1C9E 


FE 
FO 


62 
00 


68 


78 


68 


60 


1CA6 


30 

3£ 


66 
00 


CO 


CO 


CE 


66 


1CAE 


CC 
CC 


CC 
00 


CC 


FC 


CC 


CC 


1CB6 


78 
78 


30 
00 


30 


30 


30 


30 


1CBE 


IE 
78 


OC 
00 


OC 


OC 


CC 


CC 


1CC6 


E6 
E6 


66 
00 


6C 


78 


6C 


66 


1CCE 


FO 

FE 


60 
00 


60 


60 


62 


66 


1CD6 


C6 
C6 


EE 
00 


FE 


FE 


D6 


C6 


1CDE 


C6 
06 


E6 
00 


F6 


DE 


CE 


C6 


1CE6 


38 
38 


6C 
00 


C6 


C6 


C6 


6C 


1CEE 


FC 
FO 


66 
00 


66 


7C 


60 


60 


1CF6 


78 

1C 


CC 
00 


CC 


CC 


DC 


78 


1CFE 


FC 
E6 


66 
00 


66 


7C 


60 


66 


1D06 


78 
78 


CC 

00 


EO 


70 


IC 


CC 


1D0E 


FC 
78 


00 


30 


30 


30 


30 


1D16 


CC 

FC 


CO 
00 


CC 


CC 


CC 


CC 


101E 


CC 
30 


CC 
00 


CC 


CC 


CC 


78 


1D26 


06 
06 


C6 
00 


C6 


D6 


FE 


EE 


1D2E 


C6 
06 


06 
00 


6C 


38 


38 


6C 


1D36 


CC 
78 


CC 
00 


CC 


78 


30 


30 


1D3E 


FE 
FE 


06 
00 


8C 


18 


32 


66 


1DU6 


78 
78 


60 
00 


60 


60 


60 


60 


1DUE 


CO 
02 


60 
00 


30 


18 


OC 


06 


1D56 


78 
78 


18 
00 


18 


18 


18 


18 


1D5E 


10 
00 


38 
00 


60 


06 


00 


00 


1D66 


00 
00 


00 
FF 


00 


00 


00 


00 


1D6E 


30 
00 


30 
00 


18 


00 


00 


00 


1D76 


00 
76 


00 
00 


78 


OC 


7C 


CC 


1D7E 


EO 
DC 


60 
00 


60 


7C 


66 


66 


1D86 


00 
78 


00 
00 


78 


CC 


CO 


CC 


1D8E 


1C 
76 


OC 
00 


OC 


7C 


CC 


CC 


1D96 


00 
78 


00 
00 


78 


CC 


FC 


CO 


1D9E 


38 
FO 


6C 
00 


60 


FO 


60 


60 


1DA6 


00 
OC 


00 
F8 


76 


CC 


CC 


7C 


1DAE 


EO 
E6 


60 
00 


6C 


76 


66 


66 


1DB6 


30 
78 


00 
00 


70 


30 


30 


30 


1DBE 


OC 
CC 


00 
78 


OC 


OC 


OC 


CC 


1DC6 


EO 

E6 


60 
00 


66 


6C 


78 


60 


1DCE 


70 
78 


30 
00 


30 


30 


30 


30 


1DD6 


00 
06 


00 
00 


CC 


FE 


FE 


D6 


1DDE 


00 
CC 


00 
00 


F8 


CC 


CC 


CC 


1DE6 


00 
78 


00 
00 


78 


CC 


CC 


CC 


IDEE 


00 
60 


00 
FO 


DC 


66 


66 


70 



O1CH,03CH,O6CH,OCCH,0FEH 


OOCH,01EH 


OOOH 


k 


D_34 




0FCH,0COH,OF8H,00CH,00CH 


0CCH,078H 


OOOH 


5 


D_35 




038H,060H,OCOH,OF8H,OCCH 


0CCH,078H 


OOOH 


6 


D_36 




OFCH,0CCH,OOCH,018H,O30H 


O30H,03OH 


OOOH 


7 


0_37 




078H, OCCH, OCCH, 078H, OCCII 


0CCH,078H 


OOOH 


8 


D_38 




078H, OCCH, OCCH, 07CH, OOCH 


018H,070H 


OOOH 


9 


D_39 




O0OH,03OH,O3OH,0O0H,0O0H 


O30H,O3OH 


OOOH 




D_3A 




OOOH, 030H, 030H, OOOH, OOOH 


030H,030H 


060H 




D_3B 




018H,030H,060H,OCOH,060H 


030H,018H 


OOOH 


< 


D_3C 




OOOH, OOOH, OFCH, OOOH, OOOH 


OFCH, OOOH 


OOOH 


= 


D_3D 




06OH,O3OH,018H,0OCH,018H 


030H,060H 


OOOH 


> 


D_3E 




078H, OCCH, OOCH, 01 8H, 030H 


O00H,030H 


OOOH 


? 


D_3F 




07CH, 0C6H, ODEH, ODEH, ODEH 


OCOH,078H 


OOOH 


® 


D_40 




030H,078H, OCCH, OCCH, OFCH 


OCCH, OCCH 


OOOH 


A 


D_'+l 




0FCH,O66H,O66H,07CH,O66H 


066H,0FCH 


OOOH 


B 


D_i42 




03CH,O66H,OCOH,0C0H,OCOH 


066H,03CH 


OOOH 


C 


D_U3 




0F8H,O6CH, 066H, 066H, 066H 


06CH,0F8H 


OOOH 


D 


D_l44 




OFEH,062H,068H,078H,068H 


062H,0FEH 


OOOH 


E 


D_it5 




0FEH,O62H,068H,078H,068H 


060H,0F0H 


OOOH 


F 


D_46 




03CH,066H,OCOH,OCOH,OCEH 


066H,03EH 


OOOH 


G 


D_47 




OCCH, OCCH, OCCH, OFCH, OCCH 


OCCH, OCCH 


OOOH 


H 


D_48 




078H,O3OH,030H,030H,O3OH 


030H,078H 


OOOH 


1 


D_49 




01 FH, OOCH, OOCH, OOCH, OCCH 


0CCH,078H 


OOOH 


J 


D_4A 




0E6H,O66H,06CH,078H,O6CH 


066H,0E6H 


OOOH 


K 


D_4B 




0F0H,O60H,O60H,060H,O62H 


066H,0FEH 


OOOH 


L 


D_UC 




0C6H,OELH,OFEH,OFEH,OD6H 


0C6H,0C6H 


OOOH 


M 


D_»tD 




0C6H,OE6H,OF6H,ODEH,OCEH 


0C6H,0C6H 


OOOH 


N 


D_UE 




038H,06CH,OC6H,OC6H,OC6H 


06CH,038H 


OOOH 





D_UF 




0FCH,O66H,O66H,O7CH,O6OH 


060H,0F0H 


OOOH 


P 


D_50 




078H, OCCH, OCCH, OCCH, ODCH 


078H,01CH 


OOOH 


Q 


D_51 




OFCH, 066H, 066H, 07CH, 06CH 


066H,0E6H 


OOOH 


R 


U_32 




078H, OCCH, OEOH, 070H, OICH 


0CCH,078H 


OOOH 


S 


D_53 




0FCH,OBUH,O30H,O3OH,O3OH 


030H,078H 


OOOH 


T 


D_5t 




OCCH, OCCH, OCCH, OCCH, OCCH 


OCCH, OFCH 


OOOH 


U 


D_55 




OCCH, OCCH, OCCH, OCCH, OCCH 


078H,030H 


OOOH 


V 


D_56 




0C6H, 0C6H, 0C6H, 0D6H, OFEH 


0EEH,0C6H 


OOOH 


w 


D_57 




0C6H,0C6H,O6CH,O38H,O38H 


06CH,0C6H 


OOOH 


X 


D_58 




OCCH, OCCH, OCCH, 078H,O3OH 


030H,078H 


OOOH 


Y 


D_59 




0FEH,0C6H,08CH,018H,032H 


066H,0FEH 


OOOH 


Z 


D_5A 




078H,060H,060H,060H,060H 


060H,078H 


OOOH 


[ 


D_5B 




0C0H,06OH,030H,O18H,00CH 


006H,002H 


OOOH 


BACKSLASH D_5C 


078H,018H,018H,018H,018H 


018H,078H 


OOOH 


I 


D_5D 




010H,038H.06CH,0C6H,000H 


OOOH, OOOH 


OOOH 


CIRCUMFLEX D_5E 


OOOH, OOOH, OOOH, OOOH, OOOH 


OOOH, OOOH 


OFFH 


- 


D_5F 




O30H,03OH,018H, OOOH, OOOH 


OOOH, OOOH 


OOOH 




D_60 




OOOH . OOOH , 078H, OOCH , 07CH 


0CCH,076H 


OOOH 


LOWER CASE A D_61 


OE0H,060H,O6OH,07CH,066H 


066H,0DCH 


OOOH 


L 


C. B D. 


_62 


OOOH, OOOH, 078H, OCCH, OCOH 


OCCH,078H 


OOOH 


L 


C. C D. 


_63 


OICH, OOCH, OOCH, 07CH, OCCH 


0CCM,076H 


OOOH 


L 


C. D D. 


_6'l 


OOOH, OOOH, 078H, OCCH, OFCH 


OCOH,078H 


OOOH 


L 


C. E D. 


_65 


038H,06CH,060H,OFOH,060H 


06OH,0F0H 


OOOH 


L 


C. F D_ 


-66 


OOOH, OOOH, 076H, OCCH, OCCH 


07CH,0OCH 


0F8H 


L 


C. G D. 


.67 


OEOH,060H,06CH,076H,066H 


066H,0E6H 


OOOH 


L 


C. H D_ 


-68 


O3OH.O0OH,O7OH,030H,03OH 


030H,078H 


OOOH 


L 


C. 1 D„ 


-69 


OOCH, OOOH, OOCH, OOCH, OOCH 


OCCH, OCCH 


078H 


L 


C. J D. 


-6A 


OEOH,060H,066H,06CH,078H 


06CH,0E6H 


OOOH , 


L 


C. K D. 


-6B 


O7OH,03OH,O3OH,030H,03OH 


03OH,O78H 


OOOH 


L 


C. L D_ 


_6C 


OOOH, OOOH, OCCH, OFEH, OFEH 


0D6H,0C6H 


OOOH 


L 


C. M D. 


_6D 


OOOH, OOOH, 0F8H, OCCH, OCCH 


OCCH, OCCH 


OOOH 


L 


C. N D. 


-6E 


OOOH, OOOH, 078H, OCCH, OCCH 


0CCH,078H 


OOOH , 


L 


C. 0_ 


_6F 



OOOH, OOOH, ODCH, 066H, 066H, 07CH, 060H, OFOH 



L.C. P D_70 



ORGS 5-173 



1DF6 


00 
DC 


00 
IE 


76 


00 


00 


70 


1DFE 


00 
FO 


00 
00 


DC 


76 


66 


60 


1E06 


00 
F8 


00 
00 


70 


CO 


78 


00 


1E0E 


10 
18 


30 
00 


70 


30 


30 


34 


1E16 


00 
76 


00 
00 


CO 


00 


00 


OC 


1E1E 


00 
30 


00 
00 


CC 


00 


00 


78 


1E26 


00 
6C 


00 
00 


C6 


D6 


FE 


FE 


1E2E 


00 
C6 


00 
00 


06 


60 


38 


60 


1E36 


00 
OC 


00 
F8 


CC 


00 


CO 


70 


1E3E 


00 
FC 


00 
00 


FC 


98 


30 


64 


1E46 


1C 
1C 


30 
00 


30 


EO 


30 


30 


1E4E 


18 
18 


18 
00 


18 


00 


18 


18 


1E56 


EO 
EO 


30 
00 


30 


10 


30 


30 


1E5E 


76 
00 


DC 
00 


00 


00 


00 


00 


1E66 


00 
FE 


10 
00 


38 


60 


06 


06 



000H,000H 


076H 


OOCH, OCOH 


070H 


OOCH, 01 EH 


L 


C 


Q 


D_71 


OOOH.OOOH 


ODOH 


076H,066H 


060H 


OFOH. OOOH 


L 





R 


D_72 


OOOH.OOOH 


07CH 


0O0H,078H 


OOCH 


OF8H.00OH 


L 





S 


D_73 


010H,030H 


070H 


030H.030H 


03UH 


018H,O0OH 


L 





T 


D_74 


OOOH.OOOH 


OCOH 


OOOH.OOOH 


OCOH 


076H.OOOH 


L 





U 


0_75 


OOOH.OOOH 


OOCH 


OCOH. OCOH 


078H 


030H,000H 


L 





V 


D_76 


OOOH.OOOH 


006H 


0D6H.0FEH 


OFEH 


06CH.000H 


L 


0. 


w 


D_77 


OOOH.OOOH 


0C6H 


06CH,038H 


06CH 


0C6H,000H 


L 


c 


X 


D_78 


OOOH.OOOH 


OCOH 


OOOH.OOOH 


07CH 


000H.0F8H 


L 


0. 


Y 


0_79 


OOOH.OOOH 


OFOH 


098H,030H 


06UH 


OFOH, OOOH 


L 


c. 


z 


D_7A 


01CH.030H 


030H 


0E0H,030H 


030H 


010H,OOOH 


I 


D_ 


7B 




018H,018H 


018H 


OOOH.OISH 


018H 


018H,OOOH . 


1 


D_ 


70 




0E0H.030H 


030H 


01CH.030H 


030H 


OEOH.OOOH . 


i 


D_ 


70 




076H.0DOH 


OOOH 


OOOH.OOOH 


OOOH 


OOOH.OOOH . 


° 


D_ 


7E 





OOOH. 010H.038H,060H.0C6H.0C6H, OFEH. OOOH ; DELTA D_7F 



TIME OF DAY 



1E6E 

= 1E6E 

1E6E E9 0000 I 



1EA5 

= 1EA5 

1EA5 E9 0000 I 



1EF3 




1EF3 




1EF3 


1EA5 


1EF5 


0987 


1EF7 


0000 


1EF9 


0000 


ICFD 


0000 


1EFD 


0000 


1EFF 


0F57 


1F01 


0000 


1F03 


1065 


1F05 


184D 


1F07 


1841 


1F09 


0059 


1F0B 


0739 


1F0D 


1859 


1F0F 


082E 


1F1 1 


0FD2 


1F13 


0000 


1F15 


06F2 


1F17 


1E6E 


1F19 


1F53 


1F1B 


1F53 


1F1D 


10A4 


1F1F 


0FC7 


1F21 


0000 


1F23 




1F23 


0000 


1F25 


0000 


1F27 


0000 


1F29 


0000 


1F2B 


0000 


ir2D 


0000 


1F2F 


0000 


1F31 


0000 



1F54 

= 1F54 

1F54 E9 0000 E 



; ORG 0FE6EH 

ORG 01E6EH 

TIME_0F_DAY EQU $ 

JMP TIME_0F_DAY_1 



TIMER INTERRUPT 



ORG 0FEA5H 

ORG 01EA5H 

EQU $ 

JMP TIMER_INT_1 



VECTOR TABLE 

; ORG 0FEF3H 

ORG 01EF3H 

VE0T0R_TABLE LABEL WORD 



OFFSET 


TIMER IN 


OFFSET 


KB INT 


OFFSET 


D11 


OFFSET 


D11 


OFFSET 


D11 


OFFSET 


on 


OFFSET 


DISK INT 


OFFSET 


on 


IE INTERRUPTS 



VECTOR TABLE 
INTERRUPT 8 
INTERRUPT 9 
INTERRUPT A (SLAVE 
INTERRUPT B 
INTERRUPT C 
INTERRUPT D 
INTERRUPT E 
INTERRUPT F 



OFFSET VIDEO_IO 

OFFSET EQUIPMENT 

OFFSET MEMORY_SIZE_DETERM 

OFFSET DISKETTE_IO 

OFFSET RS232_I0 

CASSETTE_IO 

OFFSET KEYBOARD_IO 

OFFSET PRINTER_IO 

OOOOOH 

0F600H 

OFFSET BOOT_STRAP 

TIME_OF_DAY 

DUMMY_RETURN 

DUMMY_RETURN 

VIDEO_PARMS 

OFFSET DISK_BASE 





SLAVE_VECTOR_TABLE LABEL WORD 





DW 


OFFSET 


RTO INT 




DW 


OFFSET 


RE DIRECT 




DW 


OFFSET 


D11 




DW 


OFFSET 


Oil 




DW 


OFFSET 


on 




DW 


OFFSET 


INT 287 




DW 


OFFSET 


D11 




DW 


OFFSET 


on 




-- DUMMY 


INTERRUPT HANDLER 






ORG 


0FF53H 






ORG 


01F53H 


DUMMY_ 


.RETURN 


EQU 
IRET 


$ 




— PRINT 


SCREEN 








ORG 


0FF54H 






ORG 


01F54H 


PRINT_ 


SCREEN 


EQU 


$ 






JMP 


PR 1 NT_SOR 


.LIST 









E 


; 1 


NT 12H 




NT 


13H 






NT 


14H 






NT 


15H 






NT 


16H 






NT 


17H 






NT 


18H 






MUST BE 


INSERTED INTO 


TABLE LATER 


NT 


19H 






NT 


1AH - 


- TIME OF DAY 




NT 


18H - 


- KEYBOARD BREAK ADDR 


NT 


10H - 


- TIMER BREAK 


ADDR 


NT 


1DH - 


- VIDEO PARAMETERS 


NT 


1EH - 


-DISK PARMS 




NT 


1FH - 


- POINTER TO VIDEO EXT 


NTERRUPT 


70 THRU 7F) 




NT 


70 REAL TIME CLOCK 


INTERRUPT VECTOR 


NT 


71 REDIRECT TH 1 S TO 1 NT A 


NT 


72 






NT 


73 






NT 


74 






NT 


75 MATH PROCESSOR INTERRUPT 


NT 


76 






NT 


77 







5-174 ORGS 















POWER ON RESET VECTOR I 


IFFO 


'UBLIC 


ORG 
ORG 

P R 
- POWER 

LABEL 


OFFFOH 
OlFFOH 

ON RESET 
FAR 




1FF0 


'_0_R 




IFFO 
IFF! 
1FF3 


EA 

005B R 
FOOO 










DB 
DW 
DW 


OEAH 

OFFSET RESET 

OFOOOH 


;HARD CODE JUMP 

;OFFSET 

; SEGMENT 


1FF5 

IFFE 
1 FFE 
1 FFF 


30 
38 

FC 


31 2F 
34 


31 


30 


2F 

CODE 


DB 

ORG 
DB 

ENDS 
END 


'01/10/8U' 

01FFEH 
OFCH 


; RELEASE MARKER 
;THIS PC'S ID 



ORGS 5-175 



5-176 ORGS 



SECTION 6. INSTRUCTION SET 



Contents 

Instruction Sets 6-3 

80286 Microprocessor Instruction Set 6-3 

Data Transfer 6-3 

Arithmetic 6-6 

Logic 6-10 

String Manipulation 6-12 

Control Transfer 6-13 

Processor Control 6-19 

Protection Control 6-21 

80287 Coprocessor Instruction Set 6-24 

Data Transfer 6-24 

Comparison 6-25 

Constants 6-26 

Arithmetic 6-27 

Transcendental 6-29 

Processor Control 6-29 



Instruction Set 6-1 



Notes: 



6-2 Instruction Set 



Instruction Set 



80286 Microprocessor Instruction Set 



The following is an instruction set summary for the Intel 80286 
microprocessor. 



Data Transfer 

MOV = move 





Register to Register Memory 




lOOOIOOw 


mod rag r/w 




Register/Memory to Register 


10001 01 w 


1 mod rag r/w 


1 


Immediate to Register Memory 


1 10001 1w 


1 mod 000 r/w | data | data if w = 


1 


Immediate to Register 


1 lOllwreg 


1 data 1 data if w = 1 


1 


IVIemory to Accumulator 


lOIOOOOw 


addr-low addr-high 




Accumulator to Memory 


101 0001 w 


addr-low addr-high 




Register/Memory to Segment Register 


10001110 


modOreg r/w 





Instruction Set 6-3 



Segment Register to Register Memory 



10001100 I modOreg r/w 



PUSH = Push 



Memory 



11111111 modi 10 r/w 



Register 



OlOIOreg 



Segment Register 



QQQregllO 



Immediate 



OIlOIOsO 


data 


data if s = 



PUSHA = Push An 



Push All 



01100000 



POP = Pop 



Memory 



10001111 modOOOr/m 



Register 



01011 rag 



Segment Register 



OOOreglll reg ?fc 



POPA = Pop AU 



Pop All 



01100001 



6-4 Instruction Set 



XCHG = Exchange 







Register Memory with Register 




100001 1w 1 mod 


reg r/m I 


Register with Accumulator 


1 lOOIOreg 


I] 

c 


V = Input From 


Fixed Port 


niOOlOw 1 port 


1 




Variable Port 


iiionow 




)UT = Output To 


Fixed Port 


inOOIIw port 






Variable Port 




1110111W 


> 
I 


[LAT = Translate Byte to AL 

Translate Byte to AL 


11010111 


1 


^EA = Load EA to Register 

Load EA to Register 




10001101 mod 


reg r/m I 


I 


.DS = Load Pointer to DS 

Load Pointer to DS 


11000101 mod 


reg r/m mod #11 | 



Instruction Set 6-5 



LES = Load Pointer to ES 

Load Pointer to ES 



11000100 modreg 


r/m mod ^fc 11 | 


LAHF = Load AH with Flags 

Load AH with Flags 


10011111 


S AHF = Load AH with Flags 

Store AH with Flags 


10011110 


PUSHF = Push Flags 


Push Flags 


1 10011100 1 


POPF = Pop Flags 


Pop Flags 


10011101 1 



Arithmetic 

ADD = Add 

Reg/Memory with Register to Either 



OOOOOOOw 


mod reg r/m 






Immediate to Register Memory 


lOOOOOsw 


modOOO r/m 


data 


data if sw 


= 01 


Immediate to Accumulator 


OOOOOlOw 


data 


data if w = 1 



ADC = Add with Carry 



6-6 Instruction Set 



Reg/Memory with Register to Either 



0001 OOdw I mod reg r/m 



Immediate to Register Memory 



I lOOOOOsw I modOOOr/m | data 



data if sw = 01 



Immed iate to Accu m ulato r 

0001 01 Qw I data 



data if w = 1 



INC = Increment 

Register/Memory 



1111111W I modOOOr/m 



Register 



OlOOOreg 



SUB = Subtract 



Reg/Memory with Register to Either 



OOlOIOdw I mod reg r/m 



Immediate from Register Memory 



lOOOOOsw 


modlOl r/m 


data 


data if sw = 01 



Immediate from Accumulator 



00101 lOw data 



data if w = 1 



SBB = Subtract with Borrow 



Reg/Memory with Register to Either 



0001 lOdw I mod reg r/m 



Immediate to Register Memory 



lOOOOOsw 


modOl 1 r/m | data 


data if sw = 01 



Instruction Set 6-7 



Immediate to Accumulator 



0001 llOw 


data 


data if w = 1 



DEC = Decrement 

Register/Memory 



111 111 1w modOOl r/m 



Register 



OlOOIreg 



CMP = Compare 



Register/Memory with Register 



0011101W I mod rag r/m 



Register with Register/Memory 



001 1 1 0Ow mod reg r/m 



Immediate with Register/Memoi 



i 



lOOOOOsw modi 11 r/m Data | Data if sw = 01 



Immediate with Accumulator 



0001 llOw I Data 



Data if w = 1 



NEG = Change Sign 

^ Change Sign 



111 ion w I modOII r/m 



AAA = ASCII Adjust for Add 

ASCII Adjust for Add 



00110111 



DEC = Decimal Adjust for Add 

Decimal Adjust for Add 



00100111 



6-8 Instruction Set 



AAS = ASCII Adjust for Subtract 

ASCII Adjust for Subtract 



001 1 1 1 1 1 



DAS = Decimal Adjust for Subtract 

Decimal Adjust for Subtract 



00110111 



MUL = Multiply (Unsigned) 

Multiply 



111 101 1w I modlOO r/m 



IMUL = Integer Multiply (Signed) 

integer Multiply 



11 1101 1w I modlOl r/m 



IIMUL = Integer Immediate Multiply (Signed) 

Integer Immediate Multiply 



OIIOIOsI I modreg r/m | Data 



Data if s = 



DIV = Divide (Unsigned) 

Divide 



miQIIw I modllO r/m 



IDIV = Integer Divide (Signed) 

Integer Divide 



linOllw I modlll r/m 



AAM = ASCII Adjust for Multiply 

ASCII Adjust for Multiply 



11010100 I 00001010 



AAD = ASCII Adjust for Divide 



Instruction Set 6-9 



ASCII Adjust for Divide 



11010101 



00001010 



CBW = Convert Byte to Word 

Convert Byte to Word 



10011000 



CWD = Convert Word to Double Word 

Convert Word to Double Word 



10011001 



Logic 

Shift Rotate Instructions 

Register Memory by 1 



IIOIOOOw 


mod 1 1 1 r/m 


Register Memory by CL 


IIOIOOIw 


mod 1 1 1 r/m | 


Register Memory by Count 


IIOOOOOw 


mod 1 1 1 r/m Count 



T T T Instruction 

000 ROL 

001 ROR 
010 RCL 
Oil RCR 

100 SHL/SAL 

101 SHR 
111 SAR 

AND = And 



Reg/Memory and Register to Either 



OOlOOOdw I mod rag r/m 



6-10 Instruction Set 





Immediate to Register Memory 


lOOOOOOw 


modOOO r/m Data Data if w = 1 | 


Immediate to Accumulator 


001 001 Ow 


Data Data if w = 1 | 


lEST = AND Function to Flags; No Result 

Register Memory and Register 


1 00001 Ow 


1 mod reg r/m 


Immediate Data and Register Memory 


iinoiiw 


modOOO r/m Data Data if w=1 


Immediate to Accumulator 


00001 lOw 


Data Data if w = 1 


Or = Or 


Reg/ Memory and Register to Either 


00001 Odw 


mod reg r/m 


Immediate to Register Memory 


1 lOOOOOOw 


modOOl r/m Data Data if w = 1 


Immediate to Accumulator 


00001 lOw 


Data Data if w = 1 


XOR = Exclusive OR 

Reg/Memory and Register to Either 


OOllOOdw 


mod reg r/m 1 


Immediate to Register Memory 


lOOOOOOw 


modi 10 r/m | Data Dataifw=1 



Instruction Set 6-11 



Immediate to Accumulator 

001 001 Qw I Data | Dataifw=1 



NOT = Invert Register/Memory 

Invert Register/Memory 



111 1011 w modOIOr/m 



String Manipulation 

MOVS = Move Byte Word 

Move Byte Word 



101 001 Ow 



CMPS = Compare Byte Word 

Compare Byte Word 



101001 1w 



SCAS = Scan Byte Word 

Scan Byte Word 



lOIOIIIw 



LODS = Load Byte Word to AL/AX 

Load Byte Word to AL/AX 



lOIOIlOw 



STOS = Store Byte Word from AL/AX 

Store Byte Word from AL/AX 



1010101W 



INS = Input Byte from DX Port 

Input Byte Word from DX Port 



OIIOIlOw 



6-12 Instruction Set 



OUTS = Output Byte to DX Port 

Output Byte Word to DX Port 



0110111W 


MOVS = Move String 


Move String 


11110010 lOIOOlOw 


CMPS = Compare String 


Compare String 


iniooiz 1 loiooiiw 


SCAS = Scan String 


Scan String 


11110010 lOIOIIIw 


LODS = Load String 


Load String 


11110010 10101 lOw 


STOS = Store String 


Store String 


11110010 lOIOIOIw 


INS = Input String 


Input String 


11110010 OIIOIlOw 


OUTS = Output String 


Output String 


11110010 1010011W 



Control Transfer 



Instruction Set 6-13 



CALL = CaU 





Direct Within Segment 


11101000 


disp-low disp-low 


Register/Memory Indirect Within Segment 


1 11111111 


modOIOr/m 


Direct Intersegment 


10011010 


Segment Offset Segment Selector 



Protected Mode Only (Direct Intersegment) 

Via call gate to same privilege level 

Via call gate to different privilege level, no parameters 

Via call gate to different privilege level, x parameters 

Via TSS 

Via task gate. 

indirect Intersegment 



11111111 I modOII r/m {mod^^U)' 



Protected Mode Only (Indirect Intersegment) 

Via call gate to same privilege level 
Via call gate to different privilege level, no parameters 
Via call gate to different privilege level, x parameters 
Via TSS 
Via task gate. 
JMP = Unconditional Jump 

Short/Long 



11101011 


disp-low 


Direct within Segment 


11101001 


disp=low 


disp-high | 



6-14 Instruction Set 





Register/Memory Indirect Within Segment 


11111111 


modlOOr/m 


Direct Intersegment 


11101010 


Segment Offset Segment Selector 



Protected Mode Only (Direct Intersegment) 

• Via call gate to same privilege level 
. Via TSS 

• Via task gate. 

Indirect Intersegment 



11111111 I modlOl r/m (mod # 11) 



Protected Mode Only (Indirect Intersegment) 

• Via call gate to same privilege level 
. Via TSS 

• Via task gate. 

RET = Return from CaU 

Within Segment 



Protected Mode Only (RET) 

• To Different Privilege Level 



11000011 


Within Segment Adding Immediate to SP 


11000010 


data -low | data -high 


Intersegment 


11001011 


intersegment Adding Immediate to SP 


11001010 


data- low | data- high 



Instruction Set 6-15 



JE/ JZ = Jump on Equal Zero 

Jump on Equal Zero 



01110100 I disp 



JL/JNGE = Jump on Less Not Greater, or Equal 

Jump on Less Not Greater, or Equal 

I 01111100 I disp ~ 

JLE/ JNG = Jump on Less, or Equal Not Greater 

Jump on Less, or Equal Not Greater 



01111110 I disp 



JB/JNAE = Jump on Less, or Equal Not Greater 

Jump on Less, or Equal Not Greater 



01110010 I disp 



JBE/JNA = Jump on Below, or Equal NotAbove 

Jump on Below, or Equal Not Above 



110110 I disp 



01 



JP/ JPE = Jump on Parity Parity Even 

Jump on Parity Parity Even 



01111010 I disp 



JO = Jump on Overflow 

Jump on Overflow 



01110000 I disp 



JS = Jump on Sign 

Jump on Sign 



01111000 disp 



JNE/ JNZ = Jump on Not Equal Not Zero 



6-16 Instruction Set 



Jump on Not Equal Not Zero 



01110101 



disp 



JNL/JGE = Jump on Not Less Greater or Equal 

Jump on Not Less Greater or Zero 



01111101 I disp 



JNLE/JG = Jump on Not Less or Equal Greater 

Jump on Not Less or Equal Greater 



01111111 I disp 



JNB/JAE = Jump on Not Below Above or Equal 

Jump on Not Below Above or Equal 



01110011 I disp 



JNBE/JA = Jump on Not Below or Equal Above 

Jump on Not Below or Equal Above 



01110111 I disp 



JNP/JPO = Jump on Not Parity Parity Odd 

Jump on Not Parity Parity Odd 



01111011 disp 



JNO = Jump on Not Overflow 

Jump on Not Overflow 



01110001 disp 



JNS = Jump on Not Sign 

Jump on Not Sign 



I 01111011 I disp 



LOOP = Loop CX Times 



Instruction Set 6-17 



Loop CX Times 



L=0 
L=l 
L>1 
LEAVE = Leave Procedure 

Leave Procedure 



11100010 disp 


LOOPZ/LOOPE = Loop while Zero Equal 

Loop while Zero Equal 


11100001 disp 


LOOPNZ/LOOPNE = Loop whfle Not Equal Zero 

Loop while Not Equal Zero 


11100000 disp 1 


JCXZ = Jump on CX Zero 

Jump on CX Zero 


11100011 disp 1 


ENTER = Enter Procedure 

Enter Procedure 


11001000 data-low data-high L 



11001001 



INT = Interrupt 



Type Specified 



11001101 I Type 



Type 3 



11001100 



6-18 Instruction Set 



INTO = Interrupt on Overflow 

Interrupt on Overflow 



11001110 



Protected Mode Only 

• Via interrupt or trap gate to same privilege level 

• Via interrupt or trap gat to different privilege level 

• Via task gate. 
IRET = Interrupt Return 

Interrupt Return 



11001111 



Protected Mode Only 

• To same privilege level 

. To different task (NT =1). 

BOUND = Detect Value Out of Range 

Detect Value Out of Range 



01100010 



mod reg r/m 



Processor Control 

CLC = Clear Carry 

Clear Carry 



1111100 



CMC = Complement Carry 

Complement Carry 



11001111 



STC = Set Carry 

Set Carry 



11111001 



Instruction Set 6-19 



CLD = Clear Direction 



Clear Direction 



11111100 


SrU = Set Direction 

Set Direction 


11111101 


CLI Clear Interrupt 

Clear Interrupt 


11111010 


SIX = Set Interrupt 

Set Interrupt 


11111011 1 


HLT = Halt 

Halt 


1 11110100 


WAIT = Wait 

Wait 


10011011 


LOCK = Bus Lock Prefix 

Bus Lock Prefix 


11110000 


CIS = Clear Task Switched Flag 

Clear Task Switched Flag 


1 00001111 00000110 





ESC = Processor Extension Escape 



6-20 Instruction Set 



Processor Extension Escape 



10011 



modLLL r/m 



Protection Control 

LGDT = Load Global Descriptor Table Register 

Load Global Descriptor Table Register 



00001 1 1 1 



00000001 I rnodOlO r/m 



SGDT = Store Global Descriptor Table Register 

Store Global Descriptor Table Register 



00001111 I 00000001 I modOOOr/m 



LIDT = Load Interrupt Descriptor Table Register 

Load Interrupt Descriptor Table Register 



00001111 I 00000001 I modOII r/m 



SIDT = Store Interrupt Descriptor Table Register 

Store Interrupt Descriptor Table Register 



00001 1 1 1 



00000001 I modOOl r/m 



LLDT = Load Local Descriptor Table Register from Register 
Memory 

Load Local Descriptor Table Register from Register Memory 



00001111 00000000 



modOIOr/m 



SLDT = Store Local Descriptor Table Register from Register 
Memory 

Store Local Descriptor Table Register from Register Memory 

^000000 I modOOOr/m 



00001 1 1 1 



LTR = Load Task Register from Register Memory 

Load Task Register from Register Memory 



00001 1 1 1 


00000000 


modOII r/m 



Instruction Set 6-21 



STR = Store Task Register to Register Memory 

Store Task Register to Register Memory 



00001111 00000000 



modOOl r/m 



LMSW = Load Machine Status Word from Register Memory 

Load Machine Status Word from Register Memory 



00001 1 1 1 



00000001 I modi 10 r/m 



SMSW = Store Machine Status Word 

Store Machine Status Word 



00001 1 1 1 



00000001 I modlOOr/m 



LAR = Load Access Rights from Register Memory 

Load Access Rights from Register Memory 



00001 111 I 00000010 I mod reg r/m 



LSL = Load Segment Limit from Register Memory 

Load Segment Limit from Register Memory 



00001 111 I 0000001 1 I mod reg r/m 



ARPL = Adjust Requested Privilege Level from Register Memory 

Adjust Requested Privilege Level from Register Memory 



01100011 I mod reg r/m 



VERR = Verify Read Access; Register Memory 

Verify Read Access; Register Memory 



00001111 I 00000000 modi 00 r/m 



VERR = Verify Write Access 

Verify Write Access 



00001 1 1 1 



00000000 I modlOl r/m 



Note: The effective address (EA) of the memory operand is 
computed according to the mod and r/m fields: 

If mod =11, then r/m is treated as a reg field. 

If mod = 00, then disp = 0, disp-low and disp-high are absent. 



6-22 Instruction Set 



If mod = 01, then disp = disp-low sign-extended to 16 bits, 
disp-high is absent. 

If mod = 10, then disp = disp-high:disp-low. 

If r/m = 000, then EA = (BX) + (SI) + disp 

If r/m = 001, then EA = (BX) + (SI) + disp 

If r/m = 010, then EA = (BP) + (SI) + disp 

If r/m = 011, then EA = (BP) + (DI) + disp 

If r/m = 100, then EA = (SI) + disp 

If r/m =101, then EA = (DI) + disp 

If r/m =110, then EA = (BP) + disp 

If r/m = 1 1 1 , then EA = (BX) + disp 

disp follows the second byte of the instruction (before data if 
required). 

Segment Override Prefix 

Segment Override Prefix 



001 regOOl 



reg is assigned as follows: 
reg Segment Register 

00 ES 

01 CS 

10 SS 

11 DS 



16-bit (w = 1) 


8-bit (w = 0) 


000 AX 


000 AL 


001 CX 


001 CL 


010 DX 


010 DL 


Oil BX 


Oil BL 


100 SP 


100 AH 


101 BP 


101 CH 


110SI 


110DH 


111 DI 


111 BH 



Instruction Set 6-23 



The physical addresses of all operands addressed by the BP 
register are computed using the SS segment register. The physical 
adaresses of the destination operands of the string primitive 
operations (those addressed by the DI register) are computed 
using the ES segment, which may not be overridden. 



80287 Coprocessor Instruction Set 



The foUovi^ing is an instruction set summary for the 80287 
coprocessor. 



Data Transfer 

FLD = Load 





Integer/Real Memory to ST(0) 


escape MF 1 


mod 000 r/m 


Long Integer Memory to ST(0) 


escape 1 1 1 


mod 101 r/m 


Temporary Real Memory to ST(0) 


escape 01 1 


mod 101 r/m 


BCD Memory to ST(0) 


escape 1 1 1 


mod 100 r/m 


ST(i) to ST{0) 


escape 001 


IIOOOST(i) 


FST = Store 


ST(0) to Integer/Real Memory 


escape MF 1 


mod 010 r/m 


ST(0) to ST(i) 


escape 101 


11010ST{i) 



6-24 Instruction Set 



FSTP = Store and Pop 

ST(0) to Integer/Real Memory 



escape MF 1 


mod Oil r/m 


ST(0) to Long Integer Memory 


escape 1 1 1 


mod 111 r/m 


ST(0) to Temporary Real Memory 


escape 01 1 


mod 111 r/m 


ST(0) to BCD Memory 


escape 1 1 1 


mod 110 r/m 


ST(0) to ST(i) 


escape 101 


11011 ST(i) 


FXCH = Exchange ST(i) and ST(0) 

Exchange ST(i) and ST(0) 


escape 001 


11001 ST(i) 



Comparison 

FCOM = Compare 

Integer/Real Memory to ST(0) 

I escape MFO | mod 010 r/m 



escape 000 | IIOIOST(i) 



ST(i) to ST(0) 



FCOMP = Compare and Pop 

Integer/Real Memory to ST(0) 



escape MF mod Oil r/m 



Instruction Set 6-25 



ST(i) to ST(0) 


1 escape 000 IIOIOST(i) 


FCOMPP = Compare ST(i) to ST(0) and Pop Twice 

Compare ST(i) to ST(0) and pop twice 


escape 110 | 11011001 1 


jtlST = Test ST(0) 

Test ST(0) 


1 escape 001 11100100 


FXAM = Examine Si (0) 

Examine ST(0) 


escape 001 11100101 



Constants 

FLDZ = Load + 0.0 into ST(0) 

Load + 0.0 into ST(0) 



F 
F 


escape 000 


1 11101110 


LDl = Load + 1.0 into ST(0) 

Load + 1.0 into ST(0) 


escape 001 


1 11101000 1 


LDPl == Load tt into Si (0) it into ST(0) 

Load 




escape 001 


1 11101011 


F 


LDL2T = 


Load log2 10 intoST(O) 2 10 into st{0) 
Load log 




escape 001 


11101001 



6-26 Instruction Set 



FLDLG2 = Load logio 2 into ST(0) lo 2 into st(0) 
Load log 



escape 001 | 11101100 



FLDLN2 = Load loge 2 into ST(0) e 2 into st(0) 

Load log 



escape 001 



11101101 



Arithmetic 

FADD = Addition 



FDIV = Division 





Integer/Real Memory with ST(0) 


escape MF 


mod 000 r/m | 


ST(i) and ST{0) 


escape dPO 


1 IIOOOSTO) 1 


FSUB = Subtraction 

Integer/Real Memory with ST{0) 


1 escape MF 


mod 1 0r r/m 


ST{i) and ST{0) 


escape dPO 


niOrr/m 


FMUL = MultipBcation 

Integer/Real Memory with ST(0) 


escape MFO 


mod 001 r/m 


ST(i) and ST(0) 


1 escape dPO 


11001 r/m 1 



Instruction Set 6-27 



F 
F 
F 




Integer/Real Memory with ST(0) 


escape MF C 


) mod 11r r/m 




ST(i) and ST(0) 


escape dPO 


1111 rr/m 


SQRT = Square Root of ST(0) 

Square Root of ST(0) 


escape 001 


11111010 


SCALE = 


Scale ST(0) by ST(1) 

Scale ST(0) by ST{1) 


escape 001 


11111101 


PREM = Partial Remainder of ST(0) + Sl(l) 
Partial Remainder of ST(0) -i- ST(1) 




escape 001 


11111000 


F 


TINDINT: 


= Round ST(0) to Integer 

Round ST(0) to Integer 




escape 001 


11111100 


F 
F 
I 


^TRACT 


= Extract Components of ST(0) 

Extract Components of ST(0) 


escape 001 


11110100 


ABS = Absolute Value of ST(0) 

Absolute Value of ST(0) 


1 escape 001 


1 11100001 1 


i^CHS = Change Sign of ST(0) 

Change Sign of ST(0) 


escape 001 


11100000 



6-28 Instruction Set 



Transcendental 

FPTAN = Partial Tangent of ST(0) 



Partial Tangent of ST(0) 



escape 001 11110010 


*PATAN = Partial Arctangent of ST(0) ~ ST(1) 

Partial Arctangent of ST(0) -f ST(1) 


escape 001 11110011 


F2XM1 = 2ST(0)-1 ST(o)_i 


escape 001 11110000 


FYL2X = ST(1) X Log2 [Si(0)l 2 [ST{0)] 

ST(1)xlog 


1 escape 001 11110001 


FYL2XP1 = ST(1) X Log2 [ST(0) + 1] 2 [ST(0) + 1 ] 

ST(1)xlog 


escape 001 11111001 



Processor Control 

FINT = Initialize NPX 

Initialize NPX 



escape 01 1 



11100011 



FSETPM = Enter Protected Mode 

Enter Protected Mode 



escape 01 1 



11100100 



Instruction Set 6-29 



FSTSWAX = Store Control Word 

Store Control Word 





escape 1 1 1 


11100000 1 


FLDCW = 


Load Control Word 


F 




Load Controi Word 


escape 001 


1 mod 101 r/m I 


STCW = 


Store Control Word 


F 




Store Control Word 


escape 001 


1 mod 111 r/m 


STSW = 


Store Status Word 






Store Status Word 




escape 101 


mod 101 r/m I 


FCLEX = Clear Exceptions 






Clear Exceptions 




escape 01 1 


11100010 


F 
I 


^STENV = 


Store Environment 

Store Environment 


escape 001 


mod 110 r/m 


LDENV = 


= Load Environment 


I 




Load Environment 


escape 001 


mod 100 r/m 


^SAVE = Save State 






Save State 


escape 101 


mod 110 r/m 



FRSTOR = Restore State 



6-30 Instruction Set 



Restore State 



escape 101 


mod 100 r/m 


FINCSTP = 


Increment Stack Pointer 

Increment Stack Pointer 


escape 001 


11110111 


FDECSTP = 


= Decrement Stack Pointer 

Decrement Stack Pointer 


escape 001 


11110110 


FFREE = Free ST(i) 

Free ST{i) 


escape 101 


IIOOOST(i) 


FNOP = No Operation 

No Operation 


escape 001 


11010000 



Instruction Set 6-31 



Notes: 



6-32 Instruction Set 



SECTION 7. CHARACTERS, 
KEYSTROKES, AND COLORS 



Contents 



Characters, Keystrokes, and Color 
NOTES 



. 7-3 
7-13 



Characters, Keystrokes, and Colors 7-1 



Notes: 



7-2 Characters, Keystrokes, and Color 



Characters, Keystrokes, and Color 







As Characters 


As Text Attributes 


Value 


Color/Graphics 
Monitor Adapter 


IBM 

Monochrome 

Display 

Adapter 


Hex 


Dec 


Symbol 


Keystrokes 


Modes 


Background 


Foreground 


00 





Blank 
(Null) 


Ctrl 2 




Black 


Black 


Non-Display 


01 


1 


© 


Ctrl A 




Black 


Blue 


Underline 


02 


2 


9 


Ctrl B 




Black 


Green 


Normal 


03 


3 


V 


CtrIC 




Black 


Cyan 


Normal 


04 


4 


♦ 


CtrlD 




Black 


Red 


Normal 


05 


5 


♦ 


CtrlE 




Black 


Magenta 


Normal 


06 


6 


4 


CtrIF 




Black 


Brown 


Normal 


07 


7 


• 

O 

m 

CT 


CtrIG 




Black 


Light Grey 


Normal 


08 


8 


Ctrl H, 
Backspace, 
Shift 
Backspace 




Black 


Dark Grey 


Non-Display 


09 


9 


Ctrll 




Black 


Light Blue 


High Intensity 
Underline 


OA 


10 


Ctrl J, 
Ctrl^ 




Black 


Light Green 


High Intensity 


OB 


11 


Ctrl K 




Black 


Light Green 


High Intensity 


OC 


12 


9 


Ctrl U 




Black 


Light Red 


High Intensity 


OD 


13 


^ 


Ctrl M,^, 
Shifty 




Black 


Light 
Magenta 


High Intensity 


OE 


14 


^ 


CtrIN 




Black 


Yellow 


High Intensity 


OF 


15 


^ 


CtrlO 




Black 


White 


High Intensity 


10 


16 


►- 


CtrIP 




Blue 


Black 


Normal 


11 


17 


-^ 


CtrlQ 




Blue 


Blue 


Underline 


12 


18 


: 


CtrlR 




Blue 


Green 


Normal 


13 


19 


II 

• ■ 


CtrlS 




Blue 


Cyan 


Normal 


14 


20 


TT 


CtrIT 




Blue 


Red 


Normal 


15 


21 


%. 


CtrlU 






Magenta 


Normal 


16 


22 


■ 


CtrlV 




Blue 


Brown 


Normal 


17 


23 


I 


CtrlW 




Blue 


Light Grey 


Normal 



Characters, Keystrokes, and Color 7-3 







As Characters 


As Text Attributes 


Value 


Color/Graphics 
Monitor Adapter 


IBM 

Monochrome 

Display 

Adapter 


Hex 


Dec 


Symbol 


Keystrokes 


Modes 


Background 


Foreground 


18 


24 


r 


CtrIX 




Blue 


Dark Grey 


High Intensity 


19 


25 


i 


Ctrl Y 




Blue 


Light Blue 


High Intensity 
Underline 


1A 


26 


- 


CtrIZ 




Blue 


Light Green 


High Intensity 


IB 


27 


- 


Ctrl [, 
Esc, Shift 
Esc, Ctrl 
Esc 




Blue 


Light Cyan 


High Intensity 


1C 


28 


l_ 


Ctrl \ 




Blue 


Light Red 


High Intensity 


ID 


29 


— 


Ctrl] 




Blue 


Light 
Magenta 


High Intensity 


IE 


30 


▲ 


Ctrl 6 




Blue 


Yellow 


High Intensity 


IF 


31 


▼ 


Ctrl- 




Blue 


White 


High Intensity 


20 


32 


Blank 
Space 


Space Bar, 
Shift, 
Space, 
Ctrl Space, 
Alt Space 




Green 


Black 


Normal 


21 


33 


! 


! 


Shift 


Green 


Blue 


Underline 


22 


34 






Shift 


Green 


Green 


Normal 


23 


35 


# 


# 


Shift 


Green 


Cyan 


Normal 


24 


36 


$ ' 


$ 


Shift 


Green 


Red 


Normal 


25 


37 


% 


% 


Shift 


Green 


Magenta 


Normal 


26 


38 


& 


& 


Shift 


Green 


Brown 


Normal 


27 


39 








Green 


Light Grey 


Normal 


28 


40 


( 


( 


Shift 


Green 


Dark Grey 


High Intensity 


29 


41 


) 


) 


Shift 


Green 


Light Blue 


High Intensity 
Underline 


2A 


42 


* 


* 


Note 1 


Green 


Light Green 


High Intensity 


28 


43 


+ 


+ 


Shift 


Green 


Light Cyan 


High Intensity 


2C 


44 








Green 


Light Red 


High Intensity 


2D 


45 


— 


— 




Green 


Light 
Magenta 


High Intensity 


2E 


46 






Note 2 


Green 


Yellow 


High Intensity 



7-4 Characters, Keystrokes, and Color 







As Characters 


As Text Attributes 


Value 


Color/Graphics 
Monitor Adapter 


IBM 

Monochrome 

Display 

Adapter 


Hex 


Dec 


Symbol 


Keystrokes 


Modes 


Background 


Foreground 


2F 


47 


/ 


/ 




Green 


White 


High Intensity 


30 


48 








Note 3 


Cyan 


Black 


Normal 


31 


49 


1 


1 


Note 3 


Cyan 


Blue 


Underline 


32 


50 


2 


2 


Note 3 


Cyan 


Green 


Normal 


33 


51 


3 


3 


Note 3 


Cyan 


Cyan 


Normal 


34 


52 


4 


4 


Note 3 


Cyan 


Red 


Normal 


35 


53 


5 


5 


Note 3 


Cyan 


Magenta 


Normal 


36 


54 


6 


6 


Note 3 


Cyan 


Brown 


Normal 


37 


55 


7 


7 


Note 3 


Cyan 


Light Grey 


Normal 


38 


56 


8 


8 


Note 3 


Cyan 


Dark Grey 


High Intensity 


39 


57 


9 


9 


Note 3 


Cyan 


Light Blue 


High Intensity 
Underline 


3A 


58 






Shift 


Cyan 


Light Green 


High Intensity 


3B 


59 


; 






Cyan 


Light Cyan 


High Intensity 


3C 


60 


< 


< 


Shift 


Cyan 


Light Red 


High Intensity 


3D 


61 


= 


= 




Cyan 


Light 
Magenta 


High Intensity 


3E 


62 


> 


> 


Shift 


Cyan 


Yellow 


High Intensity 


3F 


63 


? 


? 


Shift 


Cyan 


White 


High Intensity 


40 


64 


@ 


@ 


Shift 


Red 


Black 


Normal 


41 


65 


A 


A 


Note 4 


Red 


Blue 


Underline 


42 


66 


B 


B 


Note 4 


Red 


Green 


Normal 


43 


67 


C 


C 


Note 4 


Red 


Cyan 


Normal 


44 


68 


D 


D 


Note 4 


Red 


Red 


Normal 


45 


69 


E 


E 


Note 4 


Red 


Magenta 


Normal 


46 


70 


F 


F 


Note 4 


Red 


Brown 


Normal 


47 


71 


G 


G 


Note 4 


Red 


Light Grey 


Normal 


48 


72 


H 


H 


Note 4 


Red 


Dark Grey 


High Intensity 


49 


73 


1 


1 


Note 4 


Red 


Light Blue 


High Intensity 
Underline 


4A 


74 


J 


J 


Note 4 


Red 


Light Green 


High Intensity 



Characters, Keystrokes, and Color 7-5 







As Characters 


As Text Attributes 


Value 


Color/Graphics 
Monitor Adapter 


IBM 

Monochrome 

Display 

Adapter 


Hex 


Dec 


Symbol 


Keystrokes 


Modes 


Background 


Foreground 


4B 


75 


K 


K 


Note 4 


Red 


Light Cyan 


High Intensity 


4C 


76 


L 


L 


Note 4 


Red 


Light Red 


High Intensity 


4D 


77 


M 


M 


Note 4 


Red 


Light 
Magenta 


High Intensity 


4E 


78 


N 


N 


Note 4 


Red 


Yellow 


High Intensity 


4F 


79 








Note 4 


Red 


White 


High Intensity 


50 


80 


P 


P 


Note 4 


Magenta 


Black 


Normal 


51 


81 


Q 


Q 


Note 4 


Magenta 


Blue 


Underline 


52 


82 


R 


R 


Note 4 


Magenta 


Green 


Normal 


53 


83 


S 


S 


Note 4 


Magenta 


Cyan 


Normal 


54 


84 


T 


T 


Note 4 


Magenta 


Red 


Normal 


55 


85 


U 


U 


Note 4 


Magenta 


Magenta 


Normal 


56 


86 


V 


V 


Note 4 


Magenta 


Brown 


Normal 


57 


87 


w 


w 


Note 4 


Magenta 


Light Grey 


Normal 


58 


88 


X 


X 


Note 4 


Magenta 


Dark Grey 


High Intensity 


59 


89 


Y 


Y 


Note 4 


Magenta 


Light Blue 


High Intensity 
Underline 


5A 


90 


z 


Z 


Note 4 


Magenta 


Light Green 


High Intensity 


5B 


91 


[ 


[ 




Magenta 


Light Cyan 


High Intensity 


5C 


92 


\ 


\ 




Magenta 


Light Red 


High Intensity 


5D 


93 


] 


1 




Magenta 


Light 
Magenta 


High Intensity 


5E 


94 


/\ 


/\ 


Shift 


Magenta 


Yellow 


High Intensity 


5F 


95 


— 


— 


Shift 


Magenta 


White 


High Intensity 


60 


96 








Yellow 


Black 


Normal 


61 


97 


a 


a 


Note 5 


Yellow 


Blue 


Underline 


62 


98 


b 


b 


Note 5 


Yellow 


Green 


Normal 


63 


99 


c 


c 


Note 5 


Yellow 


Cyan 


Normal 


64 


100 


d 


d 


Note 5 


Yellow 


Red 


Normal 


65 


101 


e 


e 


Note 5 


Yellow 


Magenta 


Normal 


66 


102 


f 


f 


Note 5 


Yellow 


Brown 


Normal 



7-6 Characters, Keystrokes, and Color 







As Characters 


As Text Attributes | 


Value 


Color/Graphics 
Monitor Adapter 


IBM 

Monochrome 

Display 

Adapter 


Hex 


Dec 


Symbol 


Keystrokes 


Modes 


Background 


Foreground 


67 


103 


g 


9 


Note 5 


Yellow 


Light Grey 


Normal 


68 


104 


h 


h 


Note 5 


Yellow 


Dark Grey 


High Intensity 


69 


105 


i 


i 


Note 5 


Yellow 


Light Blue 


High Intensity 
Underline 


6A 


106 


J 


J 


Note 5 


Yellow 


Light Green 


High Intensity 


6B 


107 


k 


k 


Note 5 


Yellow 


Light Cyan 


High Intensity 


6C 


108 


1 


1 


Note 5 


Yellow 


Light Red 


High Intensity 


6D 


109 


m 


m 


Note 5 


Yellow 


Light 
Magenta 


High Intensity 


6E 


110 


n 


n 


Notes 


Yellow 


Yellow 


High Intensity 


6F 


111 





o 


Note 5 


Yellow 


White 


High Intensity 


70 


112 


P 


P 


Note 5 


White 


Black 


Reverse Video 


71 


113 


q 


q 


Note 5 


White 


Blue 


Underline 


72 


114 


r 


r 


Note 5 


White 


Green 


Normal 


73 


115 


s 


s 


Note 5 


White 


Cyan 


Normal 


74 


116 


f 


f 


Notes 


White 


Red 


Normal 


75 


117 


u 


u 


Note 5 


White 


Magenta 


Normal 


76 


118 


V 


V 


Note 5 


White 


Brown 


Normal 


77 


119 


w 


w 


Note 5 


White 


Light Grey 


Normal 


78 


120 


X 


X 


Note 5 


White 


Dark Grey 


Reverse Video 


79 


121 


y 


y 


Notes 


White 


Light Blue 


High Intensity 
Underline 


7A 


122 


z 


z 


Notes 


White 


Light Green 


High Intensity 


7B 


123 


{ 


{ 


Shift 


White 


Light Cyan 


High Intensity 


7C 


124 


1 
1 


1 

1 


Shift 


White 


Light Red 


High Intensity 


7D 


125 


} 


} 


Shift 


White 


Light 
Magenta 


High Intensity 


7E 


126 


~ 


~ 


Shift 


White 


Yellow 


High Intensity 


7F 


127 


A 


Ctrl - 




White 


White 


High Intensity 



Characters, Keystrokes, and Color 7-7 







As Characters 


As Text Attributes 


Value 


Color/Graphics 
Monitor Adapter 


IBM 

Monochrome 

Display 

Adapter 


Hex 


Dec 


Symbol 


Keystrokes 


Modes 


Background 


Foreground 


♦ » « * 


80 to FF Hex are Flashing in both Color & IBM Monochrome * * ♦ * 


80 


128 


c 


Alt 128 


Note 6 


Black 


Black 


Non-Display 


81 


129 


u 


Alt 129 


Note 6 


Black 


Blue 


Underline 


82 


130 


e 


Alt 1 30 


Note 6 


Black 


Green 


Normal 


83 


131 


a 


Alt 131 


Note 6 


Black 


Cyan 


Normal 


84 


132 


a 


Alt 132 


Note 6 


Black 


Red 


Normal 


85 


133 


a 


Alt 133 


Note 6 


Black 


Magenta 


Normal 


86 


134 


§ 


Alt 134 


Note 6 


Black 


Brown 


Normal 


87 


135 


Q 


Alt 135 


Note 6 


Black 


Light Grey 


Normal 


88 


136 


e 


Alt 1 36 


Note 6 


Black 


Dark Grey 


Non-Display 


89 


137 


e 


Alt 137 


Note 6 


Black 


Light Blue 


High Intensity 
Underline 


8A 


138 


e 


Alt 138 


Note 6 


Black 


Light Green 


High Intensity 


8B 


139 


' 


Alt 139 


Note 6 


Black 


Light Cyan 


High Intensity 


8C 


140 


T 


Alt 140 


Note 6 


Black 


Light Red 


High Intensity 


8D 


141 


1 


Alt 141 


Note 6 


Black , 


Light 
Magenta 


High Intensity 


8E 


142 


A 


Alt 142 


Note 6 


Black 


Yellow 


High Intensity 


8F 


143 


A 


Alt 1 43 


Note 6 


Black 


White 


High Intensity 


90 


144 


t 


Alt 144 


Note 6 


Blue 


Black 


Normal 


91 


145 


ae 


Alt 145 


Note 6 


Blue 


Blue 


Underline 


92 


146 


AE 


Alt 146 


Note 6 


Blue 


Green 


Normal 


93 


147 


6 


Alt 147 


Note 6 


Blue 


Cyan 


Normal 


94 


148 


6 


Alt 148 


Note 6 


Blue 


Red 


Normal 


95 


149 


6 


Alt 149 


Note 6 


Blue 


Magenta 


Normal 


96 


150 


u 


Alt 1 50 


Note 6 


Blue 


Brown 


Normal 


97 


151 


u 


Alt 151 


Note 6 


Blue 


Light Grey 


Normal 


98 


152 


y 


Alt 1 52 


Note 6 


Blue 


Dark Grey 


High Intensity 


99 


153 





Alt 1 53 


Note 6 


Blue 


Light Blue 


High Intensity 
Underline 


9A 


154 


LJ 


Alt 1 54 


Note 6 


Blue 


Light Green 


High Intensity 



7-8 Characters, Keystrokes, and Color 







As Characters 


As Text Attributes 


Value 


Color/Graphics 
Monitor Adapter 


IBM 

Monochrome 

Display 

Adapter 


Hex 


Dec 


Symbol 


Keystrokes 


Modes 


Background 


Foreground 


9B 


155 


C 


Alt 155 


Note 6 


Blue 


Light Cyan 


High Intensity 


9C 


156 


£ 


Alt 156 


Note 6 


Blue 


Light Red 


High Intensity 


9D 


157 


y 


Alt 1 57 


Note 6 


Blue 


Light 
Magenta 


High Intensity 


9E 


158 


Pt 


Alt 158 


Note 6 


Blue 


Yellow 


High Intensity 


9F 


159 


/ 


Alt 159 


Note 6 


Blue 


White 


High Intensity 


AO 


160 


a 


Alt 1 60 


Note 6 


Green 


Black 


Normal 


A1 


161 


i 


Alt 161 


Note 6 


Green 


Blue 


Underline 


A2 


162 


6 


Alt 162 


Note 6 


Green 


Green 


Normal 


A3 


163 


u 


Alt 163 


Note 6 


Green 


Cyan 


Normal 


A4 


164 


n 


Alt 164 


Note 6 


Green 


Red 


Normal 


A5 


165 


N 


Alt 165 


Note 6 


Green 


Magenta 


Normal 


A6 


166 


a. 


Alt 166 


Note 6 


Green 


Brown 


Normal 


fKl 


167 





Alt 167 


Note 6 


Green 


Light Grey 


Normal 


A8 


168 


I 


Alt 1 68 


Note 6 


Green 


Dark Grey 


High Intensity 


A9 


169 




Alt 169 


Note 6 


Green 


Light Blue 


High Intensity 
Underline 


AA 


170 




Alt 1 70 


Note 6 


Green 


Light Green 


High Intensity 


AB 


171 


y? 


Alt 171 


Note 6 


Green 


Light Cyan 


High Intensity 


AC 


172 


'A 


Alt 1 72 


Note 6 


Green 


Light Red 


High Intensity 


AD 


173 


\ 


Alt 173 


Note 6 


Green 


Light 
Magenta 


High Intensity 


AE 


174 


« 


Alt 1 74 


Note 6 


Green 


Yellow 


High Intensity 


AF 


175 


» 


Alt 175 


Note 6 


Green 


White 


High Intensity 


BO 


176 


\l\ 


Alt 176 


Note 6 


Cyan 


Black 


Normal 


B1 


177 


i 


Alt 177 


Note 6 


Cyan 


Blue 


Underline 


B2 


178 


1 


Alt 178 


Note 6 


Cyan 


Green 


Normal 


B3 


179 






Alt 1 79 


Note 6 


Cyan 


Cyan 


Normal 


B4 


180 






Alt 1 80 


Note 6 


Cyan 


Red 


Normal 


B5 


181 






Alt 181 


Note 6 


Cyan 


Magenta 


Normal 


B6 


182 






Alt 182 


Note 6 


Cyan 


Brown 


Normal 



Characters, Keystrokes, and Color 7-9 







As Characters 


As Text Attributes 


Value 


Color/Graphics 
Monitor Adapter 


IBM 

Monochrome 

Display 

Adapter 


Hex 


Dec 


Symbol 


Keystrokes 


Modes 


Background 


Foreground 


B7 


183 




Alt 183 


Note 6 


Cyan 


Light Grey 


Normal 


II 


B8 


184 






Alt 1 84 


Note 6 


Cyan 


Dark Grey 


High Intensity 




B9 


185 






Alt 185 


Note 6 


Cyan 


Light Blue 


High Intensity 
Underline 


BA 


186 






Alt 186 


Note 6 


Cyan 


Light Green 


High Intensity 


BB 


187 




Alt 187 


Note 6 


Cyan 


Light Cyan 


High Intensity 






BC 


188 






Alt 188 


Note 6 


Cyan 


Light Red 


High Intensity 




BD 


189 






Alt 189 


Note 6 


Cyan 


Light 
Magenta 


High Intensity 




BE 


190 




Alt 190 


Note 6 


Cyan 


Yellow 


High Intensity 


BF 


191 






Alt 191 


Note 6 


Cyan 


White 


High Intensity 


CO 


192 






Alt 192 


Note 6 


Red 


Black 


Normal 




CI 


193 


1 


Alt 193 


Note 6 


Red 


Blue 


Underline 




C2 


194 




Alt 194 


Note 6 


Red 


Green 


Normal 






C3 


195 






Alt 195 


Note 6 


Red 


Cyan 


Normal 




C4 


196 




Alt 196 


Note 6 


Red 


Red 


Normal 




C5 


197 






Alt 197 


Note 6 


Red 


Magenta 


Normal 






C6 


198 






Alt 198 


Note 6 


Red 


Brown 


Normal 






C7 


199 






Alt 199 


Note 6 


Red 


Light Grey 


Normal 




C8 


200 






Alt 200 


Note 6 


Red 


Dark Grey 


High Intensity 






C9 


201 




Alt 201 


Note 6 


Red 


Light Blue 


High Intensity 
Underline 








CA 


202 






Alt 202 


Note 6 


Red 


Light Green 


High Intensity 






CB 


203 




Alt 203 


Note 6 


Red 


Light Cyan 


High Intensity 






CC 


204 




1 - 


Alt 204 


Note 6 


Red 


Light Red 


High Intensity 


CD 


205 




Alt 205 


Note 6 


Red 


Light 
Magenta 


High Intensity 






CE 


206 


1 1 
1 1 


Alt 206 


Note 6 


Red 


Yellow 


High Intensity 


CF 


207 


1 


Alt 207 


Note 6 


Red 


White 


High Intensity 






DO 


208 




Alt 208 


Note 6 


Magenta 


Black 


Normal 





7-10 Characters, Keystrokes, and Color 







As Characters 


As Text Attributes 


Value 


Color/Graphics 
Monitor Adapter 


IBM 

Monochrome 

Display 

Adapter 


Hex 


Dec 


Symbol 


Keystrokes 


Modes 


Background 


Foreground 


D1 


209 




Alt 209 


Note 6 


Magenta 


Blue 


Underline 




1 


D2 


210 




Alt 210 


Note 6 


Magenta 


Green 


Normal 






D3 


211 






Alt 211 


Note 6 


Magenta 


Cyan 


Normal 




D4 


212 




. 


Alt 21 2 


Note 6 


Magenta 


Red 


Normal 






D5 


213 






Alt 213 


Note 6 


Magenta 


Magenta 


Normal 






D6 


214 




Alt 214 


Note 6 


Magenta 


Brown 


Normal 






D7 


215 






Alt 21 5 


Note 6 


Magenta 


Light Grey 


Normal 






D8 


216 






Alt 216 


Note 6 


Magenta 


Dark Grey 


High Intensity 










D9 


217 






Alt 217 


Note 6 


Magenta 


Light Blue 


High Intensity 
Underline 


DA 


218 


_i 




Alt 218 


Note 6 


Magenta 


Light Green 


High Intensity 




DB 


219 


; 


Alt 21 9 


Note 6 


Magenta 


Light Cyan 


High Intensity 


DC 


220 


Alt 220 


Note 6 


Magenta 


Light Red 


High Intensity 


DD 


221 


r 


Alt 221 


Note 6 


Magenta 


Light 
Magenta 


High Intensity 


DE 


222 




■ 


Alt 222 


Note 6 


Magenta 


Yellow 


High Intensity 


DF 


223 


■ 


■ 


Alt 223 


Note 6 


Magenta 


White 


High Intensity 


EO 


224 


Q 


Alt 22*4 


Note 6 


Yellow 


Black 


Normal 


Bl 


225 


P 


Alt 225 


Note 6 


Yellow 


Blue 


Underline 


E2 


226 


r 


Alt 226 


Note 6 


Yellow 


Green 


Normal 


E3 


227 


n 


Alt 227 


Note 6 


Yellow 


Cyan 


Normal 


E4 


228 


1 


Alt 228 


Note 6 


Yellow 


Red 


Normal 


E5 


229 


o 


Alt 229 


Note 6 


Yellow 


Magenta 


Normal 


E6 


230 


M 


Alt 230 


Note 6 


Yellow 


Brown 


Normal 


E7 


231 


r 


Alt 231 


Note 6 


Yellow 


Light Grey 


Normal 


E8 


232 


<l> 


Alt 232 


Note 6 


Yellow 


Dark Grey 


High Intensity 


E9 


233 


e 


Alt 233 


Note 6 


Yellow 


Light Blue 


High Intensity 
Underline 


EA 


234 


n 


Alt 234 


Note 6 


Yellow 


Light Green 


High Intensity 


EB 


235 


8 


Alt 235 


Note 6 


Yellow 


Light Cyan 


High Intensity 



Characters, Keystrokes, and Color 7-11 







As Characters 


As Text Attributes 


Value 


Color/Graphics 
Monitor Adapter 


IBM 

Monochrome 

Display 

Adapter 


Hex 


Dec 


Symbol 


Keystrokes 


Modes 


Background 


Foreground 


EC 


236 


oo 


Alt 236 


Note 6 


Yellow 


Light Red 


High Intensity 


ED 


237 


<!> 


Alt 237 


Note 6 


Yellow 


Light 
Magenta 


High Intensity 


EE 


238 


t 


Alt 238 


Note 6 


Yellow 


Yellow 


High Intensity 


EF 


239 


n 


Alt 239 


Note 6 


Yellow 


White 


High Intensity 


FO 


240 


= 


Alt 240 


Note 6 


White 


Black 


Reverse Video 


F1 


241 


± 


Alt 241 


Note 6 


White 


Blue 


Underline 


F2 


242 


> 


Alt 242 


Note 6 


White 


Green 


Normal 


F3 


243 


< 


Alt 243 


Note 6 


White 


Cyan 


Normal 


F4 


244 


p 


Alt 244 


Note 6 


White 


Red 


Normal 


F5 


245 


J 


Alt 245 


Note 6 


White 


Magenta 


Normal 


F6 


246 


-^ 


Alt 246 


Note 6 


White 


Brown 


Normal 


F7 


247 


- 


Alt 247 


Note 6 


White 


Light Grey 


Normal 


F8 


248 


O 


Alt 248 


Note 6 


White 


Dark Grey 


Reverse Video 


F9 


249 


• 


Alt 249 


Note 6 


White 


Light Blue 


High Intensity 
Underline 


FA 


250 


• 


Alt 250 


Note 6 


White 


Light Green 


High Intensity 


FB 


251 


v~ 


Alt 251 


Note 6 


White 


Light Cyan 


High Intensity 


FC 


252 


V 


Alt 252 


Note 6 


White 


Light Red 


High Intensity 


FD 


253 


2 


Alt 253 


Note 6 


White 


Light 
Magenta 


High Intensity 


FE 


254 


■ 


Alt 254 


Note 6 


White 


Yellow 


High Intensity 


FF 


255 


BLANK 


Alt 255 


Note 6 


White 

1 


White 


High Intensity 



7-12 Characters, Keystrokes, and Color 



NOTES 



1. Asterisk (*) can be typed using two methods: press the 
PrtSc key or, in the shift mode, press the 8 key. 

2. Period (.) can be typed using two methods: press the . key 
or, in the shift or Num Lock mode, press the Del key. 

3. Numeric characters 0-9 can be typed using two methods: 
press the numeric keys on the top row of the keyboard or, in 
the shift or Num Lock mode, press the numeric keys in the 
keypad portion of the keyboard. 

4. Uppercase alphabetic characters (A-Z) can be typed in two 
modes: the shift mode or the Caps Lock mode. 

5. Lowercase alphabetic characters (a-z) can be typed in two 
modes: in the normal mode or in Caps Lock and shift mode 
combined. 

6. The three digits after the Alt key must be typed from the 
numeric keypad. Character codes 0-255 may be entered in 
this fashion (with Caps Lock activated, character codes 
97-122 will display uppercase.) 



Characters, Keystrokes, and Color 7-13 



DECIMAL 
VALUE 








16 


32 


48 


64 


80 


96 


112 


* 


HEXA 

DECIMAL 

VALUE 





1 


2 


3 


4 


5 


6 


7 








BLANK 
(NULL) 


•► 


BLANK 
(SPACE) 





@ 


P 


4 


P 


1 


1 


© 


-* 


1 

■ 


1 


A 


Q 


a 


q 


2 


2 


9 


t 


1 1 


2 


B 


R 


b 


r 


3 


3 


V 


II 

■ ■ 


# 


3 


C 


S 


c 


s 


4 


4 


♦ 


e 


$ 


4 


D 


T 


d 


t 


5 


5 


♦ 


§ 


% 


5 


E 


U 


e 


u 


6 


6 


4 


- 


<^, 


6 


F 


V 


f 


V 


7 


7 


• 


1 


f 


7 


G 


w 


g 


w 


8 


8 D r 


( 


8 


H 


X 


h 


X 


9 


^-[^ 


i 


) 


9 


I 


Y 


• 

1 


y 


10 


A pn^ 


* 


• 
• 


J 


z 


• 

J 


2 


11 


B 


cf 


<- 


+ 


• 
5 


K 


[ 


k 


{ 


12 


C 


9 


1 


5 


< 


L 


\ 


1 


1 
1 


13 


D 


;> 


— 






M 


] 


111 


} 


14 


E 


^ 


▲ 


• 


> 


N 


A 


n 


a. 


15 


F 


* 


▼ 


/ 


9 

• 


O 




o 


A 



7-14 Characters, Keystrokes, and Color 





























1 


DECIMAL 
VALUE 





128 


144 


160 


176 


192 


208 


224 


240 


♦ 


HEXA 

DECIMAL 

VALUE 


8 


9 


A 


B 


C 


D 


E 


F 








Q 


t 


a 


• • • 

« • • 

• • ■ 

• • • 






1 


oc 








1 


1 


• • 

u 


ae 


1 








p 


+ 






1 




2 


2 


e 


JE 


O 


'5 


1 






r 


> 












3 


3 


A 

a 


A 

o 


u 










u — 


n 


< 




4 


4 


• • 

a 


• • 

o 


n 








U 


S 


r 




5 


5 


a 


o 


N 










h 


(7 


J 




6 


6 


o 

a 


A 

u 


a 














-H 


• 
• 




7 


7 


<? 


u 


o 


II 










r 


^ 












8 


8 


A 

e 


• • 

y 


• 

6 


-1 










§ 


o 














9 


9 


• • 

e 


• • 

o 


1 














e 


• 




10 


A 


e 


• • 

u 


1 












n 


• 




11 


B 


• • 

1 


c 


Vi 






. 


r^ ^ 


>r" 




12 


C 


t 


£ 


Va 








=^ 


■i 


OO 


n 




13 


D 


1 


¥ 


• 




- 




r 


* 


2 




14 


E 


• • 

A 


Pt 


« 






Ij 


J 


G 


1 




15 


F 


o 

A 


f 


» 




1 


F 


■ 


n 


BLANK 
FF 





Characters, Keystrokes, and Color 7-15 



Notes: 



7-16 Characters, Keystrokes, and Color 



SECTION 8. COMMUNICATIONS 



Contents 

Communications 8-3 

Establishing a Data Link 8-6 



Communications 8-1 



Notes: 



8-2 Communications 



Communications 



Information-processing equipment used for communication is 
called data terminal equipment (DTE.) Equipment used to 
connect the DTE to the communication line is called data 
communication equipment (DCE.) 

An adapter connects the data terminal equipment to the data 
communication line as shown in the following figure: 



Data 

Terminal 

Equipment 



EIA/CCITT 
Adapter 



Data 

Communications 

Equipment 



Communications 
Line 




Voice Line 



Cable Conforming to EIA 
or CCITT Standards 



The EIA/CCITT adapter allows the DTE to be connected to the 
DCE using EIA or CCITT standardized connections. An external 
modem is shown in the figure; however, other types of DCE also 
can be connected to the DTE using EIA or CCITT standardized 
connections. 

EIA standards are labeled RS-x (recommended standards-x), and 
CCITT standards are labeled V.x or X.x, where x is the number 
of the standard. 

The EIA RS-232 interface standard defines the connector type, 
pin numbers, hne names, and signal levels used to connect data 
terminal equipment to data communications equipment for the 
purpose of transmitting and receiving data. Since the RS-232 
standard was developed, it has been revised three times. The 
three revised standards are RS-232A, RS-232B, and the presently 
used RS-232C. 

The CCITT V.24 interface standard is equivalent to the RS-232C 
standard; therefore, the descriptions of the EIA standards also 
apply to the CCITT standards. 



Communications 8-3 



The following is an illustration of data terminal equipment 
connected to an external modem using connections defined by the 
RS-232C interface standard: 



Data 

Terminal 

Equipment 



Data 

Communications 

Equipment 



Communications 
Line 




Adapter 



Cable Conforming 

To RS-232C Standards 



-^ Data Set Ready 



^EIA/CCITT 
Line Number 

— Protective Ground ■ 

— Signal Ground 



Telephone Co. 
Lead Number 



-Transmitted Data 
- Received Data — 



- Request to Send 

- Clear to Send — 



-(?)— AA/101- 
-(7) — AB/102- 
-(2)— BA/103- 
-(3)— BB/104- 
-(4)— CA/105- 
"{T)— CB/106 
-CC/107 



— Data Terminal Ready ■ 



— Connect Data Set to Line 

-*- Received Line Signal Detector 

— Speed Select 



CD/108. 2 
-^) — **/108.1 - 
-(J) — CF/109 — 
-(^) — CH/111 — 
-*- Transmit Signal Element Timing -(ib) — DB/1 14 — 
-*- Receive Signal Element Timing — n t)— - DD/1 1 5 — 

— Select Standby rtl) — **/l 1 6 

-^ Ring Indicator (22) — DE/125 — 

— Test 



-(is)— **/*** 



Modem 



External Modem Cable Connector 
1312 11 10 9 8 7 6 5 4 3 2 



I 



1 



0000000000000 

000000000000 

25 24 23 22 21 20 1918 1716 15 14 



1 



h- 



Data Terminal 
Equipment 



(Modem) DCE 
-Data Communications 
Equipment 



H 



Pin Number 



^Not used when business machine clocking is used. 
*^Not standardized by EIA (Electronics industry Association). 
***Not standardized by CCITT 



8-4 Communications 



Establishing a Data Link 



The following bar graphs represent normal timing sequences of 
operation during the establishment of communication for both 
switched (dial-up) and nonswitched (direct line) networks. 



Switched Timing Sequence 
Data Terminal Ready 
Data Set Ready 
Request to Send 
Clear to Send 
Transmitted Data 

Nonswitched Timing Seque 
Data Terminal Ready 
Data Terminal Ready 
Request to Send 
Clear to Send 
Transmitted Data 






1 




1 






1 


1 






1 


1 






1 




jnce 




1 




1 






1 


1 






1 


I 




1 


\ 







The following examples show how a Unk is established on a 
nonswitched point-to-point line, a nonswitched multipoint line, 
and a switched point-to-point line. 



Communications 8-5 



00 

I 

ON 

o 



n 



Establishing a Link on a Nonswitched Point-to-Point Line 



1 . The terminals at both locations activate the 'data terminal ready' 
linesQandQ. 

2. Normally the 'data set ready' linesHandB|from the modems are 
active whenever the modems are powered on. 

3. Terminal A activates the 'request to send' lineH, which causes 
the modem at terminal A to generate a carrier signal. 

4. Modem B detects the carrier, and activates the 'received line 
signal detector' line (sometimes called data carrier detect)]^. 
Modem B also activates the 'receiver signal element timing' line 
(sometimes called receive clock)Bjto send receive clock signals to 
the terminal. Some modems activate the clock signals whenever 
the modem is powered on. 

5. After a specified delay, modem A activates the 'clear to send' line 
Q, which indicates to terminal A that the modem is ready to 
transmit data. 

6. Terminal A serializes the data to be transmitted (through the 
serdes) and transmits the data one bit at a time (synchronized by 
the transmit clock) onto the 'transmitted data' lineUto the 
modem. 

7. The modem modulates the carrier signal with the data and 
transmits it to the modem B0. 

8. Modem B demodulates the data from the carrier signal and sends 
it to terminal B on the 'received data' line|2. 

9. Terminal B deserializes the data (through the serdes) using the 
receive clock signals (on the 'receiver signal element timing' line) 
mfrom the modem. 

1 0. After terminal A completes its transmission, it deactivates the 
'request to send' lineH, which causes the modem to turn off the 
carrier and deactivate the 'clear to send' lineHI. 



1 1 . Terminal A and modem A now become receivers and wait for a 
response from terminal B, indicating that all data has reached 
terminal B. Modem A begins an echo delay (50 to 1 50 
milliseconds) to ensure that all echoes on the line have diminished 
before it begins receiving. An echo is a reflection of the 
transmitted signal. If the transmitting modem changed to receive 
too soon, it could receive a reflection (echo) of the signal it just 
transmitted. 

12. Modem B deactivates the 'received line signal detector' line|3and, 
if necessary, deactivates the receive clock signals on the 'receiver 
signal element timing, lineH. 

1 3. Terminal B now becomes the transmitter to respond to the request 
from terminal A. To transmit data, terminal B activates the 
'request to send' linej^, which causes modem B to transmit a 
carrier to modem A. 

14. Modem B begins a delay that is longer than the echo delay at 
modem A before turning on the 'clear to send' line. The longer 
delay (called request-to-send to clear-to-send delay) ensures that 
modem A is ready to receive when terminal B begins transmitting 
data. After the delay, modem B activates the 'clear to send' lineHI 
to indicate that terminal B can begin transmitting its response. 

1 5. After the echo delay at modem A, modem A senses the carrier 

from modem B (the carrier was activated in step 13 when terminal 
B activated the 'request to send' line) and activates the 'received 
line signal detector' lineHto terminal A. 

1 6. Modem A and terminal A are now ready to receive the response 
from terminal B. Remember, the response was not transmitted 
until after the request-to-send to clear-to-send delay at modem B 
(step 14). 



o 



I 

00 



Terminal A 

(Communications 
Adapter 



Li: 



II 
II 



D 

Data Terminal Ready 



Data Set Ready Q 

^ ^ 

Request to SendKl 

— n 

'I n 

Clear to Send U 

— n 

11 
It 
II 

Transmitter Signal 
Element Timing 



Transmitted 
Data 



II 
Received Line 
Signal Detector 



D 



Receiver Signal 
Element Timing 



II 
Received Data 



Power I 
Supply I 



X 

' D 



Carrier 
Generate 



Transmit |- 
Circuits 



t 



LLJ 



~?I. 



Modem | 
Clock I 



LJ 



Echo 

Delay 1 'v> 

r 



Receive 

Circuits 



Modem I 
Clock I 



Demodulator 



II 

±1 



Communications 
Line 



Terminal B 

I I Communications 



Supply I 



Data Terminal Ready 



;;: 



Receive |_ 
Circuits I 



Modem |_ 



II 



Adapter 



Data Set ReadyQ 

n— 



Received Line 
Signal Detector iB 



Receiver Signal 
Element TimingHl 



Demodulator 



f-4 



Echo 
Delay 



Carrier 
Generate 



Transmi 
Circuits 



7F 



I 1 

I Modem i- 
I Clock ] 



1| 
Received 
Data M 



II 
II 

II 
Request to SendH 



II 
Clear to Send | 



ED 



II 

Transmitter Signal 
Element Timing 



II 
II 
II 
II 
II 

II 
Transmitted Date 



Ih- 



s !- 



8 N0I133S 



00 

n 

o 



o 



Establishing a Link on a Nonswitched Multipoint Line 



5. 



The control station serializes the address for the tributary or 
secondary station (AA) and sends its address to the modem on the 
'transmitted data' linem. 

Since the 'request to send' line and, therefore, the modem carrier, 
is active continuouslyH, the modem immediately modulates the 
carrier with the address, and, thus, the address is transmitted to all 
modems on the line. 

All tributary modems, including the modem for station A, 
demodulate the address and send it to their terminals on the 
'received data' linefl. 

Only station A responds to the address; the other stations ignore 
the address and continue monitoring their 'received data' line. To 
respond to the poll, station A activates its 'request to send' lineQ 
which causes the modem to begin transmitting a carrier signal. 

The control station's modem receives the carrier and activates the 
'received line signal detector' line jjand the 'receiver signal 
element timing' lineH(to send clock signals to the control 
station). Some modems activate the clock signals as soon as they 
are powered on. 



9. 



10. 



After a short delay to allow the control station modem to receive 
the carrier, the tributary modem activates the 'clear to send' line 

p. 

When station A detects the active 'clear to send' line, it tansmits 
its response. (For this example, assume that station A has no data 
to send; therefore, it transmits an EOT|j|.) 

After transmitting the EOT, station A deactivates the 'request to 
send' lineQ. This causes the modem to deactivate the carrier and 
the 'clear to send' line Q. 

When the modem at the control station (host) detects the absence 
of the carrier, it deactivates the 'received line signal detector' line 

B. 

Tributary station A is now in receive mode waiting for the next 
poll or select transmission from the control station. 



n 

q 



o 



00 

I 



Host 



^ 



Communications I I 
Adapter 



II 



l± 



r— T 
c 



L_j 



s 



II 

Data Terminal 
Ready'' 

n 

Data Set Ready' 



Host Modem 



-rr 



Request to Send^D 



I I 
Clear to Sendi 

— n 



Transmitter Signal 
Element Timingi 



Transmitted Data 



II 
Bii 



Received Line Signal 
Detector 



Receiver Signal 
Element Timing 1 



II 
II 
II 
II 

II 
Received Data 



I Power 
I On 



7I 



Modem | 
Clock I 



-i Modem I 
I Clock I 



I Demodulator 



II 



'These lines are active continuously. 



Communications 
Line 



Tributary or Secondary Station A 



I 1 

I Power I 



J Receiver j" 



Modem |_ 
Clock I 



I Carrier p* — r 

I Generate u |-^t 



I « 



I Moderr 
I Clock 



Received Line Signal 
Detector 1 



Terminal 

II 

II 

Data Terminal 
Ready^ | I 

" n— 

Data Set Ready 1 

n — 



Communication: 
Adapter 



■^ 



Receiver Signal 
Element Timingi 



Received Data 



II 
D II 

Request to Send 



a II 

Clear to Send 



Transmitter Signal 
Element Timing 



II 

M 
II 
D II 

Transmitted Data 



I 1 



8 N0liD3S 



00 



Establishing a Link on a Switched Point-To-Point Line 



n 

o 



o 



Terminal A is in communications mode; therefore, the 'data 
terminal ready' MneQis active. Terminal B is in communication 
mode waiting for a call from terminal A. 

When the terminal A operator lifts the telephone handset, the 
'switch hook' line from the coupler is activated^. 

Modem A detects the 'switch hook' line and activates the 'off 
hook' lineH, which causes the coupler to connect the telephone 
set to the line and activate the 'coupler cut-through' lineHto the 
modem. 

Modem A activates the 'data modem ready' lineHto the coupler 
(the 'data modem ready' line is on continuously in some modems). 

The terminal A operator sets the exclusion key or talk/data switch 
to the talk position to connect the handset to the communications 
line. The operator then dials the terminal B number. 

When the telephone at terminal B rings, the coupler activates the 
'ring indicate' line to modem b|0. Modem B indicates that the 
'ring indicate' line was activated by activating the 'ring indicator' 
linefflto terminal B. 

Terminal B activates the 'data terminal ready' line to modem Bjy, 
which activates the autoanswer circuits in modem B. (The 'data 
terminal ready' line might already be active in some terminals.) 



8. The autoanswer circuits in modem B activate the 'off hook' line to 
the couplerQj. 

9. The coupler connects modem B to the communications line through 
the 'data tip' and 'data ring' lines|yand activates the 'coupler cut- 
through' line^to the modem. Modem B then transmits an 
answer tone to terminal A. 

1 0. The terminal A operator hears the tone and sets the exclusion key 
or talk/data switch to the data position (or performs an equivalent 
operation) to connect modem A to the communications line 
through the 'data tip' and 'data ring' lines'. 

1 1 . The coupler at terminal A deactivates the 'switch hook' lineQ. 
This causes modem A to activate the 'data set ready' lineQ 
indicating to terminal A that the modem is connected to the 
communications line. 

The sequence of the remaining steps to establish the data link is 
the same as the sequence required on a nonswitched point-to- 
point line. When the terminals have completed their transmission, 
they both deactivate the 'data terminal ready' line to disconnect 
the modems from the line. 



Terminal A 

r7 = = = = = = T 

Communications I 
Adapter 



n 

o 



a 

o 



00 



o I 

nU 

tl 



rh 



L_!J 



r 1 

IS I 

-H ^ I 

IS e I 



:* Li: 



Data Terminal 

Ready 

Data Set | 



Ready 

Request to Send 



Clear to Send 



Transmit Data 



II 
II 
II 
II 
Transmit Clock 



I Carrier j 
I Generate I 



r 1 

M 



II 



|c' 
Ih a 
jo m 

L_Pj 



Modem | 
Clock ! 



CBS 

Coupler 



(SH) 
Off Hook (OH)^^ 



Q 



Switch Hook 



Coupler 



D 



Cut-Through 
(CCT) 



Data Modem' 



m 



Ready (DA) 



Data Tip (DT) 



Data 



Data Ring (DR) 



CBS 

Coupler 



w 



L_J 



Communications 
Line 



Switch Hook 



(SH) 
Off Hook 



70H) 
Coupler 



Cut-Through 
(CCT) 
^Data Modem 



Ready (DA) 
Ring 



CD 



Indicate (R) 
Data Tip (DT)" 



Data 



Data Ring (DR) 




Answer | 
Tone ! 



le 
Im 
!o 



I Modem | 
I Clock ! 



-L_J 



Terminal B 

(?== = 

II 

II 

II 



Communications 
Adapter 



Data Terminal 



^Ready "^^ 
Data Set Ready 



Received Line 
Signal Detector 



Ring Indicator! 



8 N0I133S 



Received Data 



Receive Clock 



M 
It: 



"1 I 

I o I 
-U n I 



I o 
1 I 



e I- 
I , H 

I e U 
I si- 

y 



Notes: 



8-12 Communications 



SECTION 9. IBM PERSONAL 
COMPUTER COMPATIBILITY 



Contents 

Hardware Considerations 9-3 

System Board 9-3 

20Mb Fixed Disk Drive 9-4 

High Capacity Diskette Drive 9-4 

Adapters 9-4 

Keyboard 9-4 

The IBM Personal Computer AT Does Not Support 9-5 

Application Guidelines 9-5 

High-Level Language Considerations 9-5 

Assembler Language Programming Considerations 9-6 

Multi-tasking Provisions 9-11 

Interfaces 9-11 

Classes 9-13 

Timeouts 9-15 

SYS REQ Key 9-15 

Subsystem Structure 9-15 

Subsystem Startup and Lockout 9-16 

SYS REQ Key Functions 9-17 

SYS Key Interfaces 9-18 

Copy Protection 9-22 

Bypassing BIOS 9-22 

Diskette Drive Differences 9-22 

Write Current 9-23 

Machine-Sensitive Code 9-23 



Compatibility 9-1 



Notes: 



9-2 Compatibility 



This section shows the differences between the IBM Personal 
Computer AT and the rest of the IBM Personal Computer family. 
It also contains information necessary to design hardware and 
programs that will be compatible with all IBM Personal 
Computers. 



Hardware Considerations 



In order to design compatible hardware or programs, hardware 
differences between the IBM Personal Computers must be 
considered. The following are hardware features of the IBM 
Personal Computer AT that are not supported by the rest of the 
IBM Personal Computer Family. 



System Board 

The IBM Personal Computer AT system board uses an Intel 
80286 microprocessor which is generally compatible with the 
Intel 8088 microprocessor used in the rest of the IBM Personal 
Computers. Programming considerations because of the faster 
processing capability of the 80286 are discussed later in 
" AppUcation Guidelines. ' ' 

The system board expansion slots in the IBM Personal Computer 
AT have a 36-pin connector in addition to the 62-pin connector. 
Adapters designed to make use of the 36-pin connector are not 
compatible with the rest of the IBM Personal Computers. 

On the I/O channel: 

• The system clock signal should only be used for 
synchronization and not for applications requiring a fixed 
frequency. 

• The 14.31818 MHz oscillator is not synchronous with the 
system clock. 

• ' ALE ' is activated during DMA cycles. 



Compatibility 9-3 



• The ' I/O write ' signal is not active during refresh cycles. 

• Pin B04 supports IRQ 9. 

20Mb Fixed Disk Drive 

The fixed disk drive used in the IBM Personal Computer AT can 
store up to 20Mb of data. Reading from and writing to this drive 
is initiated in the same way as with the Personal Computer XT; 
however, the IBM Personal Computer AT Fixed Disk and 
Diskette Drive Adapter may be addressed from different BIOS 
locations. 

High Capacity Diskette Drive 

This diskette drive is capable of reading and writing diskettes in 
160/ 180Kb, 320/360Kb, and 1.2Mb mode. However, if a 
diskette, formatted in either the 160/ 180Kb or 320/360Kb mode 
is written on by this diskette drive, that information may only be 
read by a high capacity diskette drive. 

Note: Diskettes, designed for use in this drive, in the 1.2Mb 
mode may not be used in either a 160/ 180Kb or a 
320/360Kb diskette drive. 



Adapters 

The IBM Personal Computer AT 128KB Memory Expansion 
Option, the IBM Personal Computer AT 512KB Memory 
Expansion Option, the IBM Personal Computer AT Prototype 
Adapter, and the IBM Personal Computer AT Fixed Disk and 
Diskette Drive Adapter use the additional 36 pin system board 
expansion slot and are not compatible with the rest of the IBM 
Personal Computer Family. 



Keyboard 



9-4 Compatibility 



The IBM Personal Computer AT Keyboard is an 84-key unit that 
can perform all functions of the other IBM Personal Computer 
keyboards, but is not plug-compatible with any of the other 
keyboards. 



The IBM Personal Computer AT Does Not 
Support 

Expansion Unit 

IBM Asynchronous Communications Adapter 

IBM 64/25 6KB Memory Expansion Adapter 

IBM Printer Adapter 

Other keyboards 



Application Guidelines 



The following information should be used to develop application 
programs for the IBM Personal Computer family. 



High-Level Language Considerations 

The IBM-supported languages of BASIC, FORTRAN, COBAL, 
Pascal, and APL are the best choices for writing compatible 
programs. 

If a program uses specific features of the hardware, that program 
may not be compatible with all IBM Personal Computers. 
Specifically, the use of assembler language subroutines or 
hardware-specific commands (In, Out, Peek, Poke, ...) must 
follow the assembler language rules (see "Assembler Language 
Programming"). 



Compatibility 9-5 



Any program that requires precise timing information should 
obtain it through a DOS or language interface; for example, 
TIMES in BASIC. If greater precision is required, the assembler 
techniques in "Assembly Language Programming" are available. 
The use of programming loops may prevent a program from being 
compatible with other IBM Personal Computers. 



Assembler Language Programming 
Considerations 

The following OP codes work differently on the IBM Personal 
Computer AT than they do on other IBM Personal Computers. 

• If the system microprocessor executes a POPF instruction in 
either the real or the virtual address mode with CPL<IOPL, 
then a pending maskable interrupt (the INTR pin active) may 
be improperly recognized after executing the POPF 
instruction even if maskable interrupts were disabled before 
the POPF instruction and the value popped had IF=0. If the 
interrupt is improperly recognized, the interrupt is still 
correctly executed. This errata has no effect when interrupts 
are enabled in either real or virtual address mode. This errata 
has no effect in the virtual address mode when CPL>IOPL. 

The POPF instruction may be simulated with the following 
code macro: 

POPFF Macro ;use POPFF instead of POPF 

; simulate popping flags 
;using IRET 

EBOl JMF$+3 ; jump around IRET 

CF IRET ;POP CS, IP, flags 

OE PUSH CS ;push CS 

E8 FB FF CALL $-2 ;CALL within segment 

;program will continue here 



9-6 Compatibility 



• PUSH SP pushes the current stack pointer. The 
microprocessor used in the IBM Personal Computer and the 
IBM Personal Computer XT pushes the new stack pointer. 

• Single step interrupt (when TF= 1) does not occur on the 
interrupt instruction (OP code hex CC,CD). The 
microprocessor in the IBM Personal Computer and the IBM 
Personal Computer XT does interrupt on the INT instruction. 

• The divide error exception (interrupt 0) pushes the CS:IP of 
the instruction, causing the exception. The IBM Personal 
Computer and the IBM Personal Computer XT push the 
CS:IP following the instruction, causing the exception. 

• Shift counts are masked to 5 bits. Shift counts greater than 3 1 
are treated mod 32, that is, a shift count of 36 shifts the 
operand 4 places. 

Assembler language programs should perform all I/O operations 
through ROM BIOS or DOS function calls. 

• Program interrupts are used for access to these functions. 
This practice removes the absolute addressing from the 
program. Only the interrupt number is required. 

• The math coprocessor detects six different exception 
conditions that can occur during instruction execution. If the 
appropriate exception mask within the coprocessor is not set, 
the coprocessor sets its error signal. This error signal 
generates a hardware interrupt (interrupt 13) and causes the 

' BUSY ' signal to the coprocessor to be held in the busy 
state. The 'BUSY' signal may be cleared by an 8-bit I/O 
Write command to address hex FO with DO through D7 equal 
toO. 

The power-on-self test code in the system ROM enables 
hardware interrupt 13 and sets up its vector to point to a 
routine in ROM. The ROM routine clears the ' BUSY ' 
signal's latch and then transfers control to the address pointed 
to by the NMI interrupt vector. This allows code written for 
any IBM Personal Computer to work on an IBM Personal 
Computer AT. The NMI interrupt handler should read the 
coprocessor's status to determine if the NMI was caused by 



Compatibility 9-7 



the coprocessor. If the interrupt was not generated by the 
coprocessor, control should be passed to the original NMI 
interrupt handler. 

Back to back I/O commands to the same I/O ports will not 
permit enough recovery time for I/O chips. To insure enough 
time, a JMP SHORT $+2 must be inserted between IN/OUT 
instructions to the same I/O chip. 

Note: MOV AL,AH type instruction does not allow 
enough recovery time. An example of the correct 
procedure follows: 

OUT IO_ADD,AL 

JMP SHORT $+2 

MOV AL,AH 

OUT IO_ADD,AL 

In the IBM Personal Computer AT IRQ 9 is redirected to INT 
hex OA (hardware IRQ 2). This insures that hardware 
designed to use IRQ 2 will operate in the IBM Personal 
Computer AT. 

The system can mask hardware sensitivity. New devices can 
change the ROM BIOS to accept the same programming 
interface on the new device. 

In cases where BIOS provides parameter tables, such as for 
video or diskette, a program may substitute new parameter 
values by building a new copy of the table and changing the 
vector to point to that table. However, the program should 
copy the current table, using the current vector, and then 
modify those locations in the table that need to be changed. 
In this way, the program will not inadvertently change any 
values that should be left the same. 

Disk Base consists of 1 1 parameters required for diskette 

operation. They are pointed at by the data variable. 

Disk Pointer, at absolute address 0:78. It is strongly 

recommended that the values suppUed in ROM be used. If it 



9-8 Compatibility 



becomes necessary to modify any of the parameters, build 
another parameter block and modify the address in 
Disk-Pointer to point to the new block. The parameters were 
estabhshed to operate both the High Capacity Diskette Drive 
and the Double Sided Diskette Drive. Three of the parameters 
in this table are under control of BIOS in the following 
situations. The Gap Length Parameter is no longer retrieved 
from the parameter block. Gap length used during diskette 
read, write, and verify operations is derived from within 
diskette BIOS. Gap length for format operations is still 
obtained from the parameter block. Special considerations are 
required for formatting operations. See the prologue of 
Diskette BIOS for the required details. If a parameter block 
contains a head settle time parameter value of milliseconds, 
and a write operation is being performed, at least 15 
milliseconds of head settle time will be enforced for a High 
Capacity Diskette Drive and 20 milliseconds will be enforced 
for a Double Sided Diskette Drive. If a parameter block 
contains a motor start wait parameter of less than 1 second for 
a write or format operation or 625 milliseconds for a read or 
verify operation. Diskette BIOS will enforce those times Usted 
above. 

• The following procedure is used to determine the type of 
media inserted in the High Capacity Diskette Drive: 

1. Read Track 0, Head 0, Sector 1 to allow diskette BIOS to 
establish the media/drive combination. If this is 
successful, continue with the next step. 

2. Read Track 0, Sector 15. If an error occurs, a double 
sided diskette is in the drive. If a successful read occurs, a 
high capacity diskette is in the drive. 

3. If Step 1 fails, issue the reset function (AH=0) to diskette 
BIOS and retry. If a successful read cannot be done, the 
media needs to be formatted or is defective. 

ROM BIOS and DOS do not provide for all functions. The 
following are the allowable I/O operations with which IBM will 
maintain compatibiUty in future systems. 



Compatibility 9-9 



• Control of the sound using port hex 61, and the sound channel 
of the timer/counter. A program can control timer/counter 
channels and 2, ports hex 40, 42, and 43. A program must 
not change the value in port hex 41, because this port controls 
the dynamic-memory refresh. Channel provides the 
time-of "day interrupt, and can also be used for timing short 
intervals. Channel 2 of the timer/counter is the output for the 
speaker and cassette ports. This channel may also be used for 
timing short intervals, although it cannot interrupt at the end 
of the period. 

• Control of the Game Control Adapter, port hex 201 

Note: Programs should use the timer for delay on the 
paddle input rather than a program loop. 

• Interrupt Mask Register (IMR), port hex 21, can be used to 
selectively mask and unmask the hardware features. 

The following information pertains to absolute memory locations. 

• Interrupt Vectors (hex 0)— A program may change these to 
point at different processing routines. When an interrupt 
vector is modified, the original value should be retained. If the 
interrupt, either hardware or program, is not directed toward 
this device handler, the request should be passed to the next 
item in the Ust. 

• Video Display Buffers (hex BOOOO and B8000)- For each 
mode of operation defined in the video display BIOS, the 
memory map will remain the same. For example, the bit map 
for the 320 X 200 medium-resolution graphics mode of the 
Color/Graphics Monitor adapter will be retained on any 
future adapter that supports that mode. If the bit map is 
modified, a different mode number will be used. 

• ROM BIOS Data Area (40:0)— Any variables in this area will 
retain their current definition, whenever it is reasonable to do 
so. IBM may use these data areas for other purposes when the 
variable no longer has meaning in the system. In general, 
ROM BIOS data variables should be read or modified through 
BIOS calls whenever possible, and not with direct access to 
the variable. 



9-10 Compatibility 



A program that requires timing information should use either the 
time-of-day clock or the timing channels of the timer/ counter. 
The input frequency to the timer will be maintained at 1.19 MHz, 
providing a constant time reference. Program loops should be 
avoided. 

Programs that use copy protection schemes should use the ROM 
BIOS diskette calls to read and verify the diskette and should not 
be timer dependent. Any method can be used to create the 
diskette, although manufacturing capability should be considered. 
The verifying program can look at the diskette controller's status 
bytes in the ROM BIOS data area for additional information 
about embedded errors. More information about copy protection 
may be found under ' Copy Protection ' later in this section. 

Any DOS program must be relocatable and insensitive to the size 
of DOS or its own load addresses. A program's memory 
requirement should be identified and contiguous with the load 
module. A program should not assume that all of memory is 
available to it. 



Multi-tasking Provisions 

The IBM Personal Computer AT BIOS contains a feature to 
assist multi- tasking implementation. "Hooks" are provided for a 
multi-tasking dispatcher. Whenever a busy (wait) loop occurs in 
the BIOS, a hook is provided for the system to break out of the 
loop. Also, whenever an interrupt is serviced by the BIOS, which 
causes a corresponding wait loop to be exited, another hook is 
provided for the system. 

Thus a system may be written which employs the bulk of the 
device driver code. The following is vaUd only in the 
microprocessor's real address mode. Several steps must be taken 
by the system code in order to allow this support. First, the 
system is responsible for the serialization of access to the device 
driver. The BIOS code is not reentrant. Second, the system is 
responsible for matching corresponding wait and post calls. 



CompatibiUty 9-11 



Interfaces 

There are four interfaces to be used by the multi-tasking 
dispatcher: 



Startup 

The first thing to be done is for the startup code to hook interrupt 
hex 15. The dispatcher is responsible to check for function codes 
AH = hex 90 and 91. The "Wait" and "Post" sections describe 
these codes. The dispatcher must pass all other functions through 
to the previous user of interrupt hex 15. This can be done via a 
JMP or a CALL. If the function code is hex 90 or 91, then the 
dispatcher should do the appropriate processing and return via the 
IRET instruction. 



Serialization 

It is up to the multi-tasking system to insure that the device driver 
code is used in a serial fashion. Multiple entries into the code can 
result in very serious errors. 



Wait (Busy) 

Whenever the BIOS is about to enter a busy loop, it first issues an 
interrupt 15 with a function code of hex 90 in AH. This signals a 
WAIT condition. At this point, the dispatcher should save the 
task status and dispatch another task. This allows overlapped 
execution of tasks when the hardware is busy. The following is is 
an outline of the code which has been added to the BIOS to 
implement this function. 

EXAMPLE DEVICE BUSY LOOP 

DO UNTIL 



MOV AX, hex 90XX ;WAIT code in AH and 



9-12 Compatibility 



;TYPE code in AL 
INT hex 15 ;issue call 

JC TIMEOUT ;optional: for timeout or 

;if carry is set, timeout 

;occurred 
NORMAL TIMEOUT LOGIC ;nonnal timeout 

UNTIL INTERRUPT COMPLETE FLAG IS SET 



POST (Interrupt) 

Whenever the BIOS has set an interrupt flag for a corresponding 
busy loop, an interrupt 15 occurs with a function code hex 91 in 
AH. This signals a POST condition. At this point, the dispatcher 
should set the task status to "ready to run" and return to the 
interrupt routine. The following BIOS has been added to code to 
implement this function. 

INTERRUPT PROCESSING 

SET INTERRUPT COMPLETE FLAG FOR BUSY LOOP 



MOV AX,hex 91XX ; post code AH and 

; type code AL 
INT hex 15 ; issue call 

Classes 

The following types of wait loops are supported: 



Compatibflity 9-13 



The class for 0->7Fh is serially reusable. This means that for 
the devices that use these codes, access to the BIOS must be 
restricted to only one task at a time. 

The class for 80h->BFh is reentrant. There is no restriction 
on the number of tasks which may access the device. 

The class for COh->FFh is non-interrupt. There is no 
corresponding interrupt for the wait loop. Therefore, it is the 
responsibility of the dispatcher to determine what satisfies this 
condition to exit the loop. 



Function Code Classes 

type code (AL) Description 



00h->7Fh 



80h->0BFh 



OCOh->OFFh 



serially reusable devices; operating system 
must seriaUze access 

reentrant devices; ES:BX is used to 
distinguish different calls (multiple I/O 
calls are allowed simultaneously) 

wait only calls; there is no complementary 
"POST" for these waits— these are timeout 
only. Times are function number 
dependent. 



Function Code Assignments 

The following are specific assignments for the IBM Personal 
Computer AT BIOS. They are grouped according to the classes 
described under "Function Code Classes". 



Type Code (AL) 

OOH 



Timeout 

yes (6 sec) 



Description 

IBM Personal 
Computer AT fixed 
disk 



9-14 Compatibility 



OIH 
02H 

OFDH 

OFEH 



yes (2 sec) 



no 



yes (1 sec- write) 
(625 msec-read) 
yes (?? sec) 



IBM Personal 
Computer AT diskette 

IBM Personal 
Computer AT 
keyboard 

diskette motor start 



printer 



The asynchronous support has been omitted. The IBM Personal 
Computer AT Serial/Parallel Adapter will generate interrupts, 
but BIOS does not support it in the interrupt mode. Therefore, 
the support should be included in the multi-tasking system code if 
that device is to be supported. 



Timeouts 

In order to support timeouts properly, it is necessary for the 
multi-tasking dispatcher to be aware of time. If a device enters a 
busy loop, it generally should remain there for a specific amount 
of time before indicating an error. The dispatcher should return 
to the BIOS wait loop with the carry bit set if a timeout occurred. 



SYS REQ Key 

The following describes the use of the SYS REQ key in a 
multi-tasking environment. It assumes that tasks used are 
cooperative in some manner. The system must enlploy a task 
monitor to allow the user to select various tasks. This selection 
may be for starting tasks, terminating tasks, supplying input to 
tasks from the keyboard, or any other function that requires user 
input. 



Compatibility 9-15 



Subsystem Structure 

The following figure shows three subsystems which have multiple 
tasks. They are arranged in order of hierarchy. Tasks in 
subsystem B can only run when Task "Other" A is active in 
subsystem A and tasks in subsystem C can only run when Task 
"Other" B is active in subsystem B. 



Task 1A 


Task 2A 


Task 3A 


Task "Other "A 


Subsystem B Inhibited 


Task 1 B 


Task 2B 


TaskB 
"Other " 
TaskIC 
Task 20 


Subsystem 


:: Inhibited 







Multiple Task Subsystems 



The order in which subsystems were installed (loaded into main 
storage) determines their priority. The first one installed is higher 
on the hierarchy. An inhibit mechanism provided at startup time 
enforces the hierarchy. As a subsystem starts, it broadcasts to the 
rest of the subsystems, previously installed, that it is starting and 
at the same time, provides the address of a lock. This lock must 
be set (incremented) by subsystems higher in the hierarchy 
whenever they wish to run one of their own tasks. This flag must 
be set for each subsystem lower on the hierarchy, for example, 
when subsystem A is about to start Task 2A, the dispatcher must 
set subsystem B inhibit and subsystem C inhibit. 



Subsystem Startup and Lockout 

In order for multiple subsystems to cooperate, there must be 
communication between subsystems when a subsystem is loaded 
into storage and initialized. 

The subsystem being loaded tells the previously loaded 
subsystems that it is being loaded and broadcasts the address of 
its synchronization lock. Higher priority subsystems use this lock 
to exclude the new subsystem from accessing any system 
resources (DOS, interrupts, etc.). 



9-16 Compatibility 



After a subsystem is loaded, it must "listen" for any subsystems 
that may be loaded later so that it can lock them out when it is 
running. The following describes the code sequence for startup. 



Startup Interface 

MOV AX,SEG SYSLOCK ;segment of lock 

MOV ES,AX 

MOV BX,OFFSET SYSLOCK ;offset of lock 

MOV AX,2000H ;AH=20H, AL=0 

INT 15H 

Lockout Interface 

The register ES:BX points to a byte which initially contains a 
value of 0. Whenever a higher priority subsystem wishes to run, it 
increments the lock. When it completes running, it decrements the 
lock. This allows proper synchronization of resources and 
subsystems. 



SYS REQ Key Functions 

During initialization, the subsystem also needs to connect to the 
SYS REQ key function. It is necessary for the SYS key code to 
be included in each subsystem. This startup section determines if 
the SYS support is already loaded and loads the support if 
necessary. 

The SYS functions provide a means for the subsystem's main 
screen or menu to be displayed. If the subsystem requires no user 
action, then these functions need not be provided. 



SYS Key Modes 

There are two SYS key modes: multiple press and super shift. 

CompatibiUty 9-17 



Multiple Press Mode: This mode allows the user to sequence 
through subsystems. Subsystems are displayed in the reverse 
order of their installation. 

Super Shift Mode: This mode allows the user direct access to 
any subsystem regardless of the priority. The user activates this 
mode by holding the SYS key pressed and pressing another key 
which designates another subsystem. 



Multiple Key Sequence 

If a subsystem is to be used on the IBM Personal Computer and 
the IBM Personal Computer XT, a multiple key sequence must be 
used to access the SYS key functions. 



SYS Key Interfaces 

There are four interfaces needed by the SYS code to support a 
subsystem: startup, activation, cancellation, and completion. The 
subsystem activates two of these: startup and completion. The 
SYS code in conjunction with user input activates the other two. 

The following is a description, in tabular form, of the states, 
transitions, and actions needed to implement the SYS REQ 
functions. 



Subsystem Entry Points 



subsys A 
subsys B 
subsys C 


code A 
code B 
code C 




Entry Points 




# subsystems 


current subsystem # 


num 




cur 



9-18 CompatibiUty 



State/Transition Table 



Current 
State 


Input 


Next Stat 


e Action 


Idle 


SYS REQ 


Active 


activate subsys ' cur ' 




SYS code 


Active 
Super 


activate subsys ' code 




Startup 


Idle 


increment 'num' 

set 'cur' to 'num' 

insert entry point and 
code 


Active 


SYS REQ 


Active 


cancel subsys ' cur ' 
decrement 'cur' 
activate subsys ' cur ' 




Completion 
'cur' 


Idle 


set 'cur' to 'num' 




Startup 


Active 


increment 'num' 

insert entry point and 
code 




SYS code 


Active 
Super 


activate subsys ' code 


Active 
Super 


Completion 
•cur- 


Idle 


set 'cur' to 'num' 




Startup 


Active 


increment 'num' 



insert entry point and 
code 



Compatibffity 9-19 



Startup 

At startup, a call is issued to determine if the SYS REQ key 
support is already loaded and to initialize the support for the new 
subsystem. 

The parameters for the startup routine are the address of the 
entry point and the function code (direct-access mode). If the 
operation was successful, the carry flag is set. 

The following shows the calling sequence. 



MOV AX,SEG entry_point 

MOV ES,AX 

MOV BX,OFFSET entry_point 

MOV CX,XXXX 

MOV AX,2010H 

INT 15H 



address for SYS to call 



super shift mode code 
AH=20H,AL=10 



If the carry flag is not set, the initialization code needs to hook 
the vector for interrupt 15H, save the previous address, and 
reissue the initialization call. 



Activation 

This is a signal from the SYS REQ processing module that a 
subsystem's monitor is to be activated. 

This entry into the subsystem dispatcher signals that the monitor 
task should be activated. It should be treated as a signal to set a 
flag for the subsystem rather than an opportunity to gain control 
of the system asynchronously as it may not be a proper time for 
the subsystem to run. The subsystem may have to wait until a 
higher priority subsystem allows it to have control before the 
subsystem's monitor gets control. The subsystem entry point is 
CALLED with the AH register set to 0. 



9-20 Compatibility 



CanceUation 

This signal from the SYS REQ processing module tells the 
subsystem monitor to ignore the previous activation signal and 
take the necessary action to return to its previous state. 

This entry into the subsystem dispatcher signals that the monitor 
task should be deactivated. The subsystem may not have control 
of the system. It is necessary for the subsystem to note that a 
cancellation has occurred and to wait until it has a valid 
opportunity to run through its dispatcher code in a normal 
fashion. The subsystem entry point is CALLED with the AH 
register set to I. 



Completion 

The following call signals completion. Completion constitutes 
any action taken by the user when the subsystem's menu is 
displayed. 

The completion call causes the activation pointer to be reset to 
the lowest priority subsystem. All lower priority subsystems also 
receive a cancellation notification. 



MOV AX,SEG entry point 

MOV ES,AX 

MOV BX,OFFSET entry_point 

MOVAX,2011H 

INT 15H 



address for SYS to call 

ES:BX must contain the same 
values as the startup call 
AH=20H, AL=11H 



CompatibiUty 9-21 



Copy Protection 

Some modes of copy protection will not work on the IBM 
Personal Computer AT due to the following conditions: 

• Bypassing BIOS 

• Diskette drive differences 

• Write current differences 



Bypassing BIOS 

Copy protection, which depends on the following will not work 
on the IBM Personal Computer AT: 

Track Density: The High Capacity Diskette Drive records tracks 
at a density of 96TPI. This drive has to double step in the 48TPI 
mode, which is performed by BIOS. 

Data Transfer Rate: BIOS selects the proper data transfer rate 
for the media being used. 

Disk Base: Copy protection, which creates its own disk base 

will not work on the High Capacity Diskette Drive. 



Diskette Drive Differences 

Copy protection, which depends on the following will not work 
on the High Capacity Diskette Drive: 

Rotational Speed: Copy protection using the time between two 
events on a diskette will not work on the High Capacity Diskette 
Drive. 

Access Time: Diskette BIOS must set the track to track access 
time for the different types of media used on the IBM Personal 
Computer AT. 



9-22 Compatibflity 



Head Geometry: See ' High Capacity Diskette Drive ' earlier in 
this section. 

Diskette Change Signal: Copy protection may not be able to 
reset this signal. 



Write Current 

The IBM Personal Computer AT Fixed Disk and Diskette Drive 
Adapter selects the proper write current for the media being used. 



Machine-Sensitive Code 

Programs may program for machine specific features, but they 
must test for specific machine type. Location hex OFFFFiOE 
contains the machine identification: 



Hex 


Machine Identification 


OFF 
OFE 
OFD 
OFC 


IBM Personal Computer 
IBM Personal Connputer XT 
IBM PQr 
IBM Personal Computer AT 



Machine Identification Code 



IBM will define methods for uniquely determining the specific 
machine type or I/O feature for any new device. 



Compatibility 9-23 



Notes: 



9-24 Compatibility 



Glossary 



IX. Prefix micro; 0.000 001. 

jLts. Microsecond; 0.000 001 second. 

A. Ampere. 

ac. Alternating current. 

accumulator. A register in which the result of an operation is 
formed. 

active high. Designates a signal that has to go high to produce an 
effect. Synonymous with positive true. 

active low. Designates a signal that has to go low to produce an 
effect. Synonymous with negative true. 

adapter. An auxiUary device or unit used to extend the operation 
of another system. 

address bus. One or more conductors used to carry the 
binary-coded address from the processor throughout the rest of 
the system. 

algorithm. A finite set of well-defined rules for the solution of a 
problem in a finite number of steps. 

all points addressable (APA). A mode in which all points of a 
displayable image can be controlled by the user. 

alphameric. Synonym for alphanumeric. 

alphanumeric (A/N). Pertaining to a character set that contains 
letters, digits, and usually other characters, such as punctuation 
marks. Synonymous with alphameric. 



Glossary-1 



alternating current (ac). A current that periodically reverses its 
direction of flow. 



American National Standard Code for Information Exchange 

(ASCII). The standard code, using a coded character set 
consisting of 7-bit coded characters (8 bits including parity 
check), used for information exchange between data processing 
systems, data communication systems, and associated equipment. 
The ASCII set consists of control characters and graphic 
characters. 



ampere (A). The basic unit of electric current. 
A/N. Alphanumeric 



analog. (1) Pertaining to data in the form of continuously variable 
physical quantities. (2) Contrast with digital. 



AND. A logic operator having the property that if P is a 
statement, Q is a statement, R is a statement,..., then the AND of 
P, Q, R,...is true if all statements are true, false if any statement is 
false. 

AND gate. A logic gate in which the output is 1 only if all inputs 
are 1. 

AND operation. The boolean operation whose result has the 
boolean value 1, if and only if, each operand has the boolean 
value 1. Synonymous with conjunction. 

APA. All points addressable. 

ASCII. American National Standard Code for Information 
Exchange. 



assemble. To translate a program expressed in an assembler 
language into a computer language. 



GIossary-2 



assembler. A computer program used to assemble. 

assembler language. A computer-oriented language whose 
instructions are usually in one-to-one correspondence with 
computer instructions. 

asynchronous transmission. (1) Transmission in which the time of 
occurrence of the start of each character, or block of characters, 
is arbitrary; once started, the time of occurrence of each signal 
representing a bit within a character, or block, has the same 
relationship to significant instants of a fixed time frame. (2) 
Transmission in which each information character is individually 
transmitted (usually timed by the use of start elements and stop 
elements). 

audio frequencies. Frequencies that can be heard by the human 
ear (approximately 15 hertz to 20 000 hertz). 

auxiliary storage. (1) A storage device that is not main storage. 
(2) Data storage other than main storage; for example, storage on 
magnetic disk. (3) Contrast with main storage. 



BASIC. Beginner's all-purpose symbolic instruction code. 



basic input/output system (BIOS). The feature of the IBM 
Personal Computer that provides the level control of the major 
I/O devices, and reUeves the programmer from concern about 
hardware device characteristics. 

baud. (1) A unit of signaling speed equal to the number of 
discrete conditions or signal events per second. For example, one 
baud equals one bit per second in a train of binary signals, 
one-half dot cycle per second in Morse code, and one 3 -bit value 
per second in a train of signals each of which can assume one of 
eight different states. (2) In asynchronous transmission, the unit 
of modulation rate corresponding to one unit of interval per 
second; that is, if the duration of the unit interval is 20 
milUseconds, the modulation rate is 50 baud. 



BCC. Block-check character. 



Glossary-3 



beginner's all-purpose symbolic instruction code (BASIC). A 

programming language with a small repertoire of commands and a 
simple syntax, primarily designed for numeric applications. 

binary. (1) Pertaining to a selection, choice, or condition that has 
two possible values or states. (2) Pertaining to a fixed radix 
numeration system having a radix of 2. 

binary digit. (1) In binary notation, either of the characters or 1. 
(2) Synonymous with bit. 

binary notation. Any notation that uses two different characters, 
usually the binary digits and 1. 

binary synchronous communications (BSC). A uniform procedure, 
using a standardized set of control characters and control 
character sequences for synchronous transmission of 
binary-coded data between stations. 



BIOS. Basic input/output system. 



bit. Synonym for binary digit 

bits per second (bps). A unit of measurement representing the 
number of discrete binary digits transmitted by a device in one 
second. 

block. (1) A string of records, a string of words, or a character 
string formed for technical or logic reasons to be treated as an 
entity. (2) A set of things, such as words, characters, or digits, 
treated as a unit. 

block-check character (BCC). In cyclic redundancy checking, a 
character that is transmitted by the sender after each message 
block and is compared with a block-check character computed by 
the receiver to determine if the transmission was successful. 

boolean operation. (1) Any operation in which each of the 
operands and the result take one of two values. (2) An operation 
that follows the rules of boolean algebra. 



Glossary-4 



bootstrap. A technique or device designed to bring itself into a 
desired state by means of its own action; for example, a machine 
routine whose first few instructions are sufficient to bring the rest 
of itself into the computer from an input device. 

bps. Bits per second. 

BSC. Binary synchronous communications. 



buffer. (1) An area of storage that is temporarily reserved for use 
in performing an input/output operation, into which data is read 
or from which data is written. Synonymous with I/O area. (2) A 
portion of storage for temporarily holding input or output data. 

bus. One or more conductors used for transmitting signals or 
power. 

byte. (1) A sequence of eight adjacent binary digits that are 
operated upon as a unit. (2) A binary character operated upon as 
a unit. (3) The representation of a character. 



C. Celsius. 



capacitor. An electronic circuit component that stores an electric 
charge. 



CAS. Column address strobe. 



cathode ray tube (CRT). A vacuum tube in which a stream of 
electrons is projected onto a fluorescent screen producing a 
luminous spot. The location of the spot can be controlled. 

cathode ray tube display (CRT display). (1) A CRT used for 
displaying data. For example, the electron beam can be controlled 
to form alphanumeric data by use of a dot matrix. (2) The data 
display produced by the device as in (1). 



Glossary-5 



CCITT. International Telegraph and Telephone Consultative 
Committee. 

Celsius (C). A temperature scale. Contrast with Fahrenheit (F). 

central processing unit (CPU). Term for processing unit. 

channel. A path along which signals can be sent; for example, 
data channel, output channel. 

character generator. (1) In computer graphics, a functional unit 
that converts the coded representation of a graphic character into 
the shape of the character for display. (2) In word processing, 
the means within equipment for generating visual characters or 
symbols from coded data. 

character set. (1) A finite set of different characters upon which 
agreement has been reached and that is considered complete for 
some purpose. (2) A set of unique representations called 
characters. (3) A defined collection of characters. 

characters per second (cps). A standard unit of measurement for 
the speed at which a printer prints. 

check key. A group of characters, derived from and appended to 
a data item, that can be used to detect errors in the data item 
during processing. 

closed circuit. A continuous unbroken circuit; that is, one in 
which current can flow. Contrast with open circuit. 



CMOS. Complementary metal oxide semiconductor. 



code. (1) A set of unambiguous rules specifying the manner in 
which data may be represented in a discrete form. Synonymous 
with coding scheme. (2) A set of items, such as abbreviations, 
representing the members of another set. (3) To represent data 
or a computer program in a symbolic form that can be accepted 
by a data processor. (4) Loosely, one or more computer 
programs, or part of a computer program. 



Glossary-6 



coding scheme. Synonym for code. 

coUector. An element in a transistor toward which current flows. 

column address strobe (CAS). A signal that latches the column 
addresses in a memory chip. 

compUe. (1) To translate a computer program expressed in a 
problem-oriented language into a computer-oriented language. 
(2) To prepare a machine-language program from a computer 
program written in another programming language by making use 
of the overall logic structure of the program, or generating more 
than one computer instruction for each symbolic statement, or 
both, as well as performing the function of an assembler. 

complementary metal oxide semiconductor (CMOS). A logic 
circuit family that uses very little power. It works with a wide 
range of power supply voltages. 

computer. A functional unit that can perform substantial 
computation, including numerous arithmetic operations or logic 
operations, without intervention by a human operator during a 
run. 

computer instruction code. A code used to represent the 
instructions in an instruction set. Synonymous with machine 
code. 

computer program. A sequence of instructions suitable for 
processing by a computer. 

computer word. A word stored in one computer location and 
capable of being treated as a unit. 

configuration. (1) The arrangement of a computer system or 
network as defined by the nature, number, and the chief 
characteristics of its functional units. More specifically, the term 
configuration may refer to a hardware configuration or a software 
configuration. (2) The devices and programs that make up a 
system, subsystem, or network. 

conjunction. Synonym for AND operation. 



Glossary-7 



contiguous. Touching or joining at the edge or boundary; 
adjacent. 

control character. A character whose occurrence in a particular 
context initiates, modifies, or stops a control operation. 

control operation. An action that affects the recording, 
processing, transmission, or interpretation of data; for example, 
starting or stopping a process, carriage return, font change, 
rewind, and end of transmission. 

control storage. A portion of storage that contains microcode. 

cps. Characters per second. 

CPU. Central processing unit. 

CRC. Cyclic redundancy check. 

CRT. Cathode ray tube. 

CRT display. Cathode ray tube display. 

CTS. Clear to send. Associated with modem control. 



cursor. (1) In computer graphics, a movable marker that is used 
to indicate a position on a display. (2) A displayed symbol that 
acts as a marker to help the user locate a point in text, in a system 
command, or in storage. (3) A movable spot of Ught on the 
screen of a display device, usually indicating where the next 
character is to be entered, replaced, or deleted. 

cyclic redundancy check (CRC). (1) A redundancy check in which 
the check key is generated by a cyclic algorithm. (2) A system of 
error checking performed at both the sending and receiving 
station after a block-check character has been accumulated. 

cylinder. (1) The set of all tracks with the same nominal distance 
from the axis about which the disk rotates. (2) The tracks of a 
disk storage device that can be accessed without repositioning the 
access mechanism. 



Glossary-8 



daisy-chained cable. A type of cable that has two or more 
connectors attached in series. 

data. (1) A representation of facts, concepts, or instructions in a 
formalized manner suitable for communication, interpretation, or 
processing by human or automatic means. (2) Any 
representations, such as characters or analog quantities, to which 
meaning is, or might be assigned. 

data base. A collection of data that can be immediately accessed 
and operated upon by a data processing system for a specific 
purpose. 

data processing system. A system that performs input, processing, 
storage, output, and control functions to accomplish a sequence 
of operations on data. 

data transmission. Synonym for transmission. 

dB. Decibel. 

dBa. Adjusted decibels. 

dc. Direct current. 

deboimce. An electronic means of overcoming the make/break 
bounce of switches to obtain one smooth change of signal level. 

decibel. (1) A unit that expresses the ratio of two power levels on 
a logarithmic scale. (2) A unit for measuring relative power. 

decoupling capacitor. A capacitor that provides a low impedance 
path to ground to prevent common coupling between circuits. 



Deutsche Industrie Norm (DIN). (1) German Industrial Norm. 
(2) The committee that sets German dimension standards. 



digit. (1) A graphic character that represents an integer; for 
example, one of the characters to 9. (2) A symbol that 



Glossary-9 



represents one of the non-negative integers smaller than the radix. 
For example, in decimal notation, a digit is one of the characters 
to 9. 

digital. (1) Pertaining to data in the form of digits. (2) Contrast 
with analog. 



DIN. Deutsche Industrie Norm. 

DIN connector. One of the connectors specified by the DIN 
committee. 

DIP. Dual in-line package. 

DIP switch. One of a set of small switches mounted in a dual 
in-line package. 



direct current (dc). A current that always flows in one direction. 

direct memory access (DMA). A method of transferring data 
between main storage and I/O devices that does not require 
processor intervention. 

disable. To stop the operation of a circuit or device. 

disabled. Pertaining to a state of a processing unit that prevents 
the occurrence of certain types of interruptions. Synonymous with 
masked. 

disk. Loosely, a magnetic disk unit. 

disk drive. A mechanism for moving a disk pack and controlling 
its movements. 

disk pack. A removable assembly of magnetic disks. 

diskette. A thin, flexible magnetic disk and a semirigid protective 
jacket, in which the disk is permanently enclosed. Synonymous 
with flexible disk. 



Glossary- 10 



diskette drive. A mechanism for moving a diskette and controlling 
its movements. 

display. (1) A visual presentation of data. (2) A device for visual 
presentation of information on any temporary character imaging 
device. (3) To present data visually. (4) See cathode ray tube 
display. 

display attribute. In computer graphics, a particular property that 
is assigned to all or part of a display; for example, low intensity, 
green color, blinking status. 



DMA. Direct memory access. 



dot matrix. (1) In computer graphics, a two-dimensional pattern 
of dots used for constructing a display image. This type of matrix 
can be used to represent characters by dots. (2) In word 
processing, a pattern of dots used to form characters. This term 
normally refers to a small section of a set of addressable points; 
for example, a representation of characters by dots. 

dot printer. Synonym for matrix printer. 

dot-matrix character generator. In computer graphics, a character 
generator that generates character images composed of dots. 



DSR. Data set ready. Associated with modem control. 

DTR. In the IBM Personal Computer, data terminal ready. 
Associated with modem control. 



dual in-line package (DIP). A widely used container for an 
integrated circuit. DIPs have pins in two parallel rows. The pins 
are spaced 1/10 inch apart. See also DIP switch. 

duplex. (1) In data communication, pertaining to a simultaneous 
two-way independent transmission in both directions. (2) 
Contrast with half-duplex. 



Glossary- 11 



duty cycle. In the operation of a device, the ratio of on time to 
idle time. Duty cycle is expressed as a decimal or percentage. 

dynamic memory. RAM memory using transistors and capacitors 
as the memory elements. This memory requires a refresh 
(recharge) cycle every few milUseconds. Contrast with static 
memory. 



EBCDIC. Extended binary-coded decimal interchange code. 
ECC. Error checking and correction. 



edge comiector. A terminal block with a number of contacts 
attached to the edge of a printed-circuit board to facilitate 
plugging into a foundation circuit. 



EIA. Electronic Industries Association. 



electromagnet. Any device that exhibits magnetism only while an 
electric current flows through it. 

enable. To initiate the operation of a circuit or device. 

end of block (EOB). A code that marks the end of a block of 
data. 

end of file (EOF). An internal label, immediately following the 
last record of a file, signaling the end of that file. It may include 
control totals for comparison with counts accumulated during 
processing. 

end-of-text (ETX). A transmission control character used to 
terminate text. 

end-of -transmission (EOT). A transmission control character 
used to indicate the conclusion of a transmission, which may have 
included one or more texts and any associated message headings. 



Glossary- 12 



end-of -transmission-block (ETB). A transmission control 
character used to indicate the end of a transmission block of data 
when data is divided into such blocks for transmission purposes. 



EOB. End of block. 

EOF. End of file. 

EOT. End-of-transmission. 

EPROM. Erasable programmable read-only memory. 



erasable programmable read-only memory (EPROM). A PROM in 

which the user can erase old information and enter new 
information. 

error checking and correction (ECC). The detection and 
correction of all single-bit errors, plus the detection of double-bit 
and some multiple-bit errors. 



ESC. The escape character. 



escape character (ESC). A code extension character used, in 
some cases, with one or more succeeding characters to indicate by 
some convention or agreement that the coded representations 
following the character or the group of characters are to be 
interpreted according to a different code or according to a 
different coded character set. 



ETB. End-of-transmission-block. 
ETX. End-of-text. 



extended binary-coded decimal interchange code (EBCDIC). A set 

of 256 characters, each represented by eight bits. 



Glossary- 13 



F. Fahrenheit. 

Fahrenheit (F). A temperature scale. Contrast with Celsius (C). 

falling edge. Synonym for negative-going edge. 

FCC. Federal Communications Commission. 

fetch. To locate and load a quantity of data from storage. 

FF. The form feed character. 



field. (1) In a record, a specified area used for a particular 
category of data. (2) In a data base, the smallest unit of data that 
can be referred to. 

fixed disk. In the IBM Personal Computer, synonym for disk 
drive. 

flag. (1) Any of various types of indicators used for 
identification. (2) A character that signals the occurrence of 
some condition, such as the end of a word. (3) Deprecated term 
for mark. 

flexible disk. Synonym for diskette. 

flip-flop. A circuit or device containing active elements, capable 
of assuming either one of two stable states at a given time. 

font. A family or assortment of characters of a given size and 
style; for example, 10 point Press Roman medium. 

foreground. (1) In multiprogramming, the environment in which 
high-priority programs are executed. (2) On a color display 
screen, the characters as opposed to the background. 



Glossary- 14 



form feed. (1) Paper movement used to bring an assigned part of 
a form to the printing position. (2) In word processing, a 
function that advances the typing position to the same character 
position on a predetermined hne of the next form or page. 

form feed character. A control character that causes the print or 
display position to move to the next predetermined first line on 
the next form, the next page, or the equivalent. 

format. The arrangement or layout of data on a data medium. 

frame. (1) In SDLC, the vehicle for every command, every 
response, and all information that is transmitted using SDLC 
procedures. Each frame begins and ends with a flag. (2) In data 
transmission, the sequence of contiguous bits bracketed by and 
including beginning and ending flag sequences. 



g. Gram. 



G. (1) Prefix giga; 1 000 000 000. (2) When referring to 
computer storage capacity, 1 073 741 824. (1 073 741 824 = 2 to 
the 30th power.) 



gate. (1) A combinational logic circuit having one output channel 
and one or more input channels, such that the output channel 
state is completely determined by the input channel states. (2) A 
signal that enables the passage of other signals through a circuit. 



Gb. 

1073 741 824 bytes. 



general-purpose register. A register, usually explicitly addressable 
within a set of registers, that can be used for different purposes; 
for example, as an accumulator, as an index register, or as a 
special handler of data. 

giga (G). Prefix 1 000 000 000. 



Glossary- 15 



gram (g). A unit of weight (equivalent to 0.035 ounces). 

grairiiic. A symbol produced by a process such as handwriting, 
drawing, or printing. 

graphic character. A character, other than a control character, 
that is normally represented by a graphic. 



half -duplex. (1) In data communication, pertaining to an 
alternate, one way at a time, independent transmission. (2) 
Contrast with duplex. 

hardware. (1) Physical equipment used in data processing, as 
opposed to programs, procedures, rules, and associated 
documentation. (2) Contrast with software. 

head. A device that reads, writes, or erases data on a storage 
medium; for example, a small electromagnet used to read, write, 
or erase data on a magnetic disk. 

hertz (Hz). A unit of frequency equal to one cycle per second. 

hex. Common abbreviation for hexadecimal. 

hexadecimal. (1) Pertaining to a selection, choice, or condition 
that has 16 possible different values or states. These values or 
states are usually symboUzed by the ten digits through 9 and the 
six letters A through F. (2) Pertaining to a fixed radix 
numeration system having a radix of 16. 

high impedance state. A state in which the output of a device is 
effectively isolated from the circuit. 

highlighting. In computer graphics, emphasizing a given display 
group by changing its attributes relative to other display groups in 
the same display field. 

high-order position. The leftmost position in a string of 
characters. See also most-significant digit. 



Glossary- 16 



housekeeping. Operations or routines that do not contribute 
directly to the solution of the problem but do contribute directly 
to the operation of the computer. 



Hz. Hertz 



image. A fully processed unit of operational data that is ready to 
be transmitted to a remote unit; when loaded into control storage 
in the remote unit, the image determines the operations of the 
unit. 

immediate instruction. An instruction that contains within itself an 
operand for the operation specified, rather than an address of the 
operand. 

index register. A register whose contents may be used to modify 
an operand address during the execution of computer instructions. 

indicator. (1) A device that may be set into a prescribed state, 
usually according to the result of a previous process or on the 
occurrence of a specified condition in the equipment, and that 
usually gives a visual or other indication of the existence of the 
prescribed state, and that may in some cases be used to determine 
the selection among alternative processes; for example, an 
overflow indicator. (2) An item of data that may be interrogated 
to determine whether a particular condition has been satisfied in 
the execution of a computer program; for example, a switch 
indicator, an overflow indicator. 

inhibited. (1) Pertaining to a state of a processing unit in which 
certain types of interruptions are not allowed to occur. (2) 
Pertaining to the state in which a transmission control unit or an 
audio response unit cannot accept incoming calls on a line. 

initialize. To set counters, switches, addresses, or contents of 
storage to or other starting values at the beginning of, or at 
prescribed points in, the operation of a computer routine. 

input/output (I/O). (1) Pertaining to a device or to a channel that 
may be involved in an input process, and, at a different time, in an 
output process. In the English language, "input/output" may be 



Glossary- 17 



used in place of such terms "input/output data", "input/output 
signal", and "input/output terminals", when such usage is clear in 
a given context. (2) Pertaining to a device whose parts can be 
performing an input process and an output process at the same 
time. (3) Pertaining to either input or output, or both. 

instruction. In a programming language, a meaningful expression 
that specifies one operation and identifies its operands, if any. 

instruction set. The set of instructions of a computer, of a 
programming language, or of the programming languages in a 
programming system. 

interface. A device that alters or converts actual electrical signals 
between distinct devices, programs, or systems. 

interleave. To arrange parts of one sequence of things or events 
so that they alternate with parts of one or more other sequences 
of the same nature and so that each sequence retains its identity. 

interrupt. (1) A suspension of a process, such as the execution of 
a computer program, caused by an event external to that process, 
and performed in such a way that the process can be resumed. 

(2) In a data transmission, to take an action at a receiving station 
that causes the transmitting station to terminate a transmission. 

(3) Synonymous with interruption. 



I/O. Input/output. 

I/O area. Synonym for buffer. 



irrecoverable error. An error that makes recovery impossible 
without the use of recovery techniques external to the computer 
program or run. 



joystick. In computer graphics, a lever that can pivot in all 
directions and that is used as a locator device. 



k. Prefix kilo; 1000. 



Glossary- 18 



K. When referring to storage capacity, 1024. (1024 = 2 to the 
10th power.) 

Kb. 1024 bytes. 



kg. Kilogram; 1000 grams. 
kHz. Kilohertz; 1000 hertz. 
kUo(k). Prefix 1000 
kilogram (kg). 1000 grams. 
kilohertz (kHz). 1000 hertz 



latch. (1) A simple logic-circuit storage element. (2) A feedback 
loop in sequential digital circuits used to maintain a state. 

least-significant digit. The rightmost digit. See also low-order 
position. 



LED. Light-emitting diode. 



light-emitting diode (LED). A semiconductor device that gives off 
visible or infrared Ught when activated. 

load. In programming, to enter data into storage or working 
registers. 

low power Schottky TTL. A version (LS series) of TTL giving a 
good compromise between low power and high speed. See also 
transistor-transistor logic and Schottky TTL. 

low-order position. The rightmost position in a string of 
characters. See also least-significant digit. 



m. (1) Prefix milli; 0.001. (2) Meter. 



Glossary- 19 



M. (1) Prefix mega; 1 000 000. (2) When referring to computer 
storage capacity, 1 048 576. (1 048 576 = 2 to the 20th power.) 



mA. Milliampere; 0.001 ampere. 

machine code. The machine language used for entering text and 
program instructions onto the recording medium or into storage 
and which is subsequently used for processing and printout. 

machine language. (1) A language that is used directly by a 
machine. (2) Deprecated term for computer instruction code. 

magnetic disk. (1) A flat circular plate with a magnetizable 
surface layer on which data can be stored by magnetic recording. 
(2) See also diskette. 

main storage. (1) Program-addressable storage from which 
instructions and other data can be loaded directly into registers 
for subsequent execution or processing. (2) Contrast with 
auxiliary storage. 

mark. A symbol or symbols that indicate the beginning or the end 
of a field, of a word, of an item of data, or of a set of data such as 
a file, a record, or a block. 

mask. (1) A pattern of characters that is used to control the 
retention or elimination of portions of another pattern of 
characters. (2) To use a pattern of characters to control the 
retention or elimination of portions of another pattern of 
characters. 

masked. Synonym for disabled. 

matrix. (1) A rectangular array of elements, arranged in rows and 
columns, that may be manipulated according to the rules of matrix 
algebra. (2) In computers, a logic network in the form of an array 
of input leads and output leads with logic elements connected at 
some of their intersections. 

matrix printer. A printer in which each character is represented 
by a pattern of dots; for example, a stylus printer, a wire printer. 
Synonymous with dot printer. 



Glossary-20 



Mb. 1 048 576 bytes. 

mega (M). Prefix 1 000 000. 

megahertz (MHz). 1 000 000 hertz. 

memory. Term for main storage. 

meter (m). A unit of length (equivalent to 39.37 inches). 

MFM. Modified frequency modulation. 
MHz. Megahertz; 1 000 000 hertz. 
micro (n). Prefix 0.000 001. 

microcode. (1) One or more microinstructions. (2) A code, 
representing the instructions of an instruction set, implemented in 
a part of storage that is not program-addressable. 

microinstruction. (1) An instruction of microcode. (2) A basic or 
elementary machine instruction. 

microprocessor. An integrated circuit that accepts coded 
instructions for execution; the instructions may be entered, 
integrated, or stored internally. 

microsecond (jus). 0.000 001 second. 

miffi(m). Prefix 0.001. 

milliampere (mA). 0.001 ampere. 

millisecond (ms). 0.001 second. 

mnemonic. A symbol chosen to assist the human memory; for 
example, an abbreviation such as "mpy" for "multiply". 



Glossary-21 



mode. (1) A method of operation; for example, the binary mode, 
the interpretive mode, the alphanumeric mode. (2) The most 
frequent value in the statistical sense. 

modem (modulator-demodulator). A device that converts serial 
(bit by bit) digital signals from a business machine (or data 
communication equipment) to analog signals that are suitable for 
transmission in a telephone network. The inverse function is also 
performed by the modem on reception of analog signals. 

modified frequency modulation (MFM). The process of varying 
the amplitude and frequency of the 'write' signal. MFM pertains 
to the number of bytes of storage that can be stored on the 
recording media. The number of bytes is twice the number 
contained in the same unit area of recording media at single 
density. 

modulation. The process by which some characteristic of one 
wave (usually high frequency) is varied in accordance with 
another wave or signal (usually low frequency). This technique is 
used in modems to make business-machine signals compatible 
with communication facihties. 

modulation rate. The reciprocal of the measure of the shortest 
nominal time interval between successive significant instants of 
the modulated signal. If this measure is expressed in seconds, the 
modulation rate is expressed in baud. 

module. (1) A program unit that is discrete and identifiable with 
respect to compiling, combining with other units, and loading. (2) 
A packaged functional hardware unit designed for use with other 
components. 

modulo check. A calculation performed on values entered into a 
system. This calculation is designed to detect errors. 

monitor. (1) A device that observes and verifies the operation of 
a data processing system and indicates any significant departure 
from the norm. (2) Software or hardware that observes, 
supervises, controls, or verifies the operations of a system. 

most-significant digit. The leftmost (non-zero) digit. See also 
high-order position. 



Glossary-22 



ms. Millisecond; 0.001 second. 

multiplexer. A device capable of interleaving the events of two or 
more activities, or capable of distributing the events of an 
interleaved sequence to the respective activities. 

multiprogramming. (1) Pertaining to the concurrent execution of 
two or more computer programs by a computer. (2) A mode of 
operation that provides for the interleaved execution of two or 
more computer programs by a single processor. 



n. Prefix nano; 0.000 000 001. 



NAND. A logic operator having the property that if P is a 
statement, Q is a statement, R is a statement,..., then the NAND 
of P, Q ,R,... is true if at least one statement is false, false if all 
statements are true. 

NAND gate. A gate in which the output is only if all inputs are 
1. 



nano(n). Prefix 0.000 000 001. 

nanosecond (ns). 0.000 000 001 second. 

negative true. Synonym for active low. 

negative-going edge. The edge of a pulse or signal changing in a 
negative direction. Synonymous with falling edge. 

non-retum-to-zero change-on-ones recording (NRZI). A 

transmission encoding method in which the data terminal 
equipment changes the signal to the opposite state to send a 
binary 1 and leaves it in the same state to send a binary 0. 

non-retum-to-zero (inverted) recording (NRZI). Deprecated term 
for non-return-to-zero change-on-ones recording. 



Glossary-23 



NOR. A logic operator having the property that if P is a 
statement, Q is a statement, R is a statement,..., then the NOR of 
P, Q, R,... is true if all statements are false, false if at least one 
statement is true. 

NOR gate. A gate in which the output is only if at least one 
input is 1 . 

NOT. A logical operator having the property that if P is a 
statement, then the NOT of P is true if P is false, false if P is true. 

NRZI. Non-return-to-zero change-on-ones recording. 
ns. Nanosecond; 0.000 000 001 second. 
NUL. The null character. 



null character (NUL). A control character that is used to 
accompUsh media-fill or time-fill, and that may be inserted into or 
removed from, a sequence of characters without affecting the 
meaning of the sequence; however, the control of the equipment 
or the format may be affected by this character. 



odd-even check. Synonym for parity check. 

offline. Pertaining to the operation of a functional unit without 
the continual control of a computer. 

one-shot. A circuit that delivers one output pulse of desired 
duration for each input (trigger) pulse. 

open circuit. (1) A discontinuous circuit; that is, one that is 
broken at one or more points and, consequently, cannot conduct 
current. Contrast with closed circuit. (2) Pertaining to a no-load 
condition; for example, the open-circuit voltage of a power 
supply. 



Glossary-24 



open coUector. A switching transistor without an internal 
connection between its collector and the voltage supply. A 
connection from the collector to the voltage supply is made 
through an external (pull-up) resistor. 

operand. (1) An entity to which an operation is applied. (2) That 
which is operated upon. An operand is usually identified by an 
address part of an instruction. 

operating system. Software that controls the execution of 
programs; an operating system may provide services such as 
resource allocation, scheduling, input/output control, and data 
management. 



OR. A logic operator having the property that if P is a statement, 
Q is a statement, R is a statement,..., then the OR of P, Q, R,...is 
true if at least one statement is true, false if all statements are 
false. 

OR gate. A gate in which the output is 1 only if at least one input 
is 1. 



output. Pertaining to a device, process, or channel involved in an 
output process, or to the data or states involved in an output 
process. 

output process. (1) The process that consists of the delivery of 
data from a data processing system, or from any part of it. (2) 
The return of information from a data processing system to an 
end user, including the translation of data from a machine 
language to a language that the end user can understand. 

overcurrent. A current of higher than specified strength. 

overflow indicator. (1) An indicator that signifies when the last 
line on a page has been printed or passed. (2) An indicator that is 
set on if the result of an arithmetic operation exceeds the capacity 
of the accumulator. 

overrun. Loss of data because a receiving device is unable to 
accept data at the rate it is transmitted. 



Glossary-25 



overvoltage. A voltage of higher than specified value. 



parallel. (1) Pertaining to the concurrent or simultaneous 
operation of two or more devices, or to the concurrent 
performance of two or more activities. (2) Pertaining to the 
concurrent or simultaneous occurrence of two or more related 
activities in multiple devices or channels. (3) Pertaining to the 
simultaneity of two or more processes. (4) Pertaining to the 
simultaneous processing of the individual parts of a whole, such as 
the bits of a character and the characters of a word, using 
separate facilities for the various parts. (5) Contrast with serial. 

parameter. (1) A variable that is given a constant value for a 
specified application and that may denote the application. (2) A 
name in a procedure that is used to refer to an argument passed to 
that procedure. 

parity bit. A binary digit appended to a group of binary digits to 
make the sum of all the digits either always odd (odd parity) or 
always even (even parity). 

parity check. (1) A redundancy check that uses a parity bit. (2) 
Synonymous with odd-even check. 



PEL. Picture element. 



personal computer. A small home or business computer that has a 
processor and keyboard and that can be connected to a television 
or some other monitor. An optional printer is usually available. 

phototransistor. A transistor whose switching action is controlled 
by light shining on it. 

picture element (PEL). The smallest displayable unit on a display. 

polling. (1) Interrogation of devices for purposes such as to avoid 
contention, to determine operational status, or to determine 
readiness to send or receive data. (2) The process whereby 
stations are invited, one at a time, to transmit. 



Glossary-26 



port. An access point for data entry or exit. 

positive true. Synonym for active high. 

positive-going edge. The edge of a pulse or signal changing in a 
positive direction. Synonymous with rising edge. 

potentiometer. A variable resistor with three terminals, one at 
each end and one on a slider (wiper). 

power supply. A device that produces the power needed to 
operate electronic equipment. 

printed circuit. A pattern of conductors (corresponding to the 
wiring of an electronic circuit) formed on a board of insulating 
material. 

printed-circuit board. A usually copper-clad plastic board used to 
make a printed circuit. 

priority. A rank assigned to a task that determines its precedence 
in receiving system resources. 

processing program. A program that performs such functions as 
compiUng, assembling, or translating for a particular programming 
language. 

processing unit. A functional unit that consists of one or more 
processors and all or part of internal storage. 

processor. (1) In a computer, a functional unit that interprets and 
executes instructions. (2) A functional unit, a part of another 
unit such as a terminal or a processing unit, that interprets and 
executes instructions. (3) Deprecated term for processing 
program. (4) See microprocessor. 

program. (1) A series of actions designed to achieve a certain 
result. (2) A series of instructions telling the computer how to 
handle a problem or task. (3) To design, write, and test computer 
programs. 

programmable read-only memory (PROM). A read-only memory 
that can be programmed by the user. 



Glossary-27 



programming language. (1) An artificial language established for 
expressing computer programs. (2) A set of characters and rules 
with meanings assigned prior to their use, for writing computer 
programs. 

programming system. One or more programming languages and 
the necessary software for using these languages with particular 
automatic data-processing equipment. 



PROM. Programmable read-only memory. 



propagation delay. (1) The time necessary for a signal to travel 
from one point on a circuit to another. (2) The time delay 
between a signal change at an input and the corresponding change 
at an output. 

protocol. (1) A specification for the format and relative timing of 
information exchanged between communicating parties. (2) The 
set of rules governing the operation of functional units of a 
communication system that must be followed if communication is 
to be achieved. 

pulse. A variation in the value of a quantity, short in relation to 
the time schedule of interest, the final value being the same as the 
initial value. 



radio frequency (RF). An ac frequency that is higher than the 
highest audio frequency. So called because of the application to 
radio communication. 

radix. (1) In a radix numeration system, the positive integer by 
which the weight of the digit place is multiplied to obtain the 
weight of the digit place with the next higher weight; for example, 
in the decimal numeration system the radix of each digit place is 
10. (2) Another term for base. 

radix numeration system. A positional representation system in 
which the ratio of the weight of any one digit place to the weight 



Glossary-28 



of the digit place with the next lower weight is a positive integer 
(the radix). The permissible values of the character in any digit 
place range from to one less than the radix. 



RAM. Random access memory. Read/write memory. 
random access memory (RAM). Read/ write memory. 
RAS. In the IBM Personal Computer, row address strobe. 



raster. In computer graphics, a predetermined pattern of lines 
that provides uniform coverage of a display space. 

read. To acquire or interpret data from a storage device, from a 
data medium, or from another source. 

read-only memory (ROM). A storage device whose contents 
cannot be modified. The memory is retained when power is 
removed. 

read/ write memory. A storage device whose contents can be 
modified. Also called RAM. 

recoverable error. An error condition that allows continued 
execution of a program. 

red-green-blue-intensity (RGB!). The description of a 
direct-drive color monitor that accepts input signals of red, green, 
blue, and intensity. 

redundancy check. A check that depends on extra characters 
attached to data for the detection of errors. See cyclic redundancy 
check. 

register. (1) A storage device, having a specified storage capacity 
such as a bit, a byte, or a computer word, and usually intended for 
a special purpose. (2) A storage device in which specific data is 
stored. 



Glossary-29 



retry. To resend the current block of data (from the last EOB or 
ETB) a prescribed number of times, or until it is entered correctly 
or accepted. 

reverse video. A form of highUghting a character, field, or cursor 
by reversing the color of the character, field, or cursor with its 
background; for example, changing a red character on a black 
background to a black character on a red background. 



RF. Radio frequency. 

RF modulator. The device used to convert the composite video 
signal to the antenna level input of a home TV. 

RGBL Red-green-blue-intensity. 

rising edge. Synonym for positive-going edge. 

ROM. Read-only memory. 

ROM/BIOS. The ROM resident basic input/output system, 
v^hich provides the level control of the major I/O devices in the 
computer system. 



row address strobe (RAS). A signal that latches the row address in 
a memory chip. 



RS-232C. A standard by the EIA for communication between 
computers and external equipment. 

RTS. Request to send. Associated with modem control. 



run. A single continuous performance of a computer program or 
routine. 



Glossary-30 



schematic. The representation, usually in a drawing or diagram 
form, of a logical or physical structure. 



Schottky TTL. A version (S series) of TTL with faster switching 
speed, but requiring more power. See also transistor-transistor 
logic and low power Schottky TTL. 

SDLC. Synchronous Data Link Control 



sector. That part of a track or band on a magnetic drum, a 
magnetic disk, or a disk pack that can be accessed by the 
magnetic heads in the course of a predetermined rotational 
displacement of the particular device. 



SERDES. Serializer/deserializer. 



serial. (1) Pertaining to the sequential performance of two or 
more activities in a single device. In English, the modifiers serial 
and parallel usually refer to devices, as opposed to sequential and 
consecutive, which refer to processes. (2) Pertaining to the 
sequential or consecutive occurrence of two or more related 
activities in a single device or channel. (3) Pertaining to the 
sequential processing of the individual parts of a whole, such as 
the bits of a character or the characters of a word, using the same 
facilities for successive parts. (4) Contrast with parallel. 

serializer/deserializer (SERDES). A device that serializes output 
from, and deserializes input to, a business machine. 

setup. (1) In a computer that consists of an assembly of 
individual computing units, the arrangement of interconnections 
between the units, and the adjustments needed for the computer 
to operate. (2) The preparation of a computing system to 
perform a job or job step. Setup is usually performed by an 
operator and often involves performing routine functions, such as 
mounting tape reels. (3) The preparation of the system for 
normal operation. 



Glossary-31 



short circuit. A low-resistance path through which current flows, 
rather than through a component or circuit. 

signal. A variation of a physical quantity, used to convey data. 

sink. A device or circuit into which current drains. 

software. (1) Computer programs, procedures, and rules 
concerned with the operation of a data processing system. (2) 
Contrast with hardware. 

source. The origin of a signal or electrical energy. 

square wave. An alternating or pulsating current or voltage whose 
waveshape is square. 

square wave generator. A signal generator delivering an output 
signal having a square waveform. 

SS. Start-stop. 



start bit. (1) A signal to a receiving mechanism to get ready to 
receive data or perform a function. (2) In a start-stop system, a 
signal preceding a character or block that prepares the receiving 
device for the reception of the code elements. 

start-of-text (STX). A transmission control character that 
precedes a text and may be used to terminate the message 
heading. 

start-stop system. A data transmission system in which each 
character is preceded by a start bit and is followed by a stop bit. 

start-stop (SS) transmission. (1) Asynchronous transmission such 
that a group of signals representing a character is preceded by a 
start bit and followed by a stop bit. (2) Asynchronous 
transmission in which a group of bits is preceded by a start bit 
that prepares the receiving mechanism for the reception and 
registration of a character and is followed by at least one stop bit 
that enables the receiving mechanism to come to an idle condition 
pending the reception of the next character. 



Glossary-32 



static memory. RAM memory using flip-flops as the memory 
elements. Data is retained as long as power is applied to the 
flip-flops. Contrast with dynamic memory. 

stop bit. ( 1 ) A signal to a receiving mechanism to wait for the 
next signal. (2) In a start-stop system, a signal following a 
character or block that prepares the receiving device for the 
reception of a subsequent character or block. 

storage. (1) A storage device. (2) A device, or part of a device, 
that can retain data. (3) The retention of data in a storage device. 
(4) The placement of data into a storage device. 

strobe. An instrument that emits adjustable-rate flashes of light. 
Used to measure the speed of rotating or vibrating objects. 



STX. Start-of-text. 



symbol. (1) A conventional representation of a concept or a 
representation of something by reason of relationship, 
association, or convention. (2) A representation of something by 
reason of relationship, association, or convention. 

synchronization. The process of adjusting the corresponding 
significant instants of two signals to obtain the desired phase 
relationship between these instants. 



Synchronous Data Link Control (SDLC). A protocol for 
management of data transfer over a data link. 



synchronous transmission. (1) Data transmission in which the time 
of occurrence of each signal representing a bit is related to a fixed 
time frame. (2) Data transmission in which the sending and 
receiving devices are operating continuously at substantially the 
same frequency and are maintained, by means of correction, in a 
desired phase relationship. 

syntax. (1) The relationship among characters or groups of 
characters, independent of their meanings or the manner of their 



Glossary-33 



interpretation and use. (2) The structure of expressions in a 
language. (3) The rules governing the structure of a language. 
(4) The relationships among symbols. 



text. In ASCII and data communication, a sequence of characters 
treated as an entity if preceded and terminated by one STX and 
one ETX transmission control character, respectively. 

time-out. (1) A parameter related to an enforced event designed 
to occur at the conclusion of a predetermined elapsed time. A 
time-out condition can be cancelled by the receipt of an 
appropriate time-out cancellation signal. (2) A time interval 
allotted for certain operations to occur; for example, response to 
polling or addressing before system operation is interrupted and 
must be restarted. 

track. (1) The path or one of the set of paths, parallel to the 
reference edge on a data medium, associated with a single reading 
or writing component as the data medium moves past the 
component. (2) The portion of a moving data medium such as a 
drum, or disk, that is accessible to a given reading head position. 

transistor-transistor logic (TTL). A popular logic circuit family 
that uses multiple-emitter transistors. 

translate. To transform data from one language to another. 

transmission. (1) The sending of data from one place for 
reception elsewhere. (2) In ASCII and data communication, a 
series of characters including headings and text. (3) The 
dispatching of a signal, message, or other form of intelligence by 
wire, radio, telephone, or other means. (4) One or more blocks 
or messages. For BSC and start-stop devices, a transmission is 
terminated by an EOT character. (5) Synonymous with data 
transmission. 



TTL. Transistor-transistor logic. 

V. Volt. 



Glossary-34 



video. Computer data or graphics displayed on a cathode ray 
tube, monitor, or display. 

volt. The basic practical unit of electric pressure. The potential 
that causes electrons to flow through a circuit. 



W. Watt. 



watt. The practical unit of electric power. 

word- (1) A character string or a bit string considered as an 
entity. (2) See computer word. 

write. To make a permanent or transient recording of data in a 
storage device or on a data medium. 

write precompensation. The varying of the timing of the head 
current from the outer tracks to the inner tracks of the diskette to 
keep a constant 'write' signal. 



Glossary-35 



Notes: 



Glossary-36 



Bibliography 



• Microprocessor and Peripheral Handbook 

- INTEL CorpoTSition.2 10844,001 

• Introduction to the iAPX 286 

- INTEL Corporation.2i0505.007 

• iAPX 286 Operating Systems Writer's Guide 

- INTEL Corporation. 121 960. 001 

• iAPX 286 Programmer's Reference Manual 

- INTEL Corporation.2i 0^95. 007 

• iAPX 286 Hardware Reference Manual 

- INTEL Corporation.27 0760. 007 

• Numeric Processor Extension Data Sheet 

- INTEL Corporation.27 0P20 

• 80287 Support Library Reference Manual 

- INTEL Corporation. 72272P 

• National Semiconductor Corporation. NS 16450 

• Motorola Microprocessor's Data Manual 

- Motorola Inc. Series B 



Bibliography- 1 



Notes: 



Bibliography-2 



Index 



AAA 6-8 
AAD 6-9 
AAM 6-9 

AAS 6-9 

access time, track-to-track 9-22 

ADC 6-6 

ADD 6-6 

additional ROM modules 5-12 

address generation, DMA 1-13 

address latch enable 1-26 

address latch enable, buffered 1-23 

address mode 

real 1-4 
address space, I/O 1-15 
address, segment 1-4 
addresses, CMOS RAM 1-45 
addresses, page register 1-13 
AEN 1-23, 1-26 
ALE 9-3 
alternate key 5-19 
AND 6-10 
APL 9-5 

application guideUnes 9-5 
arithmetic instructions 6-6, 6-27 
ARPL 6-22 
ASCII, extended 5-12 



Index- 1 



B 



BALE 1-22, 1-23 

bandwith 1-7 

BASIC 9-5 

basic assurance test 4-4 

BASIC interrupts 5-6 

BAT 4-4 

battery connector 1-58 

BHE 1-13 

BIOS fixed disk parameters 1-51 

BIOS memory map 5-10 

BIOS programming hints 5-10 

block diagram 

keyboard interface 1-38 

system xv 

system board 1-6 

system timer 1-9 
board, system 1-3 
BOUND 6-19 
break code 4-4, 4-10 
break key 5-19 
buffer, keyboard 4-3 
buffered address latch enable 1-23 
buffers, video display 9-10 
bus controller 1-23 
bus cycle 1-7 
busy loop 9-11 
bypassing BIOS 9-22 
byte high enable 1-13 



CALL 6-14 

cancellation, multi-tasking 9-21 

capacitor, variable 1-31 

caps lock key 5-19 

CBW 6-10 



Index-2 



channel, I/O 1-15 

channels, DMA 1-7,1-12,1-15 

character codes 5-13 

classes, wait loop 9-13 

CLC 6-19 

CLD 6-20 

CLI 6-20 

CLK 1-22 

clock 

real-time 1-45 
clock cycle 1-7 

clock line, keyboard 1-43, 4-5, 4-14, 4-15 
clock, system 1-22 
CMC 6-19 
CMOS RAM 1-45 
CMOS RAM addresses 1-45 
CMOS RAM configuration 1-48 
CMOS RAM I/O operations 1-54 
CMP 6-8 
CMPS 6-12, 6-13 
COBAL 9-5 
code 

device driver 9-11 

machine identification 9-23 

machine-sensitive 9-23 
codes 

character 5-13 

extended 5-17 

multi-tasking function 9-11 
color burst signal 1-31 
command codes, DMA controller 1-14 
commands 

I/O 9-8 

keyboard 4-12 

keyboard controller 1-40 

keyboard system 4-5 
comparison instructions 6-25 
compatibility, hardware 9-3 
completion, multi-tasking 9-21 
condition, wait 9-12 
configuration record 1-45 
configuration, CMOS RAM 1-48 



Index-3l 



connectors 

battery 1-58 

I/O channel 1-15,1-17,1-18,1-19 

keyboard 1-58, 4-23 

power LED and keylock 1-58 

power supply 1-57 

power supply output 3-6 

speaker 1-57 

system board 1-57 
constants instructions 6-26 
control 

game 9-10 

sound 9-10 
control key 5-19 
control transfer instructions 6-13 
controller, keyboard 1-31 
controllers 

bus 1-23 

DMA 1-7, 1-12, 1-13, 1-22 

interrupt 1-10 

refresh 1-7 
controls, math coprocessor 1-29 
coprocessor programming 2-3 
coprocessor, math 2-3 
copy protection 9-11, 9-22 
Ctrl state 5-17 
CTS 6-20 
CWD 6-10 
cycle 

bus 1-7 

clock 1-7 

microprocessor 1-7 



D 



DACK0-DACK3 1-26 

DACK5-DACK7 1-26 

DAS 6-9 

data area, ROM BIOS 9-10 

data communication equipment 8-3 

data input, keyboard 4-15 

Index-4 



data line, keyboard 1-43, 4-5, 4-14, 4-15 

data output, keyboard 4-15 

data stream 4-14 

data terminal equipment 8-3 

data transfer instructions 6-3, 6-24 

data transfer rate, diskette 9-22 

DEC 6-8 

decodes, memory 1-22, 1-23 

default segment workspace 5-9 

descriptors 1-5 

device driver code 9-11 

diagnostic checkpoint port 1-29 

direct memory access 1-12 

disk pointer 9-8 

disk_base 9-8,9-22 

diskette change signal 9-23 

diskette data transfer rate 9-22 

diskette rotational speed 9-22 

diskette track density 9-22 

diskette write current 9-23 

DIV 6-9 

divide error exception 9-7 

DMA 1-12 

DMA address generation 1-13 

DMA channels 1-7,1-12,1-15 

DMA controller 1-7, 1-22 

DMA controller command codes 1-14 

DMA controller 1 1-12 

DMA controller 2 1-13 

DMA controllers 1-12 

DOS 9-6 

DOS function calls 9-7 

DOS interrupts 5-6 

DRQ0-DRQ3 1-25 

DRQ5-DRQ7 1-25 

dummy load 3-4 



Index-5 



EIA/CCITT 8-3 

encoding, keyboard 5-12 

ENTER 6-18 

ESC 6-20 

exception, divide error 9-7 

extended ASCII 5-12 

extended codes 5-17 



FABS 6-28 
FADD 6-27 
fan out 3-6 
FCHS 6-28 
FCLEX 6-30 
FCOM 6-25 
FCOMP 6-25 
FCOMPP 6-26 
FDECSTP 6-31 
FDIV 6-27 
FFREE 6-31 
FIFO 4-3 
FINCSTP 6-31 
FINT 6-29 
FLD 6-24 
FLDCW 6-30 
FLDENV 6-30 
FLDLG2 6-27 
FLDLN2 6-27 
FLDL2T 6-26 
FLDPl 6-26 
FLDZ 6-26 
FLDl 6-26 
FMUL 6-27 
FNOP 6-31 
FORTRAN 9-5 



Index-6 



FPATAN 6-29 

FPREM 6-28 

FPTAN 6-29 

French keyboard 4-19 

FRNDINT 6-28 

FRSTOR 6-30 

FSAVE 6-30 

FSCALE 6-28 

FSETPM 6-29 

FSQRT 6-28 

EST 6-24 

FSTCW 6-30 

FSTENV 6-30 

FSTP 6-25 

FSTSW 6-30 

FSTSWAX 6-30 

FSUB 6-27 

FTST 6-26 

function calls, DOS 9-7 

function codes, multi-tasking 9-14 

FXAM 6-26 

FXCH 6-25 

EXTRACT 6-28 

FYL2X 6-29 

FYL2XP1 6-29 

F2XM1 6-29 



G 



game control 9-10 
gap length parameter 9-9 
generator, refresh request 1- 
German keyboard 4-20 
graphics modes 5-8 
guidelines, application 9-5 



Index-71 



H 



hard code 5-10 
hardware compatibility 9-3 
hardware interrupts 5-6 
HLT 6-20 
hooks 9-11 



I 



I/O address map 1-28 

I/O address space 1-15 

I/OCHCK 1-23, 1-30 

I/OCHRDY 1-24 

I/O channel 1-15 

I/O channel check 1-23 

I/O channel connectors 1-15, 1-17, 1-18, 1-19 

I/O channel ready 1-24 

I/O channel signals 1-22 

I/O chip select 1-27 

I/O commands 9-7 

I/OCS16 1-27 

I/O ports, keyboard controller 1-43 

I/Oread 1-24 

I/O write 1-24 

IDIV 6-9 

IIMUL 6-9 

IMR 9-10 

IMUL 6-9 

IN 6-5 

INC 6-7 

inhibit keyboard 1-37 

input buffer, keyboard controller 1-40 

input port, keyboard controller 1-44 

input requirements 3-3 

inputs, power supply 3-3 

INS 6-12,6-13 



Index-8 



instructions 

aritlimetic 6-6, 6-27 

comparison 6-25 

constants 6-26 

control transfer 6-13 

data transfer 6-3,6-24 

logic 6-10 

processor control 6-19 

protection control 6-21 

shift rotate 6-10 

string manipulation 6-12 
INT 6-18 

interface, keyboard 4-3 
interfaces, multi-tasking 9-12 
interfaces, SYS code 9-18 
interrupt controller 1-10 
interrupt mask register 9-10 
interrupt service routine 1-24 
interrupt vectors 9-10 
interrupt, single step 9-7 
interrupts 1-15, 5-5 

BASIC 5-6 

DOS 5-6 

hardw^are 5-6 

program 5-3 

system 1-10 
INTO 6-19 
lOR 1-24 
lOW 1-24 
IRET 6-19 
IRQ 2 9-8 
IRQ 9 9-4,9-8 
IRQ14-IRQ15 1-24 
IRQ3-IRQ7 1-24 
IRQ9 1-24 
Italian keyboard 4-21 



JB/JNAE 6-16 
JBE/JNA 6-16 



Index-9| 



JCXZ 6-18 


JE/JZ 6-16 


JL/JNGE 6-16 


JLE/JNG 6-16 


JMP 6-14 


JNB/JAE 6-17 


JNBE/JA 6-17 


JNE/JNZ 6-16 


JNL/JGE 6-17 


JNLE/JG 6-17 


JNO 6-17 


JNP/JPO 6-17 


JNS 6-17 


JO 6-16 


joystick support 5-6 


JP/JPE 6-16 


JS 6-16 


jumper, RAM 1-30 



K 



key scan codes 4-10 

keyboard 
buffer 4-3 

clock line 1-43,4-5,4-14,4-15 
commands 4-12 
connector 1-58,4-23 
controller 1-31 
controller commands 1-40 
controller I/O ports 1-43 
controller input buff er 1-40 
controller input port 1-44 
controller output buff er 1-40 
controller output port 1-44 
controller status register 1-38 
controller test input port 1-44 
data input 4-15 
data line 1-43, 4-5, 4-14, 4-15 
data output 4-15 
encoding 5-12 



Index- 10 



inhibit switch 1-37 

interface 4-3 

interface block diagram 1-38 

layout 1-33,4-10,5-14 

outputs 4-10 

routine 5-21 

specifications 4-23 

system commands 4-5 
keyboard, French 4-19 
keyboard, German 4-20 
keyboard, Italian 4-21 
keyboard, Spanish 4-22 
keyboard, U.K. English 4-18 
keyboard, U.S. English 4-17 
keylock 4-3 
keys 4-3 

alternate 5-19 

break 5-19 

caps lock 5-19 

combinations 5-20 

control 5-19 

number lock 5-20 

pause 5-19 

print screen 5-19 

scroll lock 5-20 

shift 5-18 

SYSREQ 9-15 

system request 5-6, 5-20 
keys, typematic 4-4 



LAHF 6-6 

LAR 6-22 

layout system board 1-60 

layout, keyboard 1-33, 4-10, 5-14 

LA17-LA23 1-22 

LDS 6-5 

LEA 6-5 

LEAVE 6-18 



Index-Ill 



LED 4-4 

LES 6-6 

LGDT 6-21 

LIDT 6-21 

light emitting diodes 4-4 

line contention 4-15 

line, multipoint 8-5 

line, point-to-point 8-5 

LLDT 6-21 

LMSW 6-22 

load current 3-3 

LOCK 6-20 

LODS 6-12,6-13 

logic instructions 6-10 

LOOP 6-17 

loop, busy 9-12 

LOOPNZ/LOOPNE 6-18 

loops, program 9-10 

LOOPZ/LOOPE 6-18 

LSL 6-22 

LTR 6-21 



M 



machine identification code 9-23 

machine-sensitive code 9-23 

make code 4-3, 4-10 

mask off 1-29 

mask on 1-29 

master 1-26 

math coprocessor 2-3, 9-6 

math coprocessor controls 1-29 

MEM chip select 1-27 

MEMCS16 1-27 

memory 1-4 

memory decodes 1-22,1-23 

memory locations, reserved 5-9 

memory map, BIOS 5-10 

MEMR 1-25 

MEMW 1-25 



Index- 12 



microprocessor 1-3, 1-4, 1-7 
microprocessor cycle 1-7 
modes, graphic 5-8 
modules, RAM 1-12 
modules, ROM/EPROM 1-11 
MOV 6-3 
MOVS 6-12, 6-13 
MUL 6-9 
multi-tasking 

cancellation 9-21 

completion 9-21 

function codes 9-14 

interfaces 9-12 

provisions 9-11 

serialization 9-12 

startup 9-12,9-20 

subsystems 9-16 
multipoint line 8-5 



N 



NEG 6-8 

network, nonswitched 8-5 

network, switched 8-5 

NMI 1-10, 1-29 

no load protection 3-5 

non-maskable interrupt 1-29 

nonswitched network 8-5 

NOT 6-12 

Num Lock state 5-17 

number lock key 5-20 



o 



operations, CMOS RAM I/O 1-54 
OR 6-11 



Index-13 



OSC 1-27, 1-31 

oscillator 1-27 

OUT 6-5 

output buffer, keyboard controller 1-40 

output port, keyboard controller 1-44 

output protection 3-4 

output voltage sense levels 3-6 

output voltage sequencing 3-4 

outputs, keyboard 4-10 

outputs, power supply 3-3 

OUTS 6-13 



page register addresses 1-13 
parameter 

gap length 9-9 

passing 5-4 

tables 9-8 
parameters, BIOS fixed disk 1-51 
PASCAL 9-5 
pause key 5-19 
performance, system 1-7 
point-to-point line 8-5 
POP 6-4 
POPA 6-4 
POPF 6-6.9-6 
POR 4-4 

port, diagnostic checkpoint 1-29 
POST 9-12 

power good signal 3-5, 3-6 
power LED and keylock connector 1-58 
power on reset 4-4 
power supply 

connectors 1-57 

inputs 3-3 

output connectors 3-6 

outputs 3-3 
print screen key 5-19 
priorities, shift key 5-20 



Index- 14 



processor control instructions 6-19 
program interrupts 5-3 
program loops 9-11 
programming hints, BIOS 5-10 
programming, coprocessor 2-3 
protected mode 1-5,5-6 
protection control instructions 6-21 
protection, no load 3-5 
provisions, multitasking 9-11 
PUSH 6-4 
PUSHSP 9-7 
PUSHA 6-4 
PUSHF 6-6 



R 



RAM jumper 1-30 
RAM modules 1-12 
RAM subsystem 1-12 
RAM, CMOS 1-45 
rate, typematic 4-4, 4-7 
real address mode 1-4, 2-5 
real mode 5-3 
real-time clock 1-45 
record, configuration 1-45 
refid=admod. virtual 1-4 
REFRESH 1-26 
refresh controller 1-7 
refresh request generator 1-8 
regulation tolerance 3-3 
requirements, input 3-3 
reserved memory locations 5-9 
reserved scan codes 1-36 
RESET DRV 1-23 
reset, system 5-21 
RET 6-15 
ROM BIOS 9-7 
ROM BIOS data area 9-10 
ROM modules, additional 5-12 
ROM scan codes 5-12 



Index- 15 



ROM subsystem 1-11 
ROM/EPROM modules 1-11 
rotational, speed 9-22 
routine, interrupt service 1-24 
routine, keyboard 5-21 
RS-232 8-3 



SAHF 6-6 

SA0-SA19 1-22 

SBB 6-7 

SBHE 1-26 

scan code translation 1-32 

scan codes 4-12 

scan codes, key 4-10 

scan codes, ROM 5-12 

SCAS 6-12,6-13 

scroll lock key 5-20 

SD)-SD15 1-23 

segment address 1-4 

segments 1-4 

sense levels, output voltage 3-6 

sequencing, output voltage 3-4 

serialization, multi-tasking 9-12 

SGDT 6-21 

shift counts 9-7 

shift key 5-18 

shift key priorities 5-20 

shift rotate instructions 6-10 

Shift state 5-17 

shift states 5-18 

SIDT 6-21 

signals 

diskette change 9-23 
power good 3-5, 3-6 
system clock 9-3 

signals, I/O channels 1-22 

single step interrupt 9-7 

SLDT 6-21 



Index- 16 



SMEMR 1-25 

SMEMW 1-25 

SMSW 6-22 

sound control 9-10 

Spanish keyboard 4-22 

speaker 1-30 

speaker connector 1-57 

speaker tone generation 1-9 

special vectors 5-6 

specifications, keyboard 4-23 

startup, multi-tasking 9-12,9-18 

states 

Ctrl 5-17 

NumLock 5-17 

Shift 5-17 
status register, keyboard controller 1-38 
STC 6-19 
STD 6-20 
STI 6-20 
STOS 6-12,6-13 
STR 6-22 

string manipulation instructions 6-12 
SUB 6-7 

subsystem, RAM 1-12 
subsystem, ROM 1-11 
subsystems, multi-tasking 9-16 
support joystick 5-6 
switched network 8-5 
switches 

keyboard inhibit 1-37 

type of display 1-31 
SYS code interfaces 9-18 
SYSREQkey 9-15 
system BIOS usage 5-3 
system block diagram xv 
system board 1-3 
system board block diagram 1-6 
system board connectors 1-57 
system board layout 1-60 
system bus high enable 1-26 
system clock 1-22 
system clock signal 9-3 
system interrupts 1-10 



Index- 17 



system performance 1-7 
system request key 5-6, 5-20 
system reset 5-21 
system timer block diagram 1-9 
system timers 1-8 



T/C 1-26 

table, translation 1-34 

tables, parameter 9-8 

terminal count 1-26 

TEST 6-11 

test input port, keyboard controller 1-44 

timeouts 9-15 

timer/counter 1-9 

timer/counters 1-8 

timers, system 1-8 

tone generation, speaker 1-9 

track density, diskette 9-22 

track-to-track access time 9-22 

translation table 1-34 

translation, scan code 1-32 

tri-state 1-26 

type of display adapter switch 1-31 

typematic keys 4-4 

typematic rate 4-4, 4-7 



u 



U.K. English keyboard 4-18 
U.S. English keyboard 4-17 



Index- 18 



variable capacitor 1-31 
vectors, special 5-6 
VERR 6-22 

video display buffers 9-10 
virtual address mode 1-4, 2-5 



w 



WAIT 6-20 

wait condition 9-12 

wait loop classes 9-13 

workspace, default segment 5-9 

write current, diskette 9-23 



XCHG 6-5 
XLAT 6-5 
XOR 6-11 



zero wait state 1-27 



Index-19 



Numerals 



OWS 1-27 
80286 1-3, 1-4, 1-7 
8042 1-31 
82288 1-23 
8237 A-5 1-12 
8254-2 1-8 
8259A 1-10 



Index-20 



T'="=^ The Personal Computer 

==?=^= Hardware Reference Library 

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1502494 

Printed in the Unitied States of America 



This package contains updated pages for the Technical Reference 
Option and Adapters manual. It also contains modules with 
information about specific IBM Personal Computer AT options. 
Replace your pages with the updated pages and add these modules 
in the following sections. 



Storage Devices 

• IBM Personal Computer AT High Capacity Diskette Drive 

• IBM Personal Computer AT Double Sided Diskette Drive 
. IBM Personal Computer AT 20MB Fixed Disk Drive 



Memory 



• IBM Personal Computer AT 128KB Memory Expansion 
Option 

• IBM Personal Computer AT 512KB Memory Expansion 
Option 



Adapters 

• IBM Personal Computer AT Serial/Parallel Adapter 

• IBM Personal Computer AT Fixed Disk and Diskette Adapter 

• IBM Personal Computer AT Prototype Adapter 



6137872 



Miscellaneous 

• IBM Personal Computer AT Prototype Adapter 

Cables and Connectors 

• IBM Personal Computer AT Communications Cable 



Contents 

Volume 1 

• Expansion Unit 

- IBM Expansion Unit 

• Displays 

- IBM Monochrome Display 

- IBM Portable Personal Computer Display 

- IBM Color Display 

• Printers 

- IBM Graphics Printer 

- IBM Personal Computer Color Printer 

- IBM PC Compact Printer 

• Storage Devices 

- IBM 5 1/4" Diskette Drive 

- IBM Slimline Diskette Drive 

- IBM 10MB Fixed Disk Drive 

- IBM Personal Computer AT High Capacity Diskette Drive 

- IBM Personal Computer AT Double Sided Diskette Drive 

- IBM Personal Computer AT 20MB Fixed Disk Drive 

• Memory Expansion 

- IBM 64/25 6KB Memory Expansion Option and IBM 
64KB Memory Module Kit 

- IBM Personal Computer AT 128KB Memory Expansion 
Option 

- IBM Personal Computer AT 512KB Memory Expansion 
Option 



vu 



Volume 2 

• Adapters 

- IBM Monochrome Display and Printer Adapter 

- IBM Color/ Graphics Monitor Adapter 

- IBM Printer Adapter 

- IBM 5 1/4" Diskette Drive Adapter 

- IBM Fixed Disk Adapter 

- IBM Personal Computer AT Fixed Disk and Diskette 
Adapter 

- IBM Asynchronous Communications Adapter 

- IBM Binary Synchronous Communications Adapter 

- IBM Synchronous Data Link Control (SDLC) 
Communications Adapter 

- IBM Personal Computer AT Serial/Parallel Adapter 

- IBM Cluster Adapter 

- IBM Game Control Adapter 

• Miscellaneous 

- IBM Prototype Card 

- IBM Personal Computer AT Prototype Adapter 

• Cables and Connectors 

- IBM PC Compact Printer Connector Adapter 

- IBM Communications Adapter Cable 

- IBM Personal Computer AT Communications Cable 



¥111 



System to Adapter Compatibility Chart 



The following chart identifies the adapters supported by each 
system. 





IBM Personal 
Computer 


IBM Personal 
Computer XT 


IBM Portable 

Personal 

Computer 


IBM Personal 
Computer AT 


Expansion 
Unit 


64KB Memory 
Module Kit 


Yes 


Yes 


Yes 


No 


No 


64/256KB Memory 
Expansion Option 


Yes 


Yes 


Yes 


No 


Yes 


128KB Memory 
Expansion Option 


No 


No 


No 


Yes 


No 


512KB Memory 
Expansion Option 


No 


No 


No 


Yes 


No 


Monochrome Display 
and Printer Adapter 


Yes 


Yes 


No 


Yes 


No 


Color/Graphics 
Monitor Adapter 


Yes 


Yes 


Yes 


Yes 


No 


Printer Adapter 


Yes 


Yes 


Yes 


No 


Yes 


5 1/4" Disl<ette 
Drive Adapter 


Yes 


Yes 


Yes 


No 


No 


Fixed Disk Drive 
Adapter 


Yes 


Yes 


No 


No 


Yes 


Fixed Disk and 
Diskette Adapter 


No 


No 


No 


Yes 


No 


Asynchronous 

Communications 

Adapter 


Yes 


Yes 


Yes 


No 


Yes 


Serial/Parallel 
Adapter 


No 


No 


No 


Yes 


No 


Binary Synchronous 

Communications 

Adapter 


Yes 


Yes 


Yes 


Yes 


Yes 


Synchronous Data 
Link Control (SDLC) 
Adapter 


Yes 


Yes 


Yes 


Yes 


Yes 


Cluster Adapter 


Yes 


Yes 


Yes 


No 


Yes 


Game Control 
Adapter 


Yes 


Yes 


Yes 


Yes 


Yes 


Prototype Card 


Yes 


Yes 


Yes 


No 


Yes 


Prototype Adapter 


No 


No 


No 


Yes 


No 



System to Adapter Compatibility Chart 



IX 



Option to Adapter Compatibility Chart 

Because some adapters perform multiple functions, the following 
chart identifies the options supported by each adapter. 







mAmSmmmm ■[/■'; '':-''' .'i ;V ' ':\^'\',\"-- --'<'^-. 








Double Sided Diskette Drive 








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High Capacity Diskette Drive 








Fixed Dtsk Drive 








20MB Fixed Disk Drive 








Monochrome Display 








Color Display 








6raphjcs Printer 




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Compact Printer 






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Joystick 








5 1/4" Diskette 
Drive Adapter 

Fixed Disk Drive 
Adapter 

Fixed Disk and 
Diskette Drive 
Adapter 

Color Graphics 
Monitor Adapter 

Monochrome Display 
and Printer Adapter 

Printer Adapter 

Asynchronous 

Communications 

Adapter 

Serial/Parallel 
Adapter 

Game Control 
Adapter 


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Contents 



Description 1 

Interfaces 1 

Input Signals 2 

Output Signals 4 

Specifications 5 

Logic Diagrams 7 



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IV 



Description 



The Double Sided Diskette Drive is a direct-access device that 
can store 320/360Kb of data on a dual-sided 5-1/4 inch diskette. 
All data format and access control is in the system. The following 
figure describes the type of diskette required by this drive. 



Characteristic 


Requirement 


Certification 


Double sided 




96TPI 




80 tracks /surf ace 




Soft sector 


Recording density 


9,646 bits per inch 


Media coercivity 


600 to 650 Oersteds 


Jacket 


Standard 5-1/4 inch 



Diskette Requirements 

The signals for operating the diskette drive are generated through 
the IBM Personal Computer AT Fixed Disk and Diskette Drive 
Adapter. 



Interfaces 



The diskette drive has two types of interface: control and dc 
power. The following figure shows the signals and pin 
assignments for the control interface. 



Double Sided Diskette Drive 1 



Signal Name 


I/O 


Signal Pin 


Ground Pin 


-Reduced write 


1 


2 


1 


Reserved 


- 


4 


3 


-Drive selects 


1 


6 


5 


-Index 





8 


7 


-Drive select 


1 


10 


9 


-Drive select 1 


1 


12 


11 


-Drive select 2 


1 


14 


13 


-Motor on 


1 


16 


15 


-Direction select 


1 


18 


17 


-Step 


1 


20 


19 


-Write data 


1 


22 


21 


-Write gate 


1 


24 


23 


-Track 00 





26 


25 


-Write protect 





28 


27 


-Read data 





30 


29 


-Side 1 select 


1 


32 


31 


-Diskette change 





34 


33 



Control Interface (P1/J1) 

Following are the signals and pin assignments for the dc power 
interface. 



Signal Name 


Pin 


+12 Vdc 
+12 Vdc return 
+5 Vdc return 
+5 Vdc 


1 
2 
3 
4 



Power Interface {P2/J2) 

All signals operate between -1-5 Vdc and ground with the 
following definitions: 

Inactive Level: -h2.5 to -h5.25 Vdc 

Active Level: 0.0 to -1-0.4 Vdc 

All outputs from the drive can sink 40 mA at the active level. The 
system provides pull-up registers. 



Input Signals 

All input signals are active when low. 



2 Double Sided Diskette Drive 



Drive Select through 3 

These ' drive select ' signals enable or disable all other drive 
interface signals, except ' motor on ' . When ' drive select ' is at 
the active level, the drive is enabled. When it is at the inactive 
level, all controlled inputs are ignored, and all drive outputs are 
disabled. The enabled or disabled condition of the drive is 
established within 500 nanoseconds after a change to the select 
input, excluding head-load time and settling times. 



-Motor On 

An active level of this signal starts the drive motor. There must 
be a 750 millisecond delay after * -motor on ' becomes active 
before any read or write operation starts. 



-Direction Select 

This signal determines the direction the read/write head moves 
when the step signal is pulsed. An active level indicates away 
from the center of the diskette (out); an inactive level indicates 
toward the center of the diskette (in). Any change in the 
' direction select ' signal must be made at least 1 microsecond 
before the leading edge of the step pulse, and at least 1 
microsecond after the trailing edge of the step pulse. 



-Step 

This signal causes the read/ write heads to move in the direction 
determined by the ' direction select ' signal. Motion is started 
each time the signal changes from an active to inactive level (at 
the trailing edge of the pulse). 



-Write Data 

Each time this signal changes from the inactive to inactive level, 
the current through the read/write heads reverses, thereby writing 



Double Sided Diskette Drive 3 



a data bit. This signal is enabled when ' write gate ' is at the 
active level. 



-Write Gate 

A 250-nanosecond active pulse of this signal causes a bit to be 
written on the diskette. These pulses may occur with either a 4, 
6, or 8 -microsecond spacing (±0.5%). After deactivating 'write 
gate ' , deactivation of ' drive select ' and ' motor on ' , and 
changing ' side select ' must be delayed 1 miUisecond, because the 
erase head is active for this period. 



-Side 1 Select 

This signal determines which side of the two-sided diskette will be 
used for reading or writing. An inactive level of this signal selects 
the read/ write head on the side of the diskette; an active level 
selects the 1 side. A 100-microsecond delay must be allowed 
after switching from one head to the other before starting to read 
or write. 



Output Signals 

-Index 

When the drive senses the index hole in the diskette, it generates a 
1- to 8-microsecond active pulse on this line. 

-Track 00 

An active level of this signal means that the read/write heads are 
at Track (the outermost track). 

-Write Protect 

An active level of this signal means that a diskette without a 
write-protect notch is in the drive. The drive will not write when 
a protected diskette is loaded. 



4 Double Sided Diskette Drive 



-Read Data 

A 250-nanosecond active pulse is provided on this line for each 
bit detected on the diskette. These pulses may occur with either 
4, 6, or 8-microsecond spacing. 



Specifications 



The following figures show the physical, and performance 
specifications for this drive. 



Power dissipation 


1 1 W (TYP) 


Operating linnits 


Ambient temperature 5 to 46 degrees 




Celsius (41 to 1 14.8 degrees Farenheit) 




Relative humidity 20 to 80 % 




Maximum wet bulb 29 degrees Celsius (84 




degrees Farenheit) 


Non-operating limits 


Ambient temperature -40 to 60 degrees 




Celcius (-40 to 140 degrees Farenheit) 




Humidity no condensation 


Mechanical dimensions 


Width 146.0 mm {5.8 in) 




Height 41 .0 mm (1.6 in) 




Depth 203.2 mm (8 in) 


Weight 


1.6 kg 



Physical Specifications 



Double Sided Diskette Drive 5 



Capacity unformatted 


1604Kb 


Capacity formatted 




1 5 sectors per track 


1.2Mb 


Recording density 


9646 bits per inch 


Track density 


96TPI 


Cylinders 


80 


Tracks 


160 


Encoding method 


MFM 


Rotational speed 


360 RPM 


Transfer rate 


500K bits/second 


Latency (average) 


83 ms 


Access time 




Average 


91 ms 


Track to track 


3 ms 


Settling time 


18 ms 


Head load time 


50 ms 


Motor start time 


750 milliseconds 



Performance Specifications 



6 Double Sided Diskette Drive 



Logic Diagrams 




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Double Sided Diskette Drive 7 



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Contents 



Description 1 

Interfaces 1 

Input Signals 2 

Output Signals 4 

Power Sequencing 5 

Drive-in-Use Indicator 5 

Specifications 5 

Logic Diagrams 7 



111 



Notes: 



IV 



Description 



The IBM Personal Computer AT High Capacity Diskette Drive is 
a direct-access device that can store 1.2Mb of data on a 
dual-sided 5-1/4 inch diskette. All data format and access 
control is in the system. The following figure describes the type 
of high-density diskette required by this drive. Diskettes, which 
meet these specifications may not be used in either a 160/ 180Kb 
or a 3 20/3 60Kb diskette drive. 



Characteristic 


Requirement 


Certification 


Double sided 




96TPI 




80 tracks /surface 




Soft sector 


Recording density 


9,646 bits per inch 


Media coercivity 


600 to 650 Oersteds 


Jacket 


Standard 5-1/4 inch 



Diskette Requirements 



The signals for operating the diskette drive are generated through 
the IBM Personal Computer AT Fixed Disk and Diskette Drive 
Adapter. 

Note: This drive also can read diskettes formatted for a 
320/360Kb dual-sided drive or a 160/180Kb single-sided 
drive. 



Interfaces 



The diskette drive has two types of interface: control and dc 
power. The following show the signals and pin assignments for 
the control interface. 



High Capacity Diskette Drive 1 



Signal Name 


I/O 


Signal Pin 


Ground Pin 


-Reduced write 


1 


2 


1 


Reserved 


- 


4 


3 


-Drive select 3 


1 


6 


5 


-Index 





8 


7 


-Drive select 


1 


10 


9 


-Drive select 1 


1 


12 


11 


-Drive select 2 


1 


14 


13 


-Motor on 


1 


16 


15 


-Direction select 


1 


18 


17 


-Step 


1 


20 


19 


-Write data 


1 


22 


21 


-Write gate 


1 


24 


23 


-Track 00 





26 


25 


-Write protect 





28 


27 


-Read data 





30 


29 


-Side 1 select 


1 


32 


31 


-Diskette change 





34 


33 



Control Interface (P1/J1) 

The signals and pin assignments for the dc power interface are as 
follows: 



Signal Name 


Pin 


+12 Vdc 
+12 Vdc return 
+5 Vdc return 
+5 Vdc 


1 
2 
3 
4 



DC Power Interface (P2/J2) 

All signals operate between +5 Vdc and ground with the 
following definitions: 

Inactive Level: +2.5 to +5.25 Vdc 

Active Level: 0.0 to +0.4 Vdc 

All outputs from the drive can sink 40 mA at the active level. The 
system provides pull-up registers. 

Input Signals 

Following are descriptions of the input signals. 



2 High Capacity Diskette Drive 



-Reduced Write 

The inactive state of this signal indicates that high-density media 
is present requiring normal write currents, and the active state 
indicates low-density media is present, requiring a reduced write 
current. 



-Drive Select 0, 1, 2, and 3 

The Drive Select signals enable or disable all other drive interface 
signals, except 'motor on' . When 'drive select ' is at the active 
level, the drive is enabled. When it is at the inactive level, all 
controlled inputs are ignored, and all drive outputs are disabled. 
The enabled or disabled condition of the drive is established 
within 500 nanoseconds after a change to the select input, 
excluding head-load time and settling time. 



-Motor On 

The spindle motor runs when this input is active. The drive 
requires a 1 second delay after ' -motor on ' becomes active 
before a read or write operation. 



-Direction Select 

If this input is at a inactive level the ' step ' input signal moves 
the heads away from the drive spindle. An active level causes the 
opposite. This input is stable for a minimum of 1 microsecond 
before and after the trailing edge of the step pulse. 



-Step 

A 1 -microsecond active pulse on this input causes the read/ write 
heads to move one track. The state of ' -Direction Select ' at the 
traiUng edge of the Step pulse determines the direction of motion. 



High Capacity Diskette Drive 3 



-Write Data 

A 150-nanosecond pulse on this input causes a bit to be written 
on the disk if Write Gate is active. These pulses may occur with 
either a 2, 3, 3.3, 4, 5, or 6. 67 -microsecond spacing ±0.5 %. 
When Write Gate is inactive, pulses do not appear on this input. 



-Write Gate 

An active level of this input enables the write current circuits, and 
the Write Data input controls the writing of information. 
Transitions of this line occur 4 to 8 microseconds before the first 
significant data bit, and 4 to 8 microseconds after the last 
significant data bit. Making this input inactive removes all 
current from the read/ write heads and allows the read circuits to 
operate within 590 microseconds All motor-start, head-settle, 
and head-load times are complied with before the line becomes 
active. 



-Side 1 Select 

Making this input active selects the upper head; otherwise the 
lower head is selected. 



Output Signals 

Following are descriptions of the output signals. 

-Index 

When a diskette's index hole aUgns with the hole in the diskette 
jacket, a 1- to 8-microsecond active pulse is generated on this 
line. 

-Track 00 

This signal is active when the upper head is on Track 00. 



4 Hiffh Canacitv Diskettt^ Drive 



-Write Protect 

This output is active when a diskette without a write-protect 
notch is inserted. It prevents the erasing or writing of data. 



-Read Data 

Each bit detected provides a 150-nanosecond active pulse on this 
line. These pulses may occur with either a 2, 3, 3.33, 4, 5, or 
6.67-microsecond spacing ±0.5%. 



-Diskette Change 

This output is active unless a diskette is present and a step pulse is 
received when the drive is selected. 



Power Sequencing 

The ' write gate ' signal is turned off and is kept off before power 
is switched on or off. The read/ write heads return to Track 00 
when the system power is switched on. 



Drive-in-Use Indicator 

The Drive-in-Use indicator lights when the drive is selected. 



Specifications 



The following figures show the performance, physical, and 
performance specifications for this drive. 



High Capacity Diskette Drive 5 



Power dissipation 


1 1 W (TYP) 


Operating limits 


Ambient temperature 5 to 46 degrees 




Celsius (41 to 1 14.8 degrees Farenheit) 




Relative humidity 20 to 80 % 




Maximum wet bulb 29 degrees Celsius (84 




degrees Farenheit) 


Non-operating limits 


Ambient temperature -40 to 60 degrees 




Celcius (-40 to 140 degrees Farenheit) 




Humidity no condensation 


Mechanical dimensions 


Width 146.0 mm (5.8 in) 




Height 41 .0 mm (1.6 in) 




Depth 203.2 mm (8 in) 


Weight 


1.6 kg 



Physical Specifications 



Capacity unformatted 


1604Kb 


Capacity formatted 




1 5 sectors per track 


1.2Mb 


Recording density 


9646 bits per inch 


Track density 


96TPI 


Cylinders 


80 


Tracks 


160 


Encoding method 


MFM 


Rotational speed 


360 RPM 


Transfer rate 


500K bits/second 


Latency (average) 


83 ms 


Access time 




Average 


91 ms 


Track to track 


3 ms 


Settling time 


18 ms 


Head load time 


50 ms 


Motor start time 


750 milliseconds 



Performance Specifications 



6 High Capacity Diskette Drive 



Logic Diagrams 




High Capacity Diskette Drive (Sheet 1 of 2) 



High Capacity Diskette Drive 7 



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High Capacity Diskette Drive (Sheet 2 of 2) 



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Contents 



Description 1 

Specifications 2 



IV 



Description 



The IBM Personal Computer AT Communications Cable cable is 
for connection of an IBM communications adapter with a 9-pin 
D-shell connector to a modem or other RS-232C DCE (data 
communications equipment). It is fully shielded and provides a 
high quality, low noise channel for interface between the 
communications adapter and DCE. 



Communications Cable 1 



Specifications 



One connector is a 9-pin D-shell connector and tlie other is a 
25 -pin D-shell connector. The pin numbering and connector 
specifications follow. 





Modem 

Connector 

Or Other RS-232 

Data Communications 

Equipment 




Communications 

Adapter 

Connector 




25-Pin 
D-Sheli 
Connector 



9-Pin 

D-Shell 

Connector 





8 


Carrier Detect 


1 




3 


Received Data 


2 




2 


Transmitted Data 


3 


DCE 


20 


Data Terminal Ready 


4 




Signal Ground 


5 


25-Pln 
Connector 


6 


Data Set Ready 


6 




4 


Request To Send 


7 




5 


Clear To Send 


8 




22 


Ring Indicator 


9 











ADAPTER 

9-Pln 
Connector 



NOTE: ALL OTHER PINS ON THE 25-PIN 
CONNECTOR ARE NOT USED. 

CONNECTOR SPECIFICATIONS 



2 Communications Cable 






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Contents 



Description 

Memory Cycles 

I/O Channel Check 

Addressing , 

Specifications 

Voltage Tolerances 

Power Dissipation 2 

Temperature Variation 2 

Logic Diagrams 3 



ui 



Notes: 



IV 



Description 



This adapter has 18 RAM modules (64K x 1) for a total capacity 
of 128Kb. 



Memory Cycles 

MEMR and MEMW commands require a 1 -wait-state, 3-clock 
memory cycle. Data moves as a byte (8 data bits and 1 parity bit) 
or as a word (16 data bits and 2 parity bits) and is parity-checked 
on the adapter. A parity error causes an I/O channel check 
(non-maskable interrupt) to the system. 



I/O Channel Check 

When the I/O channel check occurs, a non-maskable interrupt 
(NMI) results, and the status bits determine the source (one 
status bit is I/O channel check, and the other is system board 
parity check). Writing to the failing card will clear the status bit. 



Addressing 



This adapter responds to addresses from hex 080000 to hex 
09FFFF. 



Specifications 



Voltage Tolerances 

The maximum variation of the +5 Vdc is ±5% at the adapter 
pins. 



128KB Memory Expansion Option 1 



Power Dissipation 

The H-5-Vdc power used by the adapter is a maximum of 5.25 
watts, and the maximum current used is 1 ampere. 



Temperature Variation 

The adapter will operate between 10 and 50 degrees Celsius (50 
and 122 degrees Farenheit). 



2 128KB Memory Expansion Option 



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(SHT 7) +LAiq — 

(SHT 7) -BREFRESH- 

{SHT7) +LAI8 - 

(SHT 7) +LAI7 - 



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(SHT 3) + MDI? 
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(SHT 2) -BAO 
(SHT7)-Br«MR 
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(SHT 7) -BMEMW 
(SHT 3) -CS 



(SHT 8) +RESET DRV 




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Contents 



Description 1 

Adapter Design 3 

IBM Personal Computer AT Prototype Adapter 

Layout 7 

Interfaces 13 

Logic Diagrams 14 



m 



IV 



Description 



The IBM Personal Computer AT Prototype Adapter is 121.9 
millimeters (4.8 inches) high by 333.25 millimeters (13.12 inches) 
long and plugs into any system-unit expansion slot except number 
1 or 7. Two card-edge tabs, one 2-by 31- position and one 2-by 
18-position, provide all system control signals and voltages. 

The adapter has a voltage bus (+5 Vdc) and a ground bus (0 
Vdc). Each bus borders the adapter, with the ground bus on the 
component side and the voltage bus on the pin side. A system 
interface is also provided on the adapter with a jumper to specify 
whether the device has an 8- or a 16-bit data bus. 

This adapter also accommodates a D-shell connector from 9 to 37 
positions. 

Note: All components must be installed on the component 
side of the adapter. The total width of the adapter, including 
components, may not exceed 12.7 millimeters (0.5 inch). If 
these specifications are not met, components on the IBM 
Personal Computer AT Prototype Adapter may touch other 
adapters plugged into adjacent expansion slots. 

The following is a block diagram of the IBM Personal Computer 
AT Prototype Adapter. 



Prototype Adapter 1 



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I/O Read/Write -^^ 



Spare - 



Address Bit - 
Address Bit 2 -, 



Address Bit 3 - 
Address Bit 9 : 

Address Enable - 



Spare - 
Memory Read/Write - 



Command 

and 

Address 

Buffer 



Address Bit 



Address 
Buffer 



7^ 



I/O Address 

Decode 

Logic 



I/O Decode 



(Hex 300-31F Inclusive) 



Buffer 



System High Byte Enable 



+ S 



Jumper J1 



10KQ 

+8 Bit/-16 Bit Data Bus 



Bit 0-7 Data Bus 



Bus Direction 



Data Bus 



Bus Transceiver 



Data Bus 
Enable Logic 



Low Bus Enable 



/, 



Buffered 



1 DUIICICU 

Data Bus 
' Bits 0-7 



High Bus Enable 



Bus Direction 



Bit 8-15 Data Bus 



Bus 
Transceiver 



Data Bus 



\' 



,8 f Buffered 
/ Data Bus 



\' 



Bits 8-15 



Prototype Adapter Block Diagram 



Adapter Design 

The following information is provided to assist in designing an 
adapter using the IBM Personal Computer AT Prototype 
Adapter. 



Designing an Input/ Output Adapter 

The following information may be used to design an input/output 
type of adapter. 



Programming 

Insert a Jump instruction after all I/O read (lOR) or I/O write 
(lOW) assembler language instructions to avoid a potential timing 
problem caused by slow I/O devices. The following figure shows 
a typical programming sequence. 



Before 


After 


Your code 




Your code 


lOR 




lOR 


Your code 




JMP NEXT 




NEXT: 


Your code 



Program Sequence 



Jumper Wire (Jl) 



Your design can use either 8 bits of the data bus (jumper off) or 
the full 16 bits of the data bus (jumper on). Most devices have 
8-bit data buses. 



Wait-State Generator Circuits 

If your device runs too slow, you must add a wait-state generator 
to make the I/O read and write signals longer. First, determine 
the time needed by your device from the start of an lOR signal 
until it can put data on the system's data bus. Next, compare that 



Prototype Adapter 3 



time with the time given by the system's microprocessor. The 
system microprocessor gives 750 nanoseconds for 8 -bit devices 
and 250 nanoseconds for 16-bit devices. 

A similar problem may exist for an lOW signal. Determine the 
'write data' setup time, which is the time required by your 
design from the time it is given vaUd data until it is told to take 
this data by the lOW signal. The time given by the system 
microprocessor from when data is first valid to the device until 
the lOW signal goes active and then inactive is shown in the 
following figure. Your design can take the data when lOW goes 
active (less setup time) or when lOW goes inactive (more setup 
time). 



8-Bit Device 


16-Bit Device 




100 ns 
850 ns 


100 ns 
350 ns 


Data valid until lOW is active. 
Data valid until lOW is inactive. 



lOW Timing 

If the time given by the system microprocessor is not enough, you 
must add a wait-state generator circuit that will provide longer 
lOR and lOW signals. A recommended wait-state generator 
circuit is shown in the following figure. 

Note: Pulse Engineering Inc. PE21214 is the delay module 
used. 



4 Prototype Adapter 



Time Delay (Note) 
PE21214 



+ 1/0 Cycle — 
(Sheet 2 of 11) 



7 

o 
o 

> 



12 4 10 6 



Time Delay (Note) 
PE21214 



Time Delay (Note) 
PE21214 



12 4 10 



0) ® ® ® 



I Jumper 



74S74 



+ 5V O- 



k) 



tCLK Q 
Reset 
Set 
D 



12 4 10 6 8 



15 



74ALS244 



U8 



1/0 Channel Ready 
Tab Pin A10 
(Sheet 4 of 11) 



en 



Wait-State Generator Circuit 



Note: To add wait states and increase the time given by the 
microprocessor for I/O Read and Write commands, install one 
of the following jumpers. 



• 16-Bit Design 

1 wait state 

2 wait states 

3 wait states 

4 wait states 

5 wait states 

• 8-Bit Design 

4 wait states 

5 wait states 



250 nanoseconds--No jumper 
416 nanoseconds— Jumper 1 to 5 
583 nanoseconds— Jumper 2 to 5 
750 nanoseconds— Jumper 3 to 5 
916 nanoseconds— Jumper 4 to 5 

750 nanoseconds— No Jumper 
916 nanoseconds— Jumper 4 to 5 



Designing a Memory Adapter 

The following information may be used to design a memory 
adapter. 



Control Lines 

There are two sets of memory control lines. SMEMR for 
system-memory read, and SMEMW for system-memory write. 
They are active when accessing memory in the first megabyte 
(address bits 20 through 23 are all off). If you use these lines, 
you can avoid an address decode circuit that checks for address 
bits 20 through 23 being off. 

The other set of control lines is MEMR and MEMW. These are 
active when addressing all memory locations. If you wish to 
design memory that will answer to addresses above the first 



6 Prototype Adapter 



megabyte, you must use these lines and decode address bits 20 
through 23 to select the particular address range your memory 
occupies. 



System Address Lines (SA) 

The 20 lowest-order address lines are SAO through SA19. SA 
address bits are active a minimum of 30 nanoseconds before a 
control line goes active, and they stay active until a minimum of 
66 nanoseconds after the control line goes inactive. Timings are 
at the adapter socket. 



Local Address Lines (LA) 

There are seven high-order address lines called LA 17 through 
LA23. LA address bits are active a minimum of 159 nanoseconds 
before a control line goes active, and they stay active until 
typically 83 nanoseconds before the control line goes inactive. 
LA bits should be decoded to select the particular address range 
your memory occupies. Because this decode will go inactive 83 
nanoseconds before the control line goes inactive, it may be 
necessary to latch the decode. The output of this decoder circuit 
should be connected to the input of a transparent latch, such as a 
74ALS573 (+BALE should be connected to the clock pin on the 
latch). If this is done, the output of the 74LS573 will be active 
approximately 30 nanoseconds before a control line goes active, 
and will stay active until approximately 66 nanoseconds after the 
control line goes inactive. Timings are at the adapter socket. 



IBM Personal Computer AT Prototype 
Adapter Layout 

The IBM Personal Computer AT Prototype Adapter has two 
layers screened onto it: one on the front and one on the back. It 
also has 4,311 plated through-holes that are 10.1 millimeters 
(0.04 inch) wide and have a 1.52-millimeter (0.06-inch) pad. 
These holes are arranged in a 2.54-millimeter (0.1 -inch) grid. 
There are 37 plated through-holes, 1.22 millimeters (0.048 inch) 
wide, on the rear of the adapter that are used for a 9- to 
3 7 -position D-shell connector. The adapter also has 5 holes that 



Prototype Adapter 7 



are 3.18 millimeters (0.125 inch) wide. One of these is just above 
the two rows of D-shell connector holes, and each of the other 
four is in a corner of the adapter. 



8 Prototype Adapter 



Component Side 

The component side of the adapter has a ground bus, 1 .27 
millimeters (0.05 inch) wide screened onto it and two card-edge 
Sbs labeled Al through A31 and CI through C31. The foUowmg 
figure shows the ground bus and card edge-tabs. 



oooooooooooooooooooooooooooooooooooo I 

OOQOOOOOOQOOOQ<300-aaOO££^£"""°°°°°"°^^-" 




Prototype Adapter 9 



The component side of the adapter also has a silk screen printed 
on it that may be used as a component guide for the I/O 
interface. The following figure shows this silk screen. 



:3cz=3 c 



I I ^ r 



3\]t 



10 Prototype Adapter 



Pin Side 

The pin side of the adapter has a 5-Vdc bus, 1.27 millimeters 
(0.05 inch) wide, screened onto it, and two card-edge tabs: 
labeled Bl through B31 and Dl through D18. The following 
figure shows the 5-Vdc bus and card edge-tabs. 




:^ 



Prototype Adapter 11 



Card-Edge Tabs 

Each card-edge tab is connected to a plated through-hole by a 
0.3-millimeter (0.012-inch) land. Four ground tabs are 
connected to the ground bus by four 0.3 -millimeter (0.012-inch) 
lands, and three 5 Vdc tabs are connected to the 5-Vdc bus by 
three 0.3-millimeter (0.012 inch) lands. 



Additional Information 

Additional information regarding the I/O interface may be found 
under "I/O Channel" in Section 1 of IBM Personal Computer 
AT Technical Reference manual. Logic diagrams of the IBM 
Personal Computer AT Prototype Adapter may be found later in 
this section. If the recommended interface logic is to be used, the 
following figure shows the recommended components and their 
TTL numbers. 



Component 


TTL# 


Description 


U1 


74S00 


Quad 2 input NAND 


U2 


74S10 


Triples input NAND 


U3, U9 


74LS245 


Octal bus transceiver 


U4 


74S139 


Dual 1 of 4 decoder 


U5 


74S138 


1 of 8 decoder 


U6, U7, U8 


74ALS244 


Octal buffers 


01, 06 




10-microfarad tantalum capacitor 


C2, C3, C4, 05, 




0.047-microfarad ceramic 


C7, C8 




capacitor 


R1 




10 Kohm, .25- watt, 10% resistor 
(axial leads) 


J1 




Jumper wire 



Recommended Components 



Note: Jl, U8, and U9 are not required for a design using only 
the low-order 8 bits of the data bus. Designs using all 16 bits 
of the data bus require these components. 



12 Prototype Adapter 



Interfaces 



Internal Interface 

Because of the number of adapters that may be installed in the 
system, I/O bus loading should be limited to 1 Schottky TTL 
load. If the recommended interface logic is used, this requirement 
is met. Power limitations may be found under "Power Supply" in 
the IBM Personal Computer AT Technical Reference Manual. 



External Interface 

The following figure hsts the recommended connectors for the 
rear of the adapter. 



Connector 


Part no. (Amp) or 




equivalent 


9-pin D-shell (male) 


205865-1 


9-pin D-sheil (female) 


205866-1 


15-pin D-shell (male) 


205867-1 


15-pin D-shell (female) 


205868-1 


25-pin D-shell (male) 


205857-1 


25-pin D-shell (female) 


205858-1 


37-pin D-shell (male) 


205859-1 


37-pin D-shell (female) 


205860-1 



Recommended Connectors 



Prototype Adapter 13 



1 

o 

> 



(SHT3> 
(SHT 3) 
(SHT 3) 
(SHT 3) 
(SHT 3) 
(SHT 3) 
(SHT 3) 
(SHT 3) 



(.M) + DATA BIT > 
(A8) + DATA BIT I 
(A7) + DATA BIT 2 
(A6) + DATA BIT 3 > 
(A-j) + DATA BIT H 
(AH) + DATA SIT 5 
(A3) +DATA BIT 6 
(A2) + DATA BIT 7 > 



I/O DECODE FOR PROTOTYPE C ARD 



(SHT 3) 
(SHT 3) 
(SHT 3) 
(SHT 3) 

(SHT 3) 
(SHT 3) 
(SHT 3) 



(BIH) -lOR 

(BI3) -low 

(BI2) -SMEMR 

(BID -SHEMW 
(SPARE) 
(A3I)+ADDR.BIT0 > 
(A30) + ADDR. BIT . 
(A29)+ADDR.BIT 2 > 



(SHT 3) (A28)+ ADDR. BIT 3 > 

(SHT 3) (A27)+ ADDR. BIT 4 > 

(SHT 3) (A2b) + ADDR. BITS 

(SHT 3) (A25)+ADDR.BIT6 

(SHT 3) (A2^) + ADDR.BIT7 

(SHT 3) (A23) + ADDR. BIT 8 > 

(SHT 3) CA22)+ ADDR. BIT 9 > 

(SHT 3) (AID+AEN 



(HEX) 300 

(HEX)3IF 

DECODr RANGE 



A<> 


A8lA7 


A6 


AS AH 


A3 


AZJAllAO 


1 

























1 


1 








1 


1 


1 


1 


1 


\ 


1 








X 


^ 


^ 


X 


X 



^ +1/0 CYCLE 




o 

g 

(SHT 2) y^ 

(SHT 2) ^ 

B 



^ +8 BIT I/O DEVICE (SHT 2) 



^ -I/O DECODE (SHT 2) 

(300 HEX-3 IF HEX INCLUSIVE) 



20I777I0 



IF THE I/O DEVICE REQUIRES A 16 BIT WIDE 
DATA BUS, THEN INSTALL JUMPER J I. FOR 
8 BIT WIDE I/O DEVICES NO JUMPERING 
IS REQUIRED. 



Prototype Adapter (Sheet 1 of 4) 



7 

O 

© 

I 

ft 



(SHT4) (CM) +DATABIT8 

(SHT4) (CI 2) +DATABIT9 

(SHT4) (CI 3) +DATABITIO 

(SHT4) (CI4) +DATABITII 

(SHT4) (CIS) +DATABITI2 

(SHT4) (CI6) + DATA BIT !3 

(SHT4) (CI7) + DATA BIT \H > 

(SHT4) (CI8) +DATABITIS 

(SHT1) -BIOR 



(SHT 1) +1/0 CYCLE 



(SHT 1 ) +8 BH I/O DEVICE > 



(SHT 4) (CI)- SBHE 

(SHE. 5) (C9) SPARE 

{SHT 4) (CIO) - MEMW 

SPARE 





9 


A U9 

A 

A 

A 

A 

A 

A 

A 

f 


B 
B 
B 
B 
B 
B 
B 
B 


11 




? 8 


12 




13 


^ t 


m 




IS 






16 


^ 3 


17 




IB 


, 






^ 


"''c 











BUFFERED 
DATA BUS 
BITS 8-15 



20 

+SV 



H7t° 



- ENABLE HIGH BYTE 



(SHT1) -I/O DECODE 




■» -I/O C5 tfc (D02) (SHT 4) 



cn 



Prototype Adapter (Sheet 2 of 4) 



© 

© 
> 



(SHT 1) 
(SHTI) 



(SHT1) 
(SHT 1) 



(SHT 1) 



GROUND 
+ RESET DRV 
+ SVDC 
+ IRQ 9 
-SVDC 
+ DRQ 2 
-I2VDC 
+ WAIT STATE 
+ I2VDC 
GROUND 
-SMEM W 

-low 

-lOR 
-DACK 3 
+ DRQ 3 
- DACK I 
-DRQ I 
-REFRESH 

CLK 
+ IRQ 7 
+ IRQ 6 
+ IRQ S 
+ IRQ 4 
+ IRQ 3 
-DACK 2 
+ T/C 
+ BALE 
+ SV DC 
OSC 
GROUND 



(SHTI) 
(SHTI) 



Bl 




Al 


B2 


A2 


B3 


A3 


BH 


AH 


BS 


AS 


Bb 


A6 


B7 


A7 


B8 


AS 


B9 


A9 


BIO 


AlO 


Bll 


At! 


Bi2 


mz 


BI3 


Ail 


Bm 


Am 


BIS 


A IS 


BI6 


AI6 


BI7 


AI7 


BIS 


AI8 


BI9 


AI9 


820 


A2C 


B2I 


A2I 


822 


A22 


823 


A23 


B2H 


A2H 


B2S 


A2S 


826 


A2* 


827 


A27 


B2S 


A28 


8 29 


A29 


830 


A30 


B3I 


A3t 







-I/O CHANNEL CHECK 


+ DATA BIT 


7 




+ DATA BIT 6 




+ DATA BITS 




+ DATA BIT 4 




+ DATA BIT 3 




+DATA BIT 2 




+ DATA BIT 


1 




+ DATA BIT 







+1/0 CHANNEL 


READY 


+ AEN 






+ ADDRESS 


BIT 


19 


+ ADDRESS 


BIT 


18 


+ ADDRESS 


BIT 


17 


+ ADDRESS 


BIT 


16 


+ ADDRESS 


BIT 


IS 


+ ADDRESS 


BIT 


m 


+ ADDRESS 


BIT 


13 


+ ADDRESS 


BIT 


12 


+ ADDRESS 


BIT 


II 


+ ADDRESS 


BIT 


10 


+ ADDRESS 


BIT 


9 


+ ADDRESS 


BIT 


8 


+ADDRE5S 


BIT 


7 


+ ADDRESS 


BIT 


6 


+ ADDRESS 


BIT 


S 


+ ADDRESS 


BIT 


H 


+ ADDRESS 


BIT 


3 


+ ADDRESS 


BIT 


2 


+ ADDRESS 


BIT 


1 


+ ADDRESS 


BIT 






(SHT1) 



COMPONENT SIDE 



Prototype Adapter (Sheet 3 of 4) 



(SHT 2) 



-MEM 


CSI6 


-I/O 


C5I6 


+ IRQ 


10 


+ IRQ 


11 


+ IRQ 


12 


+ IRQ 


B 


+ IRQ 


m 


-DACK 


^ 


+ DRQ 


^ 


-DACK 


5 


+ DRQ 


S 


-DACK 


6 


+ DRQ 


6 


-DACK 


7 


+ DRQ 


7 


+SVDC 




-MASTER 


6ND 







% PIN 
TAB CONNECTOR 




Dl 




CI 


D2 


C2 


D3 


C3 


DH 


CH 


DS 


CS 


D6 


C6 


D7 


C7 


D8 


C8 


m 


C9 


DID 


CIO 


Dll 


Cll 


DI2 


CI2 


DI3 


CI3 


Dm 


cm 


DIS 


CIS 


D16 


CI6 


DI7 


CI7 


Df8 


CIS 







- SBHE 

+ LA ADDRESS 
+ LA ADDRESS 
+ LA ADDRESS 
+ LA ADDRESS 
+ LA ADDRESS 
+ LA ADDRESS 
+ LA ADDRESS 

- MEMR 

- MEMW 

+ DATA EilT 8 
+ DATA EST 9 
+ DATA BIT 10 
+ DATA BIT tl 
+ DATA m 12 
+ DATA BIT 13 
+ DATA BIT m 
+ DATA BIT IS 



(SHT 2) 



BIT 23 

BIT 22 

BIT 21 

BIT 20 

BIT 19 

BIT 18 



BIT 



(SHT 2) 
(SHT 2) 
(SHT 2) 
(SHT 2) 
(SHT 2) 
(SHT 2) 
(SHT 2) 
(SHT 2) 
(SHT 2) 
(SHT 2) 



I 

O 



.PIN SIDE 



COMPONENT SIDE^ 



> 

a 



Prototype Adapter (Sheet 4 of 4) 



18 Prototype Adapter 



?-. 



^)ption 



63i6l668 



Contents 



Description 1 

Memory Cycles 1 

Memory Address Switches 1 

I/O Channel Check 3 

Specifications 3 

Voltage Tolerances 3 

Power Dissipation 3 

Temperature Variation 3 

Logic Diagrams 4 



m 



IV 



Description 



This adapter has 36 RAM modules (128K x 1) for a total capacity 
of 512Kb. 



Memory Cycles 

MEMR and MEMW commands require a 1 -wait-state, 3 -clock 
memory cycle. Data moves as a byte (8 data bits and 1 parity bit) 
or as a word (16 data bits and 2 parity bits) and is parity-checked 
on the adapter. A parity error causes an I/O channel check 
(non-maskable interrupt) to the system. 



Memory Address Switches 

There are two banks of memory address switches on each 
memory adapter. These switches are set to values for the first, 
second, third, etc. memory adapter in the system. The following 
figure shows the switch configuration for each adapter. 

The first memory expansion adapter must start at address space 
hex 100000. If more than one adapter is installed, no gaps 
between memory are allowed. All expansion memory must be 
one contiguous block starting at address hex 100000. 



512KB Memory Expansion Option 1 



(Ililllillllliiiiii 
liiiiiliiiilliiiili 



Eg 



. Switch BankO 



Switch Banl^ 1 



Switch BankO Switch Bank 1 



1st 51 2KB 
Memory 
Expansion 
Adapter 



2nd 51 2KB 
Memory 
Expansion 
Adapter 



3rd 51 2KB 
Memory 
Expansion 
Adapter 



4th 51 2KB 
Memory 
Expansion 
Adapter 



5th 51 2KB 
Memory 
Expansion 
Adapter 



On 
Off! 



12 3 4 5 6 7 8 



12 3 4 5 6 7 8 



nnnoBBBB mmm 



1 2 3 4 5 6 7 8 



On 
Off I 



12 3 4 5 6 7 8 



nnnoynnn nnnyyyny 



12 3 4 5 6 7 8 



^^nnonnnnn mmm 



12 3 4 5 6 7 8 



O 
Off 



12 3 4 5 6 7 8 



^nnynynnn nnynyyny 



12 3 4 5 6 7 8 



On 

Off! 



12 3 4 5 6 7 8 



12 3 4 5 6 7 8 



mmm nnyynyny 



2 512KB Memory Expansion Option 



I/O Channel Check 

When the I/O channel check occurs, a non-maskable interrupt 
(NMI) results, and the status bits determine the source (one 
status bit is I/O channel check and the other is system-board 
parity check). Writing to the failing card will clear the status bit. 



Specifications 



Voltage Tolerances 

The maximum variation of the +5 Vdc is ±5% at the adapter 
pins. 



Power Dissipation 

The +5-Vdc power used by the adapter is a maximum of 5.25 
watts, and the maximum current used is 1 ampere. 



Temperature Variation 

The adapter will operate between 10 and 50 degrees Celsius (50 
and 122 degrees Farenheit). 



512KB Memory Expansion Option 3 



Notes: 



4 512KB Memory Expansion Option 



Sj2 NOTEd] 



in 

3 

© 

to 



O 



a 
o 
a 




o 
oro 



MEM CSIb (SHT7) 
RAS CSO (SHT2) 


cro 


RAS CSI (SHT2) 




RAS CSZ (SHT2) 




HRAS CS? (SHT2) 




kCAS CSO (SHT2) 




i-CAS C5i (SHT2) 





51 2 KB Memory Expansion Option (Sheet 1 of 8) 



S 2 5 3 S 



Ni § 



A 



A 







:i °;i ^ii §;:i §i:i 



A 



© 



A 






A 



A 



li« 



A 



00 

«^ 
o 

CM 

a> 

0) 

(0 

c 
o 

a 
O 

c 
o 
'<n 

c 

CO 

a 

X 

o 

E 



OQ 
CM 

T- 



6 512KB Memory Expansion Option 



igg?eei? 









2 


!C 






59 












Oi 


E 




'^ 


^ 




2 










5 








o- 
















^ 


2: 






o- 


. 


^ 


' 


. 


' 


' 


. 


^ 


e 






































1 


i 




00 

•*- 

o 

CO 

4-* 

0) 

£ 
CO 

c 

a 
O 

c 
o 

c 
a 

X 

& 

o 
E 

S 
m 

CM 



X I I I X I X 



512KB Memory Expansion Option 7 




00 

o 

0) 
CO 

c 
o 

a 
O 



0) 

c 

CO 

a 

X 
lAJ 

& 
O 

E 

0) 

S 

03 

:^ 

CM 

5) 



8 512KB Memory Expansion Option 



I si 



5? 



1/1 V i^ 



3 O O J; 
3 O O I 



M 






ilil 

1' *: 



?il8 



iii«H I I 



B o n o ' 



sas*||?*|§i 



13: 



■< 355 S 5 slilislilS 



l^iiiilii^TY 



i^ 



m 



n 



istfgJBiiifaiK 



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;|||||||5|||S 



i f^: 



^ T ^ * ^ •; ? S^ i 



oo 

o 
in 

0) 

(0 



a 
O 
c 
o 

'(0 

c 

(0 

a 

X 

UJ 

o 
E 

0) 

GQ 
CM 



512KB Memory Expansion Option 9 



dd 

5 

o 

9 

o 

^3 



(SHT3)+MD0 


(SHT3)+MDI 


(SHT3)+MD2 


(SHT3) +MD3 


(SHT3) +HD4 


(SHT3)+MD5 


(SHT3)+MD6 


(SHT3) +MD7 


(SHT3) +MD8 


(SHT3)+MD9 


(SHT3)+MDI0 


{SHT3)+HDII 


(SHT3)+MDIZ 


(SHT3)+MDI3 


(SHT3)+MDI4 


(SHT3)+MDIS 


(SHT5)-BHA0 


(SHT5)-BMAI 


{SHT5)-BHA2 


(SHT5)-flMA^ 


(SHT5)-BMA4 


(SHTSl-BMAS 


(SHT5)-BMAb 


{SHT5)-6MA7 


(SHT2) -RAS3 


(SHT2) -RAS2 


(SHT2) -CAS IL 


(SHT2) -CAS IH 


(SHT7) -BBMEHW 


(SHT4) +MDPIN 


(SHT4) +MDPrN 1 


(SHT5) +MC)POUT0 


(SHT5) +MDPOUT 1 



,»iM3_ 



i>PMAS 



-^^ 



■^DIK/OOUf~ 






^JDiN 



-^RATi 
■^ WE 

-ilc raTo 



— ^Sa51 
— ^vrt 
— ^!nc?B 

-^^^ DIN/ OUT 



IHIi 



-ESj^ 



^DIN/POUT 

— ^ ^DIN/DOUT 



51 2 KB Memory Expansion Option (Sheet 6 of 8) 



% 



00 

«^ 

o 

en 

c 
o 

a 
O 
c 
o 



a 

X 
LU 

& 

o 
E 

0) 

S 

OQ 
CM 



512KB Memory Expansion Option 11 






(SHT 4) -I/O CH CK - 



ft 

3 

o 

9 

i" 

o 

i' 



I B29 
BO I 



AZO 



+ SDO 


(SHT 3) 


+ SDI 


(SHT 3) 


+ SD2 


(SHT 3) 


+ SD3 


(SHT 3) 


+ SD4 


(SHT 3) 


+ SD5 


(SHT 3) 


+ SD6 


(SHT 3) 


+ SD7 


(SHT 3) 


+ SAO 


(SHT 7) 


+ SAI 


(SHT 5) 


+ SA2 


(SHT 5) 


+ SA3 


(SHT 5) 


+ SAH 


(SHT 5) 


+ SAS 


(SHT 5) 


+ SA6 


(SHT 5) 


+ SA7 


(SHT 5) 


+ SA8 


(SHT 5) 


+ SA9 


(SHT 5) 


+ SAIO 


(SHT 5) 


+ SAII 


(SHT 5) 


+ SAI2 


(SHT 5) 


+ SAI3 


(SHT 5) 


+ SAI4 


(SHT 5) 


+ SAIS 


(SHT 5) 


+ SAI6 


(SHT 5) 


+ SAI7 




+ SAI8 




+ BALE 


(SHT1) 


-REFRESH (SHT 7) 


+RESET DRV (SHT 4) 



51 2 KB Memory Expansion Option (Sheet 8 of 8) 






Adapter 



6361672 



Contents 



IBM Personal Computer AT Serial/Parallel Adapter .... 1 

Serial Portion of the Adapter 1 

Programmable Baud-Rate Generator 17 

Parallel Portion of the Adapter 19 

Specifications 24 

Logic Diagrams 26 



m 



IV 



IBM Personal Computer AT 
Serial/Parallel Adapter 



The IBM Personal Computer AT Serial/Parallel Adapter provides 
a parallel port and a serial port. It plugs into a system-board 
expansion slot. All system-control signals and voltage 
requirements are provided through a 2- by 31 -position card edge 
connector. 



Serial Portion of the Adapter 

The serial portion of the adapter is fully programmable and 
supports asynchronous communications. It will add and remove 
start, stop, and parity bits. A programmable baud-rate generator 
allows operation from 50 baud to 9600 baud. Five-, six-, seven- 
and eight-bit characters with 1, 1.5, or 2 stop bits are supported. 
A prioritized interrupt system controls transmit, receive, error, 
and line status as well as data-set interrupts. 

The rear of the adapter has a 9-pin D-shell connector that is 
classified as an RS-232C port. When the optional IBM 
Communications Cable (9-Pin), which has a 9-pin D-shell 
connector on one end and a 25 -pin D-shell connector on the 
other end, is connected to the adapter, the 25 -pin end of the cable 
has all the signals of a standard EIA RS-232C interface. 

The following figure is a block diagram of the serial portion of the 
adapter. 



Serial/Parallel Adapter 1 



Address 
Bus 



Address 
Decode 


Chip Select 




Register 
Select 



Data Bus 



Interrupt 



Oscillator 
1.8432 MHz 



EIA 
Receivers 



Controller 
Asynchronous 
Communications 
Chip 



9-Pin 
Connector 



EIA 
Drivers 



Serial Portion Block Diagram 

The serial portion of the adapter has a controller that provides the 
following functions: 

• Adds or deletes standard, asynchronous-communications bits 
to or from a serial data stream. 

• Provides full, double buffering, which eliminates the need for 
precise synchronization. 

• Provides a programmable baud-rate generator. 

• Provides modem controls (CTS, RTS, DSR, DTR, RI, and 
CD). 



Communications Application 

The serial output port may be addressed as either communications 
port 1 or communications port 2 as defined by jumper Jl (see the 
following figure). In this section hex addresses begin with an X 
which can be either a 3 for communications port 1 (interrupt level 
4) or a 2 for communications port 2 (interrupt level 3). 



2 Serial/ParaUel Adapter 




Port 2 



Port 1 



The data format will be as follows: 



DO D1 D2 03 04 05 06 07 

▼ ▼▼▼TTTT 



Marking 



Start 
Bit 



Parity 
Bit 



Stop 
Bit 



Data bit is the first bit to be sent or received. The controller 
automatically inserts the start bit, the correct parity bit (if 
programmed to do so), and the stop bit (1, 1.5, or 2, depending 
on the command in the line-control register). 



Controller Specifications 

The following describes the function of controller input/output 
signals. 



Serial/Parallel Adapter 3 



Input Signals 



-Clear to Send: (-CTS), Pin 36— The '-CTS ' signal is a 
modem-control function input, the condition of which can be 
tested by the processor by reading bit 4 (CTS) of the modem 
status register. Bit (DCTS) of the modem status register 
indicates if the ' -CTS ' input has changed state since the previous 
reading. 

Note: Whenever the CTS bit of the modem status register 
changes state, an interrupt is generated if the modem-status 
interrupt is enabled. 

-Data Set Ready: (-DSR), Pin 37 — When low, indicates the 
modem or data set is ready to establish the communications link 
and transfer data with the controller. The ' -DSR ' signal is a 
modem-control function input, the condition of which can be 
tested by the processor reading bit 5 (DSR) of the modem status 
register. Bit 1 (DDSR) of the modem status register indicates if 
the ' -DSR ' input has changed since the previous reading. 

Note: Whenever the DSR bit of the modem status register 
changes state, an interrupt is generated if the modem-status 
interrupt is enabled. 

-Data Carrier Detect: (-DCD), Pin 38 — When low, indicates 
the modem or data set detected a data carrier. The ' -DCD ' 
signal is a modem-control function input, the condition of which 
can be tested by the processor reading bit 7 (DCD) of the modem 
status register. Bit 3 (DCD) of the modem status register 
indicates if the ' -DCD ' input has changed state since the 
previous reading. 

Note: Whenever the DCD bit of the modem status register 
changes state, an interrupt is generated if the modem status 
interrupt is enabled. 

-Ring Indicator: (-RI), Pin 39 — When low, indicates the modem 
or data set detected a telephone ringing signal. The ' -RI ' signal 
is a modem-control function input, the condition of which can be 



4 Serial/ParaUel Adapter 



tested by the processor reading bit 6 (RI) of the modem status 
register. Bit 2 (TERI) of the modem status register indicates if 
the ' -RI * input has changed from an active to an inactive state 
since the previous reading. 

Note: Whenever the RI bit of the modem status register 
changes from an inactive to an active state, an interrupt is 
generated if the modem-status interrupt is enabled. 

VCC Pin 40—+ 5 Vdc supply 

VSS Pin 20— Ground (0 Vdc) reference 



Output Signals 

-Data Terminal Ready: (-DTR), Pin 33 — When active, informs 
the modem or data set that the controller is ready to 
communicate. The ' DTR ' output signal can be set to an active 
level by programming bit (DTR) of the modem control register 
to an active level. The ' -DTR ' signal is set inactive upon a 
master reset operation. 

-Request to Send: (-RTS), Pin 32 — When active, informs the 
modem or data set that the controller is ready to send data. The 
' -RTS ' output signal can be set to an active level by 
programming bit 1 (RTS) of the modem control register to an 
active level. The ' -RTS ' signal is set inactive upon a master reset 
operation. 

-Output 1: (-OUT 1), Pin 34 — User-designated output that can 
be set to an active level by programming bit 2 (-OUT 1) of the 
modem control register to an inactive level. The ' -OUT 1 ' signal 
is set inactive upon a master reset operation. Pin 34 is connected 
to an active source. 

-Output 2: (-OUT 2), Pin 31 — User-designated output that can 
be set to an active level by programming bit 3 (-OUT 2) of the 
modem control register to an inactive level. The ' -OUT 2 ' 
signal is set inactive upon a master reset operation. Pin 3 1 
controls interrupts to the system. 



Serial/Parallel Adapter 5 



Controller- Accessible Registers 

The controller has a number of accessible registers. The system 
programmer may gain access to or control any of the controller 
registers through the microprocessor. These registers are used to 
control the controller's operations and to transmit and receive 
data. The X in the register address determines the the port 
selected; 3 is for port 1 and 2 is for port 2. 

Specific registers are selected according to the following figure: 



I/O Address 


Register Selected 


DLAB State 


XF8 


TX buffer 


(write) 


XF8 


RX buffer 


(read) 


XF8 


Divisor Latch LSB 


1 


XF9 


Divisor Latch MSB 


1 


XF9 


Interrupt Enable Register 





XFA 


Interrupt Identification Register 




XFB 


Line Control Register 




XFC 


Modenn Control Register 




XFD 


Line Status Register 




XFE 


Modem Status Register 




XFF 


Reserved 





Controller-Accessible Registers 

Transmitter Holding Register (Hex XF8): The transmitter 
holding register (THR) contains the character to be sent. 



Transmitter Holding Register (hex XF8) 



Bit 7 6 5 4 3 2 10 



u 



Data Bit 

> Data Bit 1 

> Data Bit 2 

> Data Bit 3 

> Data Bit 4 

> Data Bit 5 

> Data Bit 6 

> Data Bit 7 



Transmitter Holding Register 

Bit is the least-significant bit and the first bit sent serially. 

Receiver Buffer Register (Hex XF8): The receiver buffer 
register (RBR) contains the received character. 



6 Serial/ParaUel Adapter 



Receiver Buffer Register (liex XF8) 



7 6 5 4 3 2 10 

I — > Data Bit 

> Data Bit 1 

> Data Bit 2 

> Data Bit 3 

> Data Bit 4 

> Data Bit 5 

> Data Bit 6 

> Data Bit 7 



Receiver Buffer Register 

Bit is the least-significant bit and the first bit received serially. 

Divisor Latch LSB (Hex XF8) 



Divisor Latcli l^ast Significant Bit (hex XF8) 


Bit 


1 i 


3 . 


) ' 


\ V 


J 


? 




1 — > BitO 
> Bit 1 




: :;;: i 




: ::•: i 


— 


> Bits 




'z: 1 







Divisor Latcli Least Significant Bit 

Information about this register may be found under 
"Programmable Baud Rate Generator" later in this section. 

Divisor Latch MSB (Hex XF9) 



Divisor Latcli Most Significant Bit (hex XF9) 



Bit 7 6 5 4 3 2 10 



u 



BitO 

> Bit1 

> Bit 2 

> Bit 3 

> Bit 4 

> Bits 

> Bite 

> Bit 7 



Divisor Latcli Most Significant Bit 



Serial/Parallel Adapter 7 



Information about this register may be found under 
"Programmable Baud Rate Generator" later in this section. 

Interrupt Enable Register (Hex XF9): This 8 -bit register 
allows the four types of controller interrupts to separately activate 
the ' chip-interrupt ' (INTRPT) output signal. The interrupt 
system can be totally disabled by resetting bits through 3 of the 
interrupt enable register (lER). Similarly, by setting the 
appropriate bits of this register to logical 1, selected interrupts can 
be enabled. Disabling the interrupt system inhibits the ' lER ' 
and the active ' INTRPT ' output from the chip. All other system 
functions operate normally, including the setting of the line-status 
and modem-status registers. 



Interrupt Enable Register (hex XF9) 



Bit 7 6 5 4 3 2 10 

' — > Enable Data Available Interrupt 
> Enable Tx Holding Register 

Empty Interrupt 
> Enable Receive Line Status 

Interrupt 

> Enable Modem Status Interrupt 

> =0 

> =0 

> =0 

> =0 



Interrupt Enable Register 
BitO 



When set to logical 1, enables the 
received-data-available interrupt. 



Bit 1 When set to logical 1 , enables the 

transmitter-holding-register-empty interrupt. 

Bit 2 When set to logical 1 , enables the receiver-line-status 

interrupt. 

Bit 3 When set to logical 1 , enables the modem-status 

interrupt. 

Bits 4-7 These four bits are always logical 0. 



8 Serial/Parallel Adapter 



Interrupt Identification Register (Hex XFA): The controller 
has an on-chip interrupt capability that makes communications 
possible with all of the currently popular microprocessors. In 
order to minimize programming overhead during data character 
transfers, the controller prioritizes interrupts into four levels: 
receiver line status (priority 1), received data ready (priority 2), 
transmitter holding register empty (priority 3), and modem status 
(priority 4). 

Information about a pending prioritized interrupt is stored in the 
interrupt identification register (IIR). (See the figure "Interrupt 
Control Functions," later.) The IIR, when addressed during 
chip-select time, stops the pending interrupt with the highest 
priority, and no other interrupts are acknowledged until the 
processor services that particular interrupt. 



Interrupt Identification Register (hex XFA) 



Bit 



7 6 5 4 3 2 10 



Uo 



if Interrupt Pending 

> Interrupt ID Bit 

> Interrupt ID Bit 1 

> =0 

> =0 

> =0 

> =0 

> =0 



Interrupt Identification Register 

Bit This bit can be used in either hard- wired, prioritized, 

or polled conditions to indicate if an interrupt is 
pending. When bit is logical 0, an interrupt is 
pending, and the IIR contents may be used as a 
pointer to the appropriate interrupt service routine. 
When bit is logical 1, no interrupt is pending, and 
polling (if used) continues. 

Bits 1-2 These two bits identify the pending interrupt that has 
the highest priority interrupt pending, as shown in 
the following figure. 

Bits 3-7 These five bits are always logical 0. 



Serial/Parallel Adapter 9 



interrupt 

ID 

Register 


Interrupt Set And Reset Functions 


Bit 
2 


Bit 
1 


Bit 



Priority 
Level 


Interrupt 
Type 


Interrupt 
Source 


Interrupt 
Reset Control 











- 


None 


None 


- 


1 


1 





Highest 


Receiver 

Line 

Status 


Overrun Error 

or 
Parity Error 

or 
Framing Error 


Reading the Line 
Status Register 
























or 














Break 
Interrupt 




1 








Second 


Received 

Data 

Available 


Receiver Data 
Available 


Reading the 
Receiver Buffer 
Register 





1 





Third 


Trans- 
mitter 
Holding 
Register 
Empty 


Transmitter 
Holding 
Register 
Empty 


Reading the MR 
(if source of in- 
terrupt) or writing 
into the THR 











Fourth 


Modem 
Status 


Clear to Send 

or 
Data Set Ready 

or 
Ring Indicator 


Reading the Modem 
Status Register 
























Received Line 
Signal Detect 





Line-Control Register (Hex XFB): The system programmer 
specifies the format of the asynchronous data communications 
exchange through the line control register. In addition to 
controUing the format, the programmer may retrieve the contents 
of the line control register for inspection. This feature simplifies 
system programming and eliminates the need to store line 
characteristics separately in system memory. 



10 Serial/Parallel Adapter 



Line Control Register (liex XFB) 



Bit 



7 6 5 4 3 2 10 

I — > Word Length Select Bit 

> Word Length Select Bit 1 

> Number of Stop Bits 

> Parity Enable 

> Even Parity Select 

> Stuck Parity 

> Set Break 

> Divisor Latch Access Bit 



Line Control Register 

Bits 0, 1 These two bits specify the number of bits in each 

serial character that is sent or received. The 
encoding of bits and 1 is as follows: 



Bit1 


Bit 2 


Word Length (Bits) 




1 
1 



1 


1 


5 
6 

7 
8 



Word Length 



Bit 2 



Bit 3 



Bit 4 



This bit specifies the number of stop bits in each 
serial character that is sent pr received. If bit 2 is a 
logical 0, one stop bit is generated or checked in the 
data sent or received. If bit 2 is logical 1 when a 
5 -bit word length is selected through bits and 1, 
1-1/2 stop bits are generated or checked. If bit 2 is 
logical 1 when either a 6-, 7-, or 8-bit word length 
is selected, two stop bits are generated or checked. 

This bit is the parity-enable bit. When bit 3 is 
logical 1 , a parity bit is generated (transmit data) or 
checked (receive data) between the last data word 
and stop bit of the serial data. (The parity bit is 
used to produce an even or odd number of I's when 
the data- word bits and parity bit are summed.) 

This bit is the even-parity-select bit. When bit 3 is 
a logical 1 and bit 4 is a logical 0, an odd number of 



Serial/Parallel Adapter 1 1 



logical Ts is sent or checked in the data word bits 
and parity bit. When both bit 3 and bit 4 are a 
logical 1 , an even number of bits is sent or checked. 



Bits 



Bit 6 



Bit? 



This bit is the stuck-parity bit. When bit 3 is a 
logical 1 and bit 5 is a logical 1 , the parity bit is sent 
and then detected by the receiver as a logical 0, if 
bit 4 is a logical 1 , or as a logical 1 if bit 4 is a 
logical 0. 

This bit is the set-break control bit. When bit 6 is 
set to a logical 1, the serial output (SOUT) is forced 
to the spacing (logical 0) state and remains there 
regardless of other transmitter activity. The 
set-break is disabled by setting bit 6 to logical 0. 
This feature enables the microprocessor to select a 
specific terminal in a computer communications 
system. 

This bit is the divisor-latch access bit (DLAB). It 
must be set high (logical 1) to gain access to the 
divisor latches of the baud-rate generator during a 
read or write operation. It must be set low (logical 
0) to gain access to the receiver buffer, the 
transmitter holding register, or the interrupt enable 
register. 



Modem Control Register (Hex XFC): This 8-bit register 
controls the data exchange with the modem or data set (an 
external device acting as a modem). 



Modem Control Register (hex XFC) 



7 6 5 4 3 2 10 



u 



Data Terminal Ready 

> Request to Send 

> Out 1 

> Out 2 

> Loop 

> =0 

> =0 

> =0 



Modem Control Register 



12 Seriai/ParaUel Adapter 



Bit This bit controls the ' -data terminal ready ' (-DTR) 

output. When bit is set to logical 1, the -DTR 
output is forced active. When bit is reset to logical 

0, the ' -DTR ' output is forced inactive. 

Bit 1 This bit controls the ' -request-to-send ' (-RTS) 

output. Bit 1 affects the ' -RTS ' output in the same 
way bit affects the ' -DTR ' output. 

Bit 2 This bit controls the ' -Output 1 ' (-OUT 1) signal, 

which is a spare the programmer can use. Bit 2 
affects the ' -OUT 1 ' output in the same way bit 
affects the '-DTR' output. 

Bit 3 This bit controls the ' -Output 2 ' (-OUT 2) signal, 

which is a spare the programmer can use. Bit 3 
affects the ' -OUT 2 ' output in the same way bit 
affects the '-DTR' output. 

Bit 4 This bit provides a loopback feature for diagnostic 

testing of the controller. When bit 4 is set to logical 

1, the following occur: the 'transmitter serial output' 
(SOUT) is set to the active state; the 'receiver serial 
input' (SIN) is disconnected; the output of the 
transmitter shift register is "looped back" to the 
receiver shift register input; the four modem-control 
inputs ( ' -CTS ' , ' -DSR ' , ' -RLSD ' , and ' -RI ' ) are 
disconnected; and the four modem-control outputs 
C-DTR', '-RTS', '-OUT1' and ' -OUT 2 ') are 
internally connected to the four modem control 
inputs. In the diagnostic mode, data sent is 
immediately received. This feature allows the 
processor to verify the transmit- and receive-data 
paths of the controller. 

In the diagnostic mode, the receiver and transmitter 
interrupts are fully operational, as are the 
modem-control interrupts. But the interrupts' 
sources are now the lower four bits of the modem 
control register (MCR) instead of the four 
modem-control inputs. The interrupts are still 
controlled by the interrupt enable register. 



Serial/ParaUel Adapter 13 



The controller's interrupt system can be tested by 
writing to the lower six bits of the line status register 
and the lower four bits of the modem status register. 
Setting any of these bits to logical 1 generates the 
appropriate interrupt (if enabled). Resetting these 
interrupts is the same as for normal controller 
operation. To return to normal operation, the 
registers must be reprogrammed for normal 
operation, and then bit 4 of the MCR must be reset 
to logical 0. 

Bits 5-7 These bits are permanently set to logical 0. 

Line Status Register (Hex XFD): This 8-bit register provides 
the processor with status information about the data transfer. 



Line Status Register (hex XFD) 



7 6 5 4 3 2 10 



u 



Data Ready 

> Overrun Error 

> Parity Error 

> Framing Error 

> Break Interrupt 

> Transmitter Holding Register 
Empty 

> Tx Shift Register Empty 

> =0 



Line Status Register 

Bit This bit is the receiver data ready (DR) indicator. It 

is set to logical 1 whenever a complete incoming 
character has been received and transferred into the 
receiver buffer register. Bit may be reset to logical 
by the processor either reading the data in the 
receiver's buffer register or writing logical in it. 

Bit 1 This bit is the overrun error (OE) indicator. It 

indicates that data in the receiver's buffer register 
was not read by the processor before the next 
character was transferred into the register, thereby 
destroying the previous character. The OE indicator 
is reset whenever the processor reads the contents of 
the line status register. 



14 Serial/Parallel Adapter 



Bit 2 This bit is the parity error (PE) indicator and 

indicates the received data character does not have 
the correct even or odd parity, as selected by the 
even-parity-select bit. The PE bit is set to logical 1 
upon detection of a parity error, and is reset to 
logical whenever the processor reads the contents 
of the line status register. 

Bit 3 This bit is the framing error (FE) indicator. It 

indicates the received character did not have a vaUd 
stop bit. Bit 3 is set to logical 1 whenever the stop 
bit following the last data bit or parity bit is detected 
as a zero bit (spacing level). 

Bit 4 This bit is the break interrupt (BI) indicator. It is set 

to logical 1 whenever the received data input is held 
in the spacing state (logical 0) for longer than a 
fuUword transmission time (that is, the total time of 
start bit + data bits + parity stop bits). 

Note: Bits 1 through 4 are error conditions that 
produce a receiver Une-status interrupt whenever 
any of the corresponding conditions are detected. 

Bit 5 This bit is the transmitter holding register empty 

(THRE) indicator. It indicates the controller is 
ready to accept a new character for transmission. In 
addition, this bit causes the controller to issue an 
interrupt to the processor when the TRHE interrupt 
enable is set active. The THRE bit is set to logical 1 
when a character is transferred from the transmitter 
holding register into the transmitter shift register. It 
is reset to logical when the processor loads the 
transmitter holding register. 

Bit 6 This bit is the transmitter empty (TEMT) indicator. 

It is set to logical 1 whenever the transmitter holding 
request (THR) and the transmitter shift request 
(TSR) are both empty. It is reset to logical 
whenever THR or TSR contains a data character. 

Bit 7 This bit is permanently set to logical 0. 



Serial/Parallel Adapter 15 



Modem Status Register (Hex XFE): The 8-bit MSR provides 
the current state of the control Unes from the modem (or external 
device) to the processor. In addition, four bits of the MSR 
provide change information. These four bits are set to logical 1 
whenever a control input from the modem changes state. They 
are reset to logical whenever the processor reads this register. 



Modem Status Register (hex XFE) 



7 6 5 4 3 2 10 



-> Delta Clear to Send 

-> Delta Data Set Ready 

-> Trailing Edge Ring Indicator 

-> Delta Data Carrier Detect 

~> Clear to Send 

-> Data Set Ready 

-> Ring Indicator 

-> Data Carrier Detect 



Modem Status Register 

Bit This bit is the delta clear-to-send (DCTS) indicator. 

It indicates the ' -CTS ' input to the chip has 
changed state since the last time it was read by the 
processor. 

Bit 1 This bit is the delta data-set-ready (DDSR) 

indicator. It indicates the ' -DSR ' input to the chip 
has changed state since the last time it was read by 
the processor. 

Bit 2 This bit is the traiUng-edge ring-indicator (TERI) 

detector. It indicates the ' -RI ' input to the chip has 
changed from an active condition to an inactive 
condition. 

Bit 3 This bit is the delta data-carrier-detect (DDCD) 

indicator. It indicates the ' -DCD ' input to the chip 
has changed state. 

Note: Whenever bit 0, 1, 2, or 3 is set to a logical 
1 , a modem status interrupt is generated. 



16 Serial/Parallel Adapter 



Bit 4 This bit is the opposite of the ' -clear-to-send ' 

(-CTS) input. If bit 4 of the MCR loop is set to a 
logical 1 , this bit is equivalent to RTS of the MCR. 

Bit 5 This bit is the opposite of the ' -data-set-ready ' 

(-DSR) input. If bit 4 of the MCR is set to a logical 
1, this bit is equivalent to DTR of the MCR. 

Bit 6 This bit is the opposite of the ' -ring-indicator ' 

(-RI) input. If bit 4 of the MCR is set to a logical 1, 
this bit is equivalent to OUT 1 of the MCR. 

Bit 7 This bit is the opposite of the ' -data-carrier-detect ' 

(-DCD) input. If bit 4 of the MCR is set to a logical 
1, this bit is equivalent to OUT 2 of the MCR. 



Programmable Baud-Rate Generator 

The controller has a programmable baud-rate generator that can 
divide the clock input (1.8432 MHz) by any divisor from 1 to 
655,535 or 2i6-l. The output frequency of the baud-rate 
generator is the baud rate multiphed by 16. Two 8-bit latches 
store the divisor in a 16-bit binary format. These divisor latches 
must be loaded during setup to ensure desired operation of the 
baud-rate generator. When either of the divisor latches is loaded, 
a 1 6-bit baud counter is immediately loaded. This prevents long 
counts on the first load. 



Serial/Parallel Adapter 17 



Pin Assignment for Serial Port 



The following figure shows the pin assignments for the serial port 
in a communications environment. 




External 
Device 





Carrier Detect 


1 




Receive Data 


2 




Transmit Data 


3 




Data Terminal Ready 


4 




Signal Ground 


5 




Data Set Ready 


6 




Request To Send 


7 




Clear To Send 


8 




Ring Indicator 


9 









Serial 

Parallel 

Adapter 



18 Serial/ParaUel Adapter 



Parallel Portion of the Adapter 

The parallel portion of the adapter makes possible the attachment 
of various devices that accept eight bits of parallel data at 
standard TTL levels. The rear of the adapter has a 25 -pin, 
D-shell connector. This port may be addressed as either parallel 
port 1 or 2. The port address is determined by the position of 
jumper J2, as shown in the following figure. 




Port 2 



Port 1 



Serial/Parallel Adapter 19 



The following figure is a block diagram of the parallel portion of 
the adapter. 



Data 
Bus 





Address 
Decode 


^ n 


luffer 

lontrol 

signals 




Address 


^ r 




Bus 


^k T 




^ s 






Interrupt 


























Data 

Output 

Buffer 




25-Pin D 
Connector 






Data 
Wrap 
Buffer 








-^ 




^ 




-* 
















Control 
Output 
Buffer 




Control Wrap 

and 
Signal Input 























Parallel Portion Block Diagram 



Printer Application 

The following discusses the use of the parallel portion of the 
adapter to connect to a parallel printer. Hexidecimal addresses in 
this section begin with an X, which is replaced with a 3 to indicate 
port 1, or a 2 to indicate port 2. 



Data Latch (HexX78,X7C) 

Writing to this address causes data to be stored in the printer's 
data buffer. Reading this address sends the contents of the 
printer's data buffer to the system microprocessor. 



Printer Controls (hex X7A, X7E) 

Printer control signals are stored at this address to be read by the 
system microprocessor. The following are bit definitions for this 
byte. 



20 Serial/Parallel Adapter 



Bit 7 Not used 

Bit 6 Not used 

Bit 5 Not used 

Bit 4 +IRQ Enable — A 1 in this position allows an interrupt 
to occur when ' -ACK ' changes from true to false. 

Bit 3 +SLCT IN — A 1 in this bit position selects the printer. 

Bit 2 -INIT — A starts the printer (50-microsecond pulse, 
minimum). 

Bit 1 + AUTO FD XT — A 1 causes the printer to line-feed 
after a line is printed. 

Bit H-STROBE — A 0.5 -microsecond minimum, high, active 
pulse clocks data into the printer. Valid data must be 
present for a minimum of 0.5 microsecond before and 
after the strobe pulse. 



Printer Status - Address X79, X7D 

Printer status is stored at this address to be read by the 
microprocessor. The following are bit definitions for this byte. 

Bit 7 -BUSY — When this signal is active, the printer is busy 
and cannot accept data. It may become active during 
data entry, while the printer is offUne, during printing, 
when the print head is changing positions, or while in an 
error state. 

Bit 6 -ACK — This bit represents the current state of the 
printer's ' -ACK ' signal. A means the printer has 
received the character and is ready to accept another. 
Normally, this signal will be active for approximately 5 
microseconds before ' -BUSY ' stops. 

Bit 5 +PE — A 1 means the printer has detected the end of 
paper. 



Serial/ParaDel Adapter 21 



Bit 4 +SLCT — A 1 means the printer is selected. 

Bit 3 -Error — A means the printer has encountered an error 
condition. 

Bit 2 Unused. 

Bit 1 Unused. 

Bit Unused. 



22 Serial/Parallel Adapter 



Parallel Interface 

The adapter has a 25 -pin, D-shell connector at the rear of the 
adapter. The following figure shows the signals and their pin 
assignments. Typical printer input signals also are shown. 




External 
Device 





- strobe 




1 




Data Bit 





2 




Data Bit 


1 


3 




Data Bit 


2 


4 




Data Bit 


3 


5 




Data Bit 


4 


6 




Data Bit 


5 


7 




Data Bit 


6 


8 




Data Bit 


7 


9 




-ACK 




'^ ». 




BUSY 




11 ^ 




PE 




12 




SLCT 




''• 




-AUTO FEED XT 


14 




-ERROR 




^^ m 




-INIT 




16 




-SLCT IN 




17 




Ground 




18-25 











Serial 

Parallel 

Adapter 



Serial/Parallel Adapter 23 



Specifications 

The following figures list characteristics of the output driver. 



Sink current 
Source current 
High-level output voltage 
Low- level output voltage 


24 mA 
-2.6 mA 
2.4 Vdc 
0.5 Vdc 


Max 
Max 
Min 
Max 




Parallel Data and Processor IRQ 






Sink current 

Source current 

High level output voltage 

Low level output voltage 


16 mA 
0.55 mA 
5 Vdc 
0.4 Vdc 


Max 
Max 

Minus pull 
Max 


-up 


Parallel Control 








Sink current 

Source current 

High level output voltage 

Low level output voltage 


24 mA 
-15 mA 
2.0 Vdc 
0.5 Vdc 


Max 
Max 
Min 
Max 





Parallel Processor Interface (except IRQ) 

The following are the specifications for the serial interface. 
Function Condition 

On Spacing condition (binary 0, positive voltage). 

Off Marking condition (binary 1, negative voltage). 



Voltage 


Function 


above +15 Vdc 
+3 Vdc to +15 Vdc 
-3 Vdc to +3 Vdc 
-3 Vdc to -15 Vdc 
Below -15 Vdc 


Invalid 

On 

Invalid 

Off 

Invalid 



Serial Port Functions 



24 Serial/Parallel Adapter 



Logic Diagrams 



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(SHT1) 
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- ENABLE FftRALLEL I/fl 



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(SHT1) - 

(SHT1) - 

(SHT1) - 

(SHT1) - 

(SHT1) - 

(SHT1) - 

(SHT1) - 



(SHT1) 
(SHT1) 
(SHT1) 
(SHT1) 











IRQS 1 


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8 




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7 
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1 


IRQ7 3 




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2S PIN 
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Serial/Printer Adapter (Sheet 2 of 3) 



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(SHT1) 



(SHT1) 

(SHT1) ■ 

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(SHT1) 

(SHT 1) 

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(SHT 1) 
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Serial/Printer Adapter (Sheet 3 of 3) 



28 Serial/Parallel Adapter 






m 



iJisk Drive 



tA.Hl2A t 



Contents 



Description 1 

Interfaces 1 

Control Input Signals 2 

Output Control Signals 4 

Data-Transfer Signals 6 

Overlapped Seek 7 

Specifications 7 

Logic Diagrams 9 



m 



IV 



Description 



The fixed disk drive is a direct-access device that can store up to 
20Mb of formatted data. The average access time is 40 
milliseconds using a quasi closed-loop servo positioner. 



Interfaces 



The interfaces of this drive are divided into three categories: 
control, data transfer, and dc power. 

The control interface is a 34 pin printed circuit board (PCB) edge 
connector. The following shows the signals and pin assignments. 



Signal Name 


Signal Pin 


Ground Pin 


-Head select 3 


2 


1 


-Head select 2 


4 


3 


-Write gate 


6 


5 


-Seek complete 


8 


7 


-Track 000 


10 


9 


-Write fault 


12 


11 


-Head select 


14 


13 


Reserved 


16 


15 


-Head select 1 


18 


17 


-Index 


20 


19 


-Ready 


22 


21 


-Step 


24 


23 


-Drive select 1 


26 


25 


-Drive select 2 


28 


27 


-Drive selects 


30 


29 


- Drive select 4 


32 


31 


-Direction in 


34 


33 



Control Interface 

The data transfer interface is a 20 Pin PCB connector. The 
signals and pin assignments are as follows: 



20MB Fixed Disk Drive 1 



Signal Name 


Signal Pin 


-Drive selected 


1 




+MFM write data 


13 




-MFM write data 


14 




+MFM read data 


17 




-MFM read data 


18 




Ground 


2,4,6,8, 11, 


12, 15, 16, 19 



Data-Transfer Interface 

The dc power interface is a 4-pin PWB connector. The signals 
and pin assignments follow. 



Signal Name 


Pin 


+12 Vdc 

+12 Vdc return 

+5 Vdc 

+5 Vdc return 


1 
2 
4 
3 



DC Power Interface 

Control Input Signals 

The control input signals are of two types: those that are 
multiplexed in a multiple drive system, and those intended to do 
the multiplexing. These input signals have the following 
specifications. 

• Active: 0.0 to 0.4 Vdc at 40 mA 

• Inactive: 2.5 to 5.25 Vdc at mA 

The following are descriptions of the control input signals. 

-Write Gate 

The active level of this signal allows data to be written on the 
disk. The inactive level allows data to be read from the disk, and 
allows the step pulse to move the heads. 



2 20MB Fixed Disk Drive 



-Head Select 0, 1, 2, and 3 

These four signals enable the selection of each read/write head in 
a binary-coded sequence. ' -Head Select ' is the least 
significant. Heads are numbered through 15. When all Head 
Select signals are inactive, head is selected. 



-Direction In 

This signal defines the direction the read/ write heads move when 
' -Step ' is pulsed. A inactive level defines the direction as out, 
and if a pulse is appUed to ' -Step ' , the read/ write heads move 
away from the center of the disk. An active level defines the 
direction as in, and the read/write heads move toward the center 
of the disk. 



-Step 

This signal causes the read/ write heads to move in the direction 
defined by the ' -Direction In ' signal. The motion starts when 
the ' -Step ' signal changes from active to inactive (the traiUng 
edge of this signal pulse). Any change in ' -Direction In ' is made 
at least 100 nanoseconds before the leading edge of the step 
pulse. This drive supports two methods of stepping or seeking: 

Slow Seek The read/write heads move at the rate of 

incoming step pulses. The minimum time 
between successive steps is 3 milliseconds and 
the minimum pulse width is 2 microseconds. 

Buffered Seek The adapter's controller may burst step pulses to 
the drive until the time after the last pulse 
exceeds 200 microseconds or the maximum 
number of step pulses is received (1 for each 
track). The drive starts motion of the heads 
after receiving the first step pulse. Step pulses 
are sent to the drive every 35 microseconds. 



20MB Fixed Disk Drive 3 



-Drive Select Signals 1 through 4 

When one of these signals is active, it connects that drive to the 
control lines. Making the appropriate jumper connections at the 
drive determines which select line of the interface activates that 
drive. 

The fixed disk drive provides a 220/230 ohm termination for a 
single ' drive select ' signal. The signal lead that is terminated is 
the one that selects the drive based on the position of the drive 
select jumpers. 



Output Control Signals 

An open-collector output stage, which is capable of sinking a 
maximum of 40 mA at logical to an active state with a 
maximum voltage of 0.4 Vdc at the driver, drives the output 
control signals. When the line driver is at the inactive level, the 
driver's transistor is off and the collector's cutoff current is a 
maximum of 250 microamperes. 



-Seek Complete 

This signal goes active when the read/ write heads settle on the 
final track at the end of a seek. Reading or writing is not 
attempted when -Seek Complete is inactive. The following 
situations force -Seek Complete inactive. 

• When power-on starts a recalibration sequence because the 
read/ write heads are not over track 0. 

• When less than 2 microseconds have elapsed after the trailing 
edge of a step pulse or a series of step pulses. 

• If the +5 or + 12 Vdc fluctuates or is lost momentarily but 
restored. 

• If the drive attempts to retry a seek after settling on a track. 



4 20MB Fixed Disk Drive 



-Seek Complete returns to the active level no later than 100 
miUiseconds (1 second if a seek retry occurs) after the trailing 
edge of the last -Step pulse. 



-Track 000 

This signal is at an active level when the drive's read/ write heads 
are at the outermost track. 



-Write Fault 

This signal means that a condition at the drive is causing improper 
operation of the disk. An active level of this signal prevents 
further writing and stepping at the drive until drive power is 
switched off. 

This signal goes active when any of the following conditions 
occur: 

• Write current exists in the head without * -Write Gate ' 
active, or no write current exists in the head with ' -Write 
Gate ' active and ' -Drive Selected ' active. 

• More than one seek retry between Seek commands from the 
controller 

• A step pulse is received while ' -Write Gate ' is active. 



-Index 

The drive provides this output signal once each revolution to 
indicate the beginning of a track. This signal normally is inactive 
and goes active to indicate ' -Index ' . Only the change from 
inactive to active is vaUd (leading edge of the pulse). 



-Ready 

When this signal and ' -Seek Complete ' are active, the drive is 
ready to read, write, or seek, and the I/O signals are valid. An 



20MB Fixed Disk Drive 5 



inactive level of this signal prevents all writing and seeking. 
' -Ready ' is inactive four times during drive operation: 

• At power-up time ' -Ready ' remains inactive until: 

- Access recalibration to track is complete. 

- Spindle speed is stable within ±0.5% of nominal (10 
revolution average). 

- Drive self -check is complete. 

• Spindle speed deviates ±0.25% of nominal (10 revolution 
average). 

• ' -Write Fault ' is active. 

• DC voltages are out of tolerance. 



Data-Transfer Signals 

All signals associated with the transfer of data between the drive 
and the system are differential (pairs of balanced signals) and are 
not multiplexed. 

Two pairs of balanced signals are used for the transfer of data: 
Write Data and Read Data. The following describes the 
data- transfer signals. 



MFM Write Data 

This is a differential pair that defines signal shifts written on the 
track. When '+ MFM Write Data' goes more positive than 
' -MFM Write Data ' , flux reverses on the track, provided that 
' Write Gate ' is active. The system drives ' -MFM Write Data ' 
to an active level ( ' -MFM Write Data ' more negative than 
' -hMFM Write Data ' ) when in the read mode. 



6 20MB Fixed Disk Drive 



To ensure data integrity, tlie controller applies a 
write-precompensation of ± 12 nanoseconds to all write data on 
cylinders 300 and greater. 



MFM Read Data 

Read data is sent to the system through the differential pair of 
MFM Read Data lines. When ' +MFM Read Data ' goes more 
positive than ' -MFM Read Data ' , flux reverses on the track of 
the selected head. 



Overlapped Seek 



The drive supports overlapped-seek operations. An overlapped 
seek occurs when the drive is deselected 20 microseconds after 
the last step pulse is sent. Another drive is then selected, and the 
' -Step ' and ' -Direction In ' signals are set by the operation 
desired. The controller provides at least 100 nanoseconds of hold 
time on ' -Step ' and ' -Direction In ' after ' -Drive Select ' is 
inactive. 



Specifications 



The following figures list the internal and performance 
specifications of this drive. 



20MB Fixed Disk Drive 7 



Rotational speed 
Cylinders 
R/W heads 
Index 


3573 rpm±0.5% 
615 + landing zone 
6 

1 



Internal Specifications 



Fornnatted capacity 


20Mb 


Bytes /sector 


512 


Sectors /track 


17 


Transfer rate 


5M bits/second 


Access tinne 




Track-to-track 


2 ms 


Average 


40 ms 


Maximum 


85 ms 


Settling 


12 ms 


Average latency 


8.4 ms 


Track density 


750 TPI 



Performance Specifications 



8 20MB Fixed Disk Drive 



Logic Diagrams 



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Contents 



Description 1 

Fixed Disk Function 1 

Task File 1 

Task File Registers 2 

Miscellaneous Information 10 

Diskette Function 10 

Diskette Controller 12 

Diskette Controller Commands 14 

Controller Commands 17 

Command Status Registers 24 

Interfaces 28 

Interface Lines 30 

Logic Diagrams 35 



111 



IV 



Description 



The IBM Personal Computer AT Fixed Disk and Diskette Drive 
Adapter connects to the system board using one of the system 
expansion slots. The adapter controls the 5-1/4 inch diskette 
drives and fixed disk drives. Connectors on the adapter supply all 
the signals necessary to operate up to two fixed drives and one 
diskette drive or one fixed drive and two diskette drives. The 
adapter will allow concurrent data operations on one diskette and 
one fixed disk drive. 

The adapter operates when connected to a system board 
expansion slot. This channel is described in the "System Board" 
section of the IBM Personal Computer AT Technical Reference 
Manual. 



Fixed Dislt Function 



The fixed disk function features 512-byte sectors; high-speed, 
PIO data transfers; ECC correction of up to five bits on data 
fields; multiple sector operations across track and cylinder 
boundaries; and on-board diagnostic tests. The adapter will 
support two fixed disks with up to 16 read/ write heads and 1024 
cylinders. 



Task File 

A task file, which contains eight registers, controls fixed-disk 
operations. The following figure shows the addresses and 
functions of these registers. 



Fixed Disk and Diskette Adapter 1 



I/O Address 






Primary 


Secondary 


Read 


Write 


1F0 


170 


Data register 


Data register 


1F1 


171 


Error register 


Write preconap 


1F2 


172 


Sector count 


Sector count 


1F3 


173 


Sector number 


Sector number 


1F4 


174 


Cylinder low 


Cylinder low 


1F5 


175 


Cylinder high 


Cylinder high 


1F6 


176 


Drive /head 


Drive/head 


1F7 


177 


Status register 


Command register 



Task File 



Task File Registers 

Data Register 

The data register provides access to the sector buffer for read and 
write operations in the PIO mode. This register must not be 
accessed unless a Read or Write command is being executed. The 
register provides a 16-bit path into the sector buffer for normal 
Read and Write commands. When a R/W Long is issued, the 4 
ECC bytes are transferred by byte with at least 2 microseconds 
between transfers. ' Data Request ' (DRQ) must be active before 
the transferring of the ECC bytes. 



Error Register 

The error register is a read-only register that contains specific 
information related to the previous command. The data is valid 
only when the error bit in the status register is set, unless the 
adapter is in diagnostic mode. Diagnostic mode is the state 
immediately after power is switched on or after a Diagnose 
command. In these cases, the register must be checked regardless 
of the status register indicator. The following are bit values for 
the diagnostic mode. 



Diagnostic Mode 

01 No errors 



2 Fixed Disk and Diskette Adapter 



02 Controller error 

03 Sector buffer error 

04 ECC device error 

05 Control processor error 

The following are bit definitions for the operational mode. 

Operational Mode 

Bit Data Address Mark (DAM) Not Found — This bit 

indicates that DAM could not be found within 16 bytes 
of the ID field. 

Bit 1 TR 000 Error — This bit will be set if, during a Restore 
command, the track 000 line from the fixed disk is not 
true within 1023 step pulses to the drive. 

Bit 2 Aborted Command — A command is aborted based on 
the drive status (Write Fault, Not Seek Complete, Drive 
Not Ready, or an invalid command). The status and 
error registers may be decoded to determine the cause. 

Bit 3 Not used. 

Bit 4 ID Not Found — The ID field with the specified cylinder, 
head, and sector number could not be found. If retries 
are enabled, the controller attempts to read the ID 16 
times before indicating the error. If retries are disabled, 
the track is scanned a maximum of two times before 
setting this error bit. 

Bit 5 Not used 

Bit 6 Data ECC Error — This bit indicates that an 

uncorrectable ECC error occurred in the target's data 
field during a read command. 



Fixed Disk and Diskette Adapter 3 



Bit 7 Bad Block Detect — This bit indicates that the bad block 
mark was detected in the target's ID field. No Read or 
Write commands will be executed in any data fields 
marked bad. 



Write Precompensation Register 

The value in this register is the starting cylinder divided by 4. The 
' reduced write current ' signal to the drive is activated and the 
adapter's Write Precompensation logic is turned on. 



Sector Count Register 

The sector count register defines the number of sectors to be 
transferred during a Verify, Read, Write, or Format command. 
During a multi-sector operation, the sector count is decremented 
and the sector number is incremented. When the disk is being 
formatted, the number of sectors per track must be loaded into 
the register prior to each Format command. The adapter supports 
multi-sector transfers across track and cyUnder boundaries. The 
drive characteristics must be set up by the Set Parameters 
command before initiating a multi-sector transfer. The sector 
count register must be loaded with the number of sectors to be 
transferred for any data-related command. 

Note: A in the sector count register specifies a 256-sector 
transfer. 



Sector Number Register 

The target's logical sector number for Read, Write, and Verify 
commands is loaded into this register. The starting sector number 
is loaded into this register for multi-sector operations. 



Cylinder Number Registers 

The target number for Read, Write, Seek, and Verify commands 
is loaded into these registers as shown in the following figure. The 
cylinder-number registers address up to 1024 cylinders. 



4 Fixed Disk and Diskette Adapter 





Cylinder High 


Cylinder Low 


Register bits 
Cylinder bits 


76543210 
98 


76543210 
76543210 



Cylinder Number Registers 

Drive/Head Register 

Bit 7 Set to 1 

Bit 6 Set to 

Bit 5 Set to 1 

Bit 4 Drive Select — This bit selects the drive. A 

indicates the first fixed disk drive, and a 1 
indicates the second. 

Bit 3-Bit Head Select Bits — Bits 3 through specify the 

desired read/ write head. Bit is the 
least-significant (0101 selects head 5). The 
adapter supports up to 16 read/ write heads. For 
access to heads 8 through 15, bit 3 of the fixed 
disk register (address hex 3F6) must be set to 1. 

Note: This register must be loaded with the maximum number 
of heads for each drive before a Set Parameters command is 
issued. 

Status Register 

The controller sets up the status register with the command status 
after execution. The program must look at this register to 
determine the result of any operation. If the busy bit is set, no 
other bits are vaUd. A read of the status register clears interrupt 
request 14. If ' write fault ' or 'error' is active, or if 'seek 
complete ' or ' ready ' is inactive, a multi-sector operation is 
aborted. 

The following defines the bits of the status register. 



Fixed Disk and Diskette Adapter 5 



Bit 7 Busy — This bit indicates the controller's status. 

A 1 indicates the controller is executing a 
command. If this bit is set, no other status 
register bit is vaUd, and the other registers reflect 
the status register's contents; therefore, the busy 
bit must examined before any fixed disk register 
is read. 

Bit 6 Drive Ready — A 1 on this bit together with a 1 

on seek complete bit (bit 4) indicates that the 
fixed disk drive is ready to read, write, or seek. A 
indicates that read, write, and seek are 
inhibited. 

Bit 5 Write Fault — A 1 on this bit indicates improper 

operation of the drive; read, write, or seek is 
inhibited. 

Bit 4 Seek Complete — A 1 on this bit indicates that the 

read/ write heads have completed a seek 
operation. 

Bit 3 Data Request — This bit indicates that the sector 

buffer requires servicing during a Read or Write 
command. If either bit 7 (busy) or this bit is 
active, a command is being executed. Upon 
receipt of any command, this bit is reset. 

Bit 2 Corrected Data — A 1 on this bit indicates that 

the data read from the disk was successfully 
corrected by the ECC algorithm. Soft errors will 
not end multi-sector operations. 

Bit 1 Index — This bit is set to 1 each revolution of the 

disk. 

Bit Error — A 1 on this bit indicates that the previous 

command ended in an error, and that one or more 
bits are set in the error register. The next 
command from the controller resets the error bit. 
This bit, when set, halts multi-sector operations. 



6 Fixed Disk and Diskette Adapter 



Command Register 

The command register accepts eight commands to perform fixed 
disk operations. Commands are executed by loading the task file 
and writing in the command register while the controller status is 
not busy. If ' -write fault ' is active or if ' -drive ready ' or ' -seek 
complete ' are inactive, the controller will not execute any 
command. Any code not defined in the following causes an 
Aborted Command error. Interrupt request 14 is reset when any 
command is written. The following are acceptable commands to 
the command register. 



Command 


Bits 








7 6 


5 


4 3 2 10 


Restore 








1 R3 R2 R1 RO 


Seek 


1 


1 


1 R3 R2 R1 RO 


Read Sector 





1 


L T 


Write Sector 





1 


1 L T 


Format Track 


1 





10 


Read Verify 


1 





T 


Diagnose 


1 





10 


Set Parameters 


1 





10 1 



Valid Command-Register Commands 

The following figure shows the stepping rate as defined by R3 
through RO. 



R3 


R2 


R1 


RO 


Stepping Rate 














35 us 













0.5 ms 













1.0 ms 












1.5 ms 





1 








2.0 ms 





1 







2.5 ms 





1 







3.0 ms 





1 






3.5 ms 













4.0 ms 












4.5 ms 












5.0 ms 











5.5 ms 




1 








6.0 ms 




1 







6.5 ms 




1 







7.0 ms 




1 






7.5 ms 



Stepping Rate 



Fixed Disk and Diskette Adapter 7 



Note: After a Diagnose or Reset Command, the stepping rate 
is set to 7.5 milliseconds. 

The following figure shows the bit definitions for bits L and T. 



Bit 


Definition 





1 


L 
T 


Data Mode 
Retry Mode 


Data Only 
Retries Enabled 


Data plus 4 byte ECC 
Retries Disabled 



L and T Bit Definitions 



Note: The system verifies the operation of ECC by reading 
and writing with the ECC bytes. When retries are disabled, 
ECC and ID field retries are limited to less than two complete 
revolutions. 

Following are descriptions of the valid command-register 
commands. 

Restore: The controller issues step pulses to the drive at 3 
milliseconds per step until the track 000 indicator from the drive 
is active. If track 000 is not active within 1023 steps, the error bit 
in the status register is set, and a track 000 error is placed in the 
error register. The implied seek step rate is set by this command. 

Seek: The Seek command moves the R/W heads to the cylinder 
specified in the task files. The adapter supports overlapped 
seeking on two drives or setup of the buffered seek stepping rate 
for the implied seek during a Read/Write command. An interrupt 
is generated at the completion of the command. 

Read Sector: A number of sectors (1-256) may be read from 
the fixed disk with or without the ECC field appended in the 
Programmed I/O (PIO) mode. If the heads are not over the 
target track, the controller issues step pulses to the drive and 
checks for the proper ID field before reading any data. The 
stepping rate used during the implied seek is the value specified 
during the previous Seek or Restore command. Data errors, up to 
5 bits in length, are automatically corrected on Read Short 
commands. If an uncorrectable error occurs, the data transfer 
still takes place; however, a multi-sector read ends after the 



8 Fixed Disk and Diskette Adapter 



system reads the sector in error. Interrupts occur as each sector is 
ready to be read by the system. No interrupt is generated at the 
end of the command, after the lost sector is read by the system. 

Write Sector: A number of sectors (1-256) may be written to 
the fixed disk with or without the ECC field appended in the PIO 
mode. The Write Sector command also supports implied seeks. 
Interrupts for the Write command occur before each sector is 
transferred to the buffer (except the first) and at the end of the 
command. The first sector may be written to the buffer 
immediately after the command has been sent, and ' data request ' 
is active. 

Format Track: The track specified by the task file is formatted 
with ID and data fields according to the interleave table 
transferred to the buffer. The interleave table is composed of two 
bytes per sector as follows: 00, Physical Sector 1, 00, Physical 
Sector 2, ... 00,Physical Sector 17. The table for 2-to-l 
interleave is: 00, 01, 00, OA, 00, 02, 00, OB, 00, 03, 00, OC, 00, 
04, 00, OD, 00, 05, 00, OE, 00, 06, 00, OF, 00, 07, 00, 10, 00, 08, 
00, 1 1, 00, 09. The data transfer must be 512 bytes even though 
the table may be only 34 bytes. The sector count register must be 
loaded with the number of sectors per track before each Format 
Track command. An interrupt is generated at the completion of 
the command; the Format Track command supports no error 
reporting. A bad block may be specified by replacing a 00 table 
entry with an 80. When switching between drives, a restore 
command must be executed prior to attempting a format. 

Read Verify: This command is similar to to a Read command 
except that no data is sent to the host. This allows the system to 
verify the integrity of the fixed disk drive. A single interrupt is 
generated upon completion of the command or in the event of an 
error. 

Diagnose: This command causes the adapter to execute its 
self-test code and return the results to the error register. An 
interrupt is generated at the completion of this command. 

Set Parameters: This command sets up the drive parameters 
(maximum number of heads and sectors per track). The 
drive/head register specifies the drive affected. The sector count 



Fixed Disk and Diskette Adapter 9 



and drive/head registers must be set up before this command is 
issued. The adapter uses the values specified for track and 
cylinder crossing during multi-sector operations. An interrupt is 
generated at the completion of this command. This command 
must be issued before any multi-sector operations are attempted. 
The adapter supports two fixed disk drives with different 
characteristics, as defined by this command. 



Miscellaneous Information 

The following is miscellaneous information about the fixed disk 
drive function. 

• The adapter performs normal read/ write operations on a data 
field only after a successful match of that sector's ID with the 
targeted ID. 

• ID fields are checked for errors when read from the disk. 

• The adapter supports only ECC on data fields and only CRC 
on ID fields. The CRC polynomial is X16 -h X12 + X5 -f 1; 
the ECC polynomial is X32 + X28 -h X26 + X19 + X17 + 
XIO + X6 + X2 H- 1. All shift registers are preset to hex F 
before calculating the checksums, which begin with the 
respective address marks. 



Diskette Function 



The 5-1/4 inch diskette drive function is an integral part of the 
IBM Personal Computer AT Fixed Disk and Diskette Drive 
Adapter. One or two diskette drives are attached to the adapter 
through an internal, daisy-chained, flat cable. The attachment 
will support 160K.-, 320K.-, and 1.2M.-byte diskette drives. 

The adapter is designed for a double-density, MFM-coded, 
diskette drive and uses write precompensation with an analog 
circuit for clock and data recovery. The diskette-drive parameters 
are programmable, and the diskette drive's write-protect feature is 
supported. The adapter is buffered on the I/O bus and uses the 



10 Fixed Disk and Diskette Adapter 



system board's direct memory access (DMA) for record data 
transfers. An interrupt level also is used to indicate when an 
operation is complete and that a status condition requires 
microprocessor attention. 



Digital Output Register (Hex 3F2) 

The digital output register (DOR) is an output-only register used 
to control drive motors, drive selection, and feature enable. All 
bits are cleared by the I/O interface reset line. The bit definitions 
follow. 

Bit 7 Reserved 

Bit 6 Reserved 

Bit 5 Drive B Motor Enable 

Bit 4 Drive A Motor Enable 

Bit 3 Enable Diskette Interrupts and DMA 

Bit 2 Diskette Function Reset 

Bit 1 Reserved 

Bit Drive Select — A on this bit indicates that drive 

A is selected. 

Note: A channel reset clears all bits. 

Digital Input Register 

The digital input register is an 8-bit, read- only register used for 
diagnostic purposes. The following are bit definitions for this 
register. 

Bit 7 Diskette Change 

Bit 6 Write Gate 



Fixed Disk and Diskette Adapter 1 1 



Bit 5 Head Select 3 /Reduced Write Current 

Bit 4 Head Select 2 

Bit 3 Head Select 1 

Bit 2 Head Select 

Bit 1 Drive Select 1 

Bit Drive Select 

Note: Bits through 6 apply to the currently 
selected fixed disk drive. 



Data Rates 

The diskette function will support three data rates: 250,000, 
300,000 and 500,000 bits per second. The 300,000-and 
500,000-bps incoming data pulse widths will be those associated 
with a 500,000-bps data signal. 



Diskette Controller 

The diskette controller has two registers to which the main system 
processor has access: a status register and a data register. The 
8 -bit status register has the status information about the diskette 
and may be accessed at any time. The 8 -bit data register (hex 
3F5), which actually consists of several registers in a stack with 
only one register presented to the data bus at a time, stores data, 
commands, and parameters, and provides diskette-drive status 
information. Data bytes are read from or written to the data 
register in order to program or obtain results after a particular 
command. The main status register may only be read and is used 
to facilitate the transfer of data between the processor and 
diskette controller. 

The bits in the main status register (hex 34F) are defined as 
follows: 



12 Fixed Disk and Diskette Adapter 



Bit 7 Request for Master (RQM) — The data register 

is ready to send or receive data to or from the 
processor. 

Bit 6 Data Input/Output (DIO) — The direction of 

data transfer between the diskette controller and 
the processor. If this bit is a 1 , transfer is from 
the diskette controller's data register to the 
processor; if it is a 0, the opposite is true. 

Bit 5 Non-DMA Mode (NDM) — The diskette 

controller is in the non-DMA mode. 

Bit 4 Diskette Controller Busy (CB) — A Read or 

Write command is being exe